Commit f9ae32a7 authored by Mike Turquette's avatar Mike Turquette Committed by Paul Walmsley

ARM: OMAP2+: clock: Cleanup !CONFIG_COMMON_CLK parts

Clean all #ifdef's added to common clock code.  This code is no longer
needed due to migration to the common clock framework.
Signed-off-by: default avatarMike Turquette <mturquette@ti.com>
[paul@pwsan.com: clean up new ifdefs added in clockdomain.c]
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent f51e0f98
This diff is collapsed.
...@@ -16,11 +16,7 @@ ...@@ -16,11 +16,7 @@
#include <linux/kernel.h> #include <linux/kernel.h>
#include <linux/errno.h> #include <linux/errno.h>
#ifdef CONFIG_COMMON_CLK
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#else
#include <linux/clk.h>
#endif
#include <linux/io.h> #include <linux/io.h>
#include <asm/div64.h> #include <asm/div64.h>
...@@ -80,11 +76,7 @@ ...@@ -80,11 +76,7 @@
* (assuming that it is counting N upwards), or -2 if the enclosing loop * (assuming that it is counting N upwards), or -2 if the enclosing loop
* should skip to the next iteration (again assuming N is increasing). * should skip to the next iteration (again assuming N is increasing).
*/ */
#ifdef CONFIG_COMMON_CLK
static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n) static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n)
#else
static int _dpll_test_fint(struct clk *clk, u8 n)
#endif
{ {
struct dpll_data *dd; struct dpll_data *dd;
long fint, fint_min, fint_max; long fint, fint_min, fint_max;
...@@ -93,11 +85,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n) ...@@ -93,11 +85,7 @@ static int _dpll_test_fint(struct clk *clk, u8 n)
dd = clk->dpll_data; dd = clk->dpll_data;
/* DPLL divider must result in a valid jitter correction val */ /* DPLL divider must result in a valid jitter correction val */
#ifdef CONFIG_COMMON_CLK
fint = __clk_get_rate(__clk_get_parent(clk->hw.clk)) / n; fint = __clk_get_rate(__clk_get_parent(clk->hw.clk)) / n;
#else
fint = __clk_get_rate(__clk_get_parent(clk)) / n;
#endif
if (cpu_is_omap24xx()) { if (cpu_is_omap24xx()) {
/* Should not be called for OMAP2, so warn if it is called */ /* Should not be called for OMAP2, so warn if it is called */
...@@ -198,24 +186,15 @@ static int _dpll_test_mult(int *m, int n, unsigned long *new_rate, ...@@ -198,24 +186,15 @@ static int _dpll_test_mult(int *m, int n, unsigned long *new_rate,
} }
/* Public functions */ /* Public functions */
#ifdef CONFIG_COMMON_CLK
u8 omap2_init_dpll_parent(struct clk_hw *hw) u8 omap2_init_dpll_parent(struct clk_hw *hw)
{ {
struct clk_hw_omap *clk = to_clk_hw_omap(hw); struct clk_hw_omap *clk = to_clk_hw_omap(hw);
#else
void omap2_init_dpll_parent(struct clk *clk)
{
#endif
u32 v; u32 v;
struct dpll_data *dd; struct dpll_data *dd;
dd = clk->dpll_data; dd = clk->dpll_data;
if (!dd) if (!dd)
#ifdef CONFIG_COMMON_CLK
return -EINVAL; return -EINVAL;
#else
return;
#endif
v = __raw_readl(dd->control_reg); v = __raw_readl(dd->control_reg);
v &= dd->enable_mask; v &= dd->enable_mask;
...@@ -225,34 +204,18 @@ void omap2_init_dpll_parent(struct clk *clk) ...@@ -225,34 +204,18 @@ void omap2_init_dpll_parent(struct clk *clk)
if (cpu_is_omap24xx()) { if (cpu_is_omap24xx()) {
if (v == OMAP2XXX_EN_DPLL_LPBYPASS || if (v == OMAP2XXX_EN_DPLL_LPBYPASS ||
v == OMAP2XXX_EN_DPLL_FRBYPASS) v == OMAP2XXX_EN_DPLL_FRBYPASS)
#ifdef CONFIG_COMMON_CLK
return 1; return 1;
#else
clk_reparent(clk, dd->clk_bypass);
#endif
} else if (cpu_is_omap34xx()) { } else if (cpu_is_omap34xx()) {
if (v == OMAP3XXX_EN_DPLL_LPBYPASS || if (v == OMAP3XXX_EN_DPLL_LPBYPASS ||
v == OMAP3XXX_EN_DPLL_FRBYPASS) v == OMAP3XXX_EN_DPLL_FRBYPASS)
#ifdef CONFIG_COMMON_CLK
return 1; return 1;
#else
clk_reparent(clk, dd->clk_bypass);
#endif
} else if (soc_is_am33xx() || cpu_is_omap44xx()) { } else if (soc_is_am33xx() || cpu_is_omap44xx()) {
if (v == OMAP4XXX_EN_DPLL_LPBYPASS || if (v == OMAP4XXX_EN_DPLL_LPBYPASS ||
v == OMAP4XXX_EN_DPLL_FRBYPASS || v == OMAP4XXX_EN_DPLL_FRBYPASS ||
v == OMAP4XXX_EN_DPLL_MNBYPASS) v == OMAP4XXX_EN_DPLL_MNBYPASS)
#ifdef CONFIG_COMMON_CLK
return 1; return 1;
#else
clk_reparent(clk, dd->clk_bypass);
#endif
} }
#ifdef CONFIG_COMMON_CLK
return 0; return 0;
#else
return;
#endif
} }
/** /**
...@@ -269,11 +232,7 @@ void omap2_init_dpll_parent(struct clk *clk) ...@@ -269,11 +232,7 @@ void omap2_init_dpll_parent(struct clk *clk)
* locked, or the appropriate bypass rate if the DPLL is bypassed, or 0 * locked, or the appropriate bypass rate if the DPLL is bypassed, or 0
* if the clock @clk is not a DPLL. * if the clock @clk is not a DPLL.
*/ */
#ifdef CONFIG_COMMON_CLK
unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk)
#else
u32 omap2_get_dpll_rate(struct clk *clk)
#endif
{ {
long long dpll_clk; long long dpll_clk;
u32 dpll_mult, dpll_div, v; u32 dpll_mult, dpll_div, v;
...@@ -329,15 +288,10 @@ u32 omap2_get_dpll_rate(struct clk *clk) ...@@ -329,15 +288,10 @@ u32 omap2_get_dpll_rate(struct clk *clk)
* (expensive) function again. Returns ~0 if the target rate cannot * (expensive) function again. Returns ~0 if the target rate cannot
* be rounded, or the rounded rate upon success. * be rounded, or the rounded rate upon success.
*/ */
#ifdef CONFIG_COMMON_CLK
long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate, long omap2_dpll_round_rate(struct clk_hw *hw, unsigned long target_rate,
unsigned long *parent_rate) unsigned long *parent_rate)
{ {
struct clk_hw_omap *clk = to_clk_hw_omap(hw); struct clk_hw_omap *clk = to_clk_hw_omap(hw);
#else
long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
{
#endif
int m, n, r, scaled_max_m; int m, n, r, scaled_max_m;
unsigned long scaled_rt_rp; unsigned long scaled_rt_rp;
unsigned long new_rate = 0; unsigned long new_rate = 0;
...@@ -351,11 +305,7 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) ...@@ -351,11 +305,7 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
dd = clk->dpll_data; dd = clk->dpll_data;
ref_rate = __clk_get_rate(dd->clk_ref); ref_rate = __clk_get_rate(dd->clk_ref);
#ifdef CONFIG_COMMON_CLK
clk_name = __clk_get_name(hw->clk); clk_name = __clk_get_name(hw->clk);
#else
clk_name = __clk_get_name(clk);
#endif
pr_debug("clock: %s: starting DPLL round_rate, target rate %ld\n", pr_debug("clock: %s: starting DPLL round_rate, target rate %ld\n",
clk_name, target_rate); clk_name, target_rate);
......
...@@ -11,11 +11,7 @@ ...@@ -11,11 +11,7 @@
#undef DEBUG #undef DEBUG
#include <linux/kernel.h> #include <linux/kernel.h>
#ifdef CONFIG_COMMON_CLK
#include <linux/clk-provider.h> #include <linux/clk-provider.h>
#else
#include <linux/clk.h>
#endif
#include <linux/io.h> #include <linux/io.h>
...@@ -27,11 +23,7 @@ ...@@ -27,11 +23,7 @@
/* Private functions */ /* Private functions */
/* XXX */ /* XXX */
#ifdef CONFIG_COMMON_CLK
void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk) void omap2_clkt_iclk_allow_idle(struct clk_hw_omap *clk)
#else
void omap2_clkt_iclk_allow_idle(struct clk *clk)
#endif
{ {
u32 v, r; u32 v, r;
...@@ -43,11 +35,7 @@ void omap2_clkt_iclk_allow_idle(struct clk *clk) ...@@ -43,11 +35,7 @@ void omap2_clkt_iclk_allow_idle(struct clk *clk)
} }
/* XXX */ /* XXX */
#ifdef CONFIG_COMMON_CLK
void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk) void omap2_clkt_iclk_deny_idle(struct clk_hw_omap *clk)
#else
void omap2_clkt_iclk_deny_idle(struct clk *clk)
#endif
{ {
u32 v, r; u32 v, r;
...@@ -60,7 +48,6 @@ void omap2_clkt_iclk_deny_idle(struct clk *clk) ...@@ -60,7 +48,6 @@ void omap2_clkt_iclk_deny_idle(struct clk *clk)
/* Public data */ /* Public data */
#ifdef CONFIG_COMMON_CLK
const struct clk_hw_omap_ops clkhwops_iclk = { const struct clk_hw_omap_ops clkhwops_iclk = {
.allow_idle = omap2_clkt_iclk_allow_idle, .allow_idle = omap2_clkt_iclk_allow_idle,
.deny_idle = omap2_clkt_iclk_deny_idle, .deny_idle = omap2_clkt_iclk_deny_idle,
...@@ -72,34 +59,6 @@ const struct clk_hw_omap_ops clkhwops_iclk_wait = { ...@@ -72,34 +59,6 @@ const struct clk_hw_omap_ops clkhwops_iclk_wait = {
.find_idlest = omap2_clk_dflt_find_idlest, .find_idlest = omap2_clk_dflt_find_idlest,
.find_companion = omap2_clk_dflt_find_companion, .find_companion = omap2_clk_dflt_find_companion,
}; };
#else
const struct clkops clkops_omap2_iclk_dflt_wait = {
.enable = omap2_dflt_clk_enable,
.disable = omap2_dflt_clk_disable,
.find_companion = omap2_clk_dflt_find_companion,
.find_idlest = omap2_clk_dflt_find_idlest,
.allow_idle = omap2_clkt_iclk_allow_idle,
.deny_idle = omap2_clkt_iclk_deny_idle,
};
const struct clkops clkops_omap2_iclk_dflt = {
.enable = omap2_dflt_clk_enable,
.disable = omap2_dflt_clk_disable,
.allow_idle = omap2_clkt_iclk_allow_idle,
.deny_idle = omap2_clkt_iclk_deny_idle,
};
const struct clkops clkops_omap2_iclk_idle_only = {
.allow_idle = omap2_clkt_iclk_allow_idle,
.deny_idle = omap2_clkt_iclk_deny_idle,
};
const struct clkops clkops_omap2_mdmclk_dflt_wait = {
.enable = omap2_dflt_clk_enable,
.disable = omap2_dflt_clk_disable,
.find_companion = omap2_clk_dflt_find_companion,
.find_idlest = omap2_clk_dflt_find_idlest,
.allow_idle = omap2_clkt_iclk_allow_idle,
.deny_idle = omap2_clkt_iclk_deny_idle,
};
#endif
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...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
* OMAP3xxx clock definition files. * OMAP3xxx clock definition files.
*/ */
#include <linux/clk-private.h>
#include "clock.h" #include "clock.h"
/* clksel_rate data common to 24xx/343x */ /* clksel_rate data common to 24xx/343x */
...@@ -115,9 +116,6 @@ const struct clksel_rate div31_1to31_rates[] = { ...@@ -115,9 +116,6 @@ const struct clksel_rate div31_1to31_rates[] = {
}; };
/* Clocks shared between various OMAP SoCs */ /* Clocks shared between various OMAP SoCs */
#ifdef CONFIG_COMMON_CLK
#include <linux/clk-private.h>
static struct clk_ops dummy_ck_ops = {}; static struct clk_ops dummy_ck_ops = {};
...@@ -126,19 +124,3 @@ struct clk dummy_ck = { ...@@ -126,19 +124,3 @@ struct clk dummy_ck = {
.ops = &dummy_ck_ops, .ops = &dummy_ck_ops,
.flags = CLK_IS_BASIC, .flags = CLK_IS_BASIC,
}; };
#else
struct clk virt_19200000_ck = {
.name = "virt_19200000_ck",
.ops = &clkops_null,
.rate = 19200000,
};
struct clk virt_26000000_ck = {
.name = "virt_26000000_ck",
.ops = &clkops_null,
.rate = 26000000,
};
#endif
...@@ -997,11 +997,9 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) ...@@ -997,11 +997,9 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
spin_lock_irqsave(&clkdm->lock, flags); spin_lock_irqsave(&clkdm->lock, flags);
#ifdef CONFIG_COMMON_CLK
/* corner case: disabling unused clocks */ /* corner case: disabling unused clocks */
if (__clk_get_enable_count(clk) == 0) if (__clk_get_enable_count(clk) == 0)
goto ccd_exit; goto ccd_exit;
#endif
if (atomic_read(&clkdm->usecount) == 0) { if (atomic_read(&clkdm->usecount) == 0) {
spin_unlock_irqrestore(&clkdm->lock, flags); spin_unlock_irqrestore(&clkdm->lock, flags);
...@@ -1019,9 +1017,7 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) ...@@ -1019,9 +1017,7 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
pr_debug("clockdomain: %s: disabled\n", clkdm->name); pr_debug("clockdomain: %s: disabled\n", clkdm->name);
#ifdef CONFIG_COMMON_CLK
ccd_exit: ccd_exit:
#endif
spin_unlock_irqrestore(&clkdm->lock, flags); spin_unlock_irqrestore(&clkdm->lock, flags);
return 0; return 0;
......
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