Commit f9ec5723 authored by Christian Marangi's avatar Christian Marangi Committed by Jakub Kicinski

net: ethernet: stmicro: stmmac: move queue reset to dedicated functions

Move queue reset to dedicated functions. This aside from a simple
cleanup is also required to allocate a dma conf without resetting the tx
queue while the device is temporarily detached as now the reset is not
part of the dma init function and can be done later in the code flow.
Signed-off-by: default avatarChristian Marangi <ansuelsmth@gmail.com>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent aa246499
...@@ -130,6 +130,9 @@ static irqreturn_t stmmac_mac_interrupt(int irq, void *dev_id); ...@@ -130,6 +130,9 @@ static irqreturn_t stmmac_mac_interrupt(int irq, void *dev_id);
static irqreturn_t stmmac_safety_interrupt(int irq, void *dev_id); static irqreturn_t stmmac_safety_interrupt(int irq, void *dev_id);
static irqreturn_t stmmac_msi_intr_tx(int irq, void *data); static irqreturn_t stmmac_msi_intr_tx(int irq, void *data);
static irqreturn_t stmmac_msi_intr_rx(int irq, void *data); static irqreturn_t stmmac_msi_intr_rx(int irq, void *data);
static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue);
static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue);
static void stmmac_reset_queues_param(struct stmmac_priv *priv);
static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue); static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue);
static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue); static void stmmac_flush_tx_descriptors(struct stmmac_priv *priv, int queue);
static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode, static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,
...@@ -1639,9 +1642,6 @@ static int __init_dma_rx_desc_rings(struct stmmac_priv *priv, u32 queue, gfp_t f ...@@ -1639,9 +1642,6 @@ static int __init_dma_rx_desc_rings(struct stmmac_priv *priv, u32 queue, gfp_t f
return -ENOMEM; return -ENOMEM;
} }
rx_q->cur_rx = 0;
rx_q->dirty_rx = 0;
/* Setup the chained descriptor addresses */ /* Setup the chained descriptor addresses */
if (priv->mode == STMMAC_CHAIN_MODE) { if (priv->mode == STMMAC_CHAIN_MODE) {
if (priv->extend_desc) if (priv->extend_desc)
...@@ -1744,12 +1744,6 @@ static int __init_dma_tx_desc_rings(struct stmmac_priv *priv, u32 queue) ...@@ -1744,12 +1744,6 @@ static int __init_dma_tx_desc_rings(struct stmmac_priv *priv, u32 queue)
tx_q->tx_skbuff[i] = NULL; tx_q->tx_skbuff[i] = NULL;
} }
tx_q->dirty_tx = 0;
tx_q->cur_tx = 0;
tx_q->mss = 0;
netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, queue));
return 0; return 0;
} }
...@@ -2635,10 +2629,7 @@ static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan) ...@@ -2635,10 +2629,7 @@ static void stmmac_tx_err(struct stmmac_priv *priv, u32 chan)
stmmac_stop_tx_dma(priv, chan); stmmac_stop_tx_dma(priv, chan);
dma_free_tx_skbufs(priv, chan); dma_free_tx_skbufs(priv, chan);
stmmac_clear_tx_descriptors(priv, chan); stmmac_clear_tx_descriptors(priv, chan);
tx_q->dirty_tx = 0; stmmac_reset_tx_queue(priv, chan);
tx_q->cur_tx = 0;
tx_q->mss = 0;
netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, chan));
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan); tx_q->dma_tx_phy, chan);
stmmac_start_tx_dma(priv, chan); stmmac_start_tx_dma(priv, chan);
...@@ -3705,6 +3696,8 @@ static int stmmac_open(struct net_device *dev) ...@@ -3705,6 +3696,8 @@ static int stmmac_open(struct net_device *dev)
goto init_error; goto init_error;
} }
stmmac_reset_queues_param(priv);
ret = stmmac_hw_setup(dev, true); ret = stmmac_hw_setup(dev, true);
if (ret < 0) { if (ret < 0) {
netdev_err(priv->dev, "%s: Hw setup failed\n", __func__); netdev_err(priv->dev, "%s: Hw setup failed\n", __func__);
...@@ -6331,6 +6324,7 @@ void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue) ...@@ -6331,6 +6324,7 @@ void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
return; return;
} }
stmmac_reset_rx_queue(priv, queue);
stmmac_clear_rx_descriptors(priv, queue); stmmac_clear_rx_descriptors(priv, queue);
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
...@@ -6392,6 +6386,7 @@ void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue) ...@@ -6392,6 +6386,7 @@ void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
return; return;
} }
stmmac_reset_tx_queue(priv, queue);
stmmac_clear_tx_descriptors(priv, queue); stmmac_clear_tx_descriptors(priv, queue);
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg, stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
...@@ -7319,24 +7314,16 @@ int stmmac_suspend(struct device *dev) ...@@ -7319,24 +7314,16 @@ int stmmac_suspend(struct device *dev)
} }
EXPORT_SYMBOL_GPL(stmmac_suspend); EXPORT_SYMBOL_GPL(stmmac_suspend);
/** static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)
* stmmac_reset_queues_param - reset queue parameters
* @priv: device pointer
*/
static void stmmac_reset_queues_param(struct stmmac_priv *priv)
{ {
u32 rx_cnt = priv->plat->rx_queues_to_use;
u32 tx_cnt = priv->plat->tx_queues_to_use;
u32 queue;
for (queue = 0; queue < rx_cnt; queue++) {
struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
rx_q->cur_rx = 0; rx_q->cur_rx = 0;
rx_q->dirty_rx = 0; rx_q->dirty_rx = 0;
} }
for (queue = 0; queue < tx_cnt; queue++) { static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue)
{
struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue]; struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
tx_q->cur_tx = 0; tx_q->cur_tx = 0;
...@@ -7344,7 +7331,23 @@ static void stmmac_reset_queues_param(struct stmmac_priv *priv) ...@@ -7344,7 +7331,23 @@ static void stmmac_reset_queues_param(struct stmmac_priv *priv)
tx_q->mss = 0; tx_q->mss = 0;
netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, queue)); netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, queue));
} }
/**
* stmmac_reset_queues_param - reset queue parameters
* @priv: device pointer
*/
static void stmmac_reset_queues_param(struct stmmac_priv *priv)
{
u32 rx_cnt = priv->plat->rx_queues_to_use;
u32 tx_cnt = priv->plat->tx_queues_to_use;
u32 queue;
for (queue = 0; queue < rx_cnt; queue++)
stmmac_reset_rx_queue(priv, queue);
for (queue = 0; queue < tx_cnt; queue++)
stmmac_reset_tx_queue(priv, queue);
} }
/** /**
......
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