Commit fa8110f4 authored by Leon Romanovsky's avatar Leon Romanovsky

net/mlx5: Update rl.c new cmd interface

Do mass update of rl.c to reuse newly introduced
mlx5_cmd_exec_in*() interfaces.
Reviewed-by: default avatarMoshe Shemesh <moshe@mellanox.com>
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
parent 1fb51934
...@@ -39,8 +39,8 @@ ...@@ -39,8 +39,8 @@
int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
void *ctx, u32 *element_id) void *ctx, u32 *element_id)
{ {
u32 in[MLX5_ST_SZ_DW(create_scheduling_element_in)] = {0}; u32 out[MLX5_ST_SZ_DW(create_scheduling_element_in)] = {};
u32 out[MLX5_ST_SZ_DW(create_scheduling_element_in)] = {0}; u32 in[MLX5_ST_SZ_DW(create_scheduling_element_in)] = {};
void *schedc; void *schedc;
int err; int err;
...@@ -52,7 +52,7 @@ int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, ...@@ -52,7 +52,7 @@ int mlx5_create_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
hierarchy); hierarchy);
memcpy(schedc, ctx, MLX5_ST_SZ_BYTES(scheduling_context)); memcpy(schedc, ctx, MLX5_ST_SZ_BYTES(scheduling_context));
err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); err = mlx5_cmd_exec_inout(dev, create_scheduling_element, in, out);
if (err) if (err)
return err; return err;
...@@ -65,8 +65,7 @@ int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, ...@@ -65,8 +65,7 @@ int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
void *ctx, u32 element_id, void *ctx, u32 element_id,
u32 modify_bitmask) u32 modify_bitmask)
{ {
u32 in[MLX5_ST_SZ_DW(modify_scheduling_element_in)] = {0}; u32 in[MLX5_ST_SZ_DW(modify_scheduling_element_in)] = {};
u32 out[MLX5_ST_SZ_DW(modify_scheduling_element_in)] = {0};
void *schedc; void *schedc;
schedc = MLX5_ADDR_OF(modify_scheduling_element_in, in, schedc = MLX5_ADDR_OF(modify_scheduling_element_in, in,
...@@ -81,14 +80,13 @@ int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, ...@@ -81,14 +80,13 @@ int mlx5_modify_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
hierarchy); hierarchy);
memcpy(schedc, ctx, MLX5_ST_SZ_BYTES(scheduling_context)); memcpy(schedc, ctx, MLX5_ST_SZ_BYTES(scheduling_context));
return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); return mlx5_cmd_exec_in(dev, modify_scheduling_element, in);
} }
int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
u32 element_id) u32 element_id)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_scheduling_element_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_scheduling_element_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_scheduling_element_in)] = {0};
MLX5_SET(destroy_scheduling_element_in, in, opcode, MLX5_SET(destroy_scheduling_element_in, in, opcode,
MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT); MLX5_CMD_OP_DESTROY_SCHEDULING_ELEMENT);
...@@ -97,7 +95,7 @@ int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy, ...@@ -97,7 +95,7 @@ int mlx5_destroy_scheduling_element_cmd(struct mlx5_core_dev *dev, u8 hierarchy,
MLX5_SET(destroy_scheduling_element_in, in, scheduling_hierarchy, MLX5_SET(destroy_scheduling_element_in, in, scheduling_hierarchy,
hierarchy); hierarchy);
return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); return mlx5_cmd_exec_in(dev, destroy_scheduling_element, in);
} }
static bool mlx5_rl_are_equal_raw(struct mlx5_rl_entry *entry, void *rl_in, static bool mlx5_rl_are_equal_raw(struct mlx5_rl_entry *entry, void *rl_in,
...@@ -144,8 +142,7 @@ static struct mlx5_rl_entry *find_rl_entry(struct mlx5_rl_table *table, ...@@ -144,8 +142,7 @@ static struct mlx5_rl_entry *find_rl_entry(struct mlx5_rl_table *table,
static int mlx5_set_pp_rate_limit_cmd(struct mlx5_core_dev *dev, static int mlx5_set_pp_rate_limit_cmd(struct mlx5_core_dev *dev,
struct mlx5_rl_entry *entry, bool set) struct mlx5_rl_entry *entry, bool set)
{ {
u32 in[MLX5_ST_SZ_DW(set_pp_rate_limit_in)] = {}; u32 in[MLX5_ST_SZ_DW(set_pp_rate_limit_in)] = {};
u32 out[MLX5_ST_SZ_DW(set_pp_rate_limit_out)] = {};
void *pp_context; void *pp_context;
pp_context = MLX5_ADDR_OF(set_pp_rate_limit_in, in, ctx); pp_context = MLX5_ADDR_OF(set_pp_rate_limit_in, in, ctx);
...@@ -155,7 +152,7 @@ static int mlx5_set_pp_rate_limit_cmd(struct mlx5_core_dev *dev, ...@@ -155,7 +152,7 @@ static int mlx5_set_pp_rate_limit_cmd(struct mlx5_core_dev *dev,
MLX5_SET(set_pp_rate_limit_in, in, rate_limit_index, entry->index); MLX5_SET(set_pp_rate_limit_in, in, rate_limit_index, entry->index);
if (set) if (set)
memcpy(pp_context, entry->rl_raw, sizeof(entry->rl_raw)); memcpy(pp_context, entry->rl_raw, sizeof(entry->rl_raw));
return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); return mlx5_cmd_exec_in(dev, set_pp_rate_limit, in);
} }
bool mlx5_rl_is_in_range(struct mlx5_core_dev *dev, u32 rate) bool mlx5_rl_is_in_range(struct mlx5_core_dev *dev, u32 rate)
......
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