Commit fb3447d5 authored by Stefan Binding's avatar Stefan Binding Committed by Takashi Iwai

ALSA: hda/cirrus: Add error handling into CS8409 I2C functions

Also removing 2 redundant cs8409_i2c_read() calls, as we already did read
them in a code above.

Tested on DELL Inspiron-3505, DELL Inspiron-3501, DELL Inspiron-3500
Signed-off-by: default avatarStefan Binding <sbinding@opensource.cirrus.com>
Signed-off-by: default avatarVitaly Rodionov <vitalyr@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20210315190716.47686-2-vitalyr@opensource.cirrus.comSigned-off-by: default avatarTakashi Iwai <tiwai@suse.de>
parent 9c896eec
...@@ -1493,22 +1493,34 @@ static const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { ...@@ -1493,22 +1493,34 @@ static const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = {
{} /* Terminator */ {} /* Terminator */
}; };
/* Enable I2C clocks */ /**
static void cs8409_enable_i2c_clock(struct hda_codec *codec, unsigned int flag) * cs8409_enable_i2c_clock - Enable I2C clocks
* @codec: the codec instance
* @enable: Enable or disable I2C clocks
*
* Enable or Disable I2C clocks.
*/
static void cs8409_enable_i2c_clock(struct hda_codec *codec, unsigned int enable)
{ {
unsigned int retval = 0; unsigned int retval = 0;
unsigned int newval = 0; unsigned int newval = 0;
retval = cs_vendor_coef_get(codec, 0x0); retval = cs_vendor_coef_get(codec, 0x0);
newval = (flag) ? (retval | 0x8) : (retval & 0xfffffff7); newval = (enable) ? (retval | 0x8) : (retval & 0xfffffff7);
cs_vendor_coef_set(codec, 0x0, newval); cs_vendor_coef_set(codec, 0x0, newval);
} }
/* Wait I2C transaction */ /**
* cs8409_i2c_wait_complete - Wait for I2C transaction
* @codec: the codec instance
*
* Wait for I2C transaction to complete.
* Return -1 if transaction wait times out.
*/
static int cs8409_i2c_wait_complete(struct hda_codec *codec) static int cs8409_i2c_wait_complete(struct hda_codec *codec)
{ {
int repeat = 5; int repeat = 5;
unsigned int retval = 0; unsigned int retval;
do { do {
retval = cs_vendor_coef_get(codec, CIR_I2C_STATUS); retval = cs_vendor_coef_get(codec, CIR_I2C_STATUS);
...@@ -1516,82 +1528,103 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec) ...@@ -1516,82 +1528,103 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec)
usleep_range(2000, 4000); usleep_range(2000, 4000);
--repeat; --repeat;
} else } else
break; return 0;
} while (repeat); } while (repeat);
return repeat > 0 ? 0 : -1; return -1;
} }
/* CS8409 slave i2cRead */ /**
static unsigned int cs8409_i2c_read(struct hda_codec *codec, * cs8409_i2c_read - CS8409 I2C Read.
* @codec: the codec instance
* @i2c_address: I2C Address
* @i2c_reg: Register to read
* @paged: Is a paged transaction
*
* CS8409 I2C Read.
* Returns negative on error, otherwise returns read value in bits 0-7.
*/
static int cs8409_i2c_read(struct hda_codec *codec,
unsigned int i2c_address, unsigned int i2c_address,
unsigned int i2c_reg, unsigned int i2c_reg,
unsigned int paged) unsigned int paged)
{ {
unsigned int i2c_reg_data; unsigned int i2c_reg_data;
unsigned int retval = 0; unsigned int read_data;
cs8409_enable_i2c_clock(codec, 1); cs8409_enable_i2c_clock(codec, 1);
cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address);
if (paged) { if (paged) {
cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8);
if (cs8409_i2c_wait_complete(codec) == -1) { if (cs8409_i2c_wait_complete(codec) < 0) {
codec_err(codec, codec_err(codec,
"%s() Paged Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
__func__, i2c_address, i2c_reg, retval); __func__, i2c_address, i2c_reg);
return -EIO;
} }
} }
i2c_reg_data = (i2c_reg << 8) & 0x0ffff; i2c_reg_data = (i2c_reg << 8) & 0x0ffff;
cs_vendor_coef_set(codec, CIR_I2C_QREAD, i2c_reg_data); cs_vendor_coef_set(codec, CIR_I2C_QREAD, i2c_reg_data);
if (cs8409_i2c_wait_complete(codec) == -1) { if (cs8409_i2c_wait_complete(codec) < 0) {
codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
__func__, i2c_address, i2c_reg, retval); __func__, i2c_address, i2c_reg);
return -EIO;
} }
/* Register in bits 15-8 and the data in 7-0 */ /* Register in bits 15-8 and the data in 7-0 */
retval = cs_vendor_coef_get(codec, CIR_I2C_QREAD); read_data = cs_vendor_coef_get(codec, CIR_I2C_QREAD);
retval &= 0x0ff;
cs8409_enable_i2c_clock(codec, 0); cs8409_enable_i2c_clock(codec, 0);
return retval; return read_data & 0x0ff;
} }
/* CS8409 slave i2cWrite */ /**
static unsigned int cs8409_i2c_write(struct hda_codec *codec, * cs8409_i2c_write - CS8409 I2C Write.
* @codec: the codec instance
* @i2c_address: I2C Address
* @i2c_reg: Register to write to
* @i2c_data: Data to write
* @paged: Is a paged transaction
*
* CS8409 I2C Write.
* Returns negative on error, otherwise returns 0.
*/
static int cs8409_i2c_write(struct hda_codec *codec,
unsigned int i2c_address, unsigned int i2c_reg, unsigned int i2c_address, unsigned int i2c_reg,
unsigned int i2c_data, unsigned int i2c_data,
unsigned int paged) unsigned int paged)
{ {
unsigned int retval = 0; unsigned int i2c_reg_data;
unsigned int i2c_reg_data = 0;
cs8409_enable_i2c_clock(codec, 1); cs8409_enable_i2c_clock(codec, 1);
cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); cs_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address);
if (paged) { if (paged) {
cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8);
if (cs8409_i2c_wait_complete(codec) == -1) { if (cs8409_i2c_wait_complete(codec) < 0) {
codec_err(codec, codec_err(codec,
"%s() Paged Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", "%s() Paged Transaction Failed 0x%02x : 0x%04x\n",
__func__, i2c_address, i2c_reg, retval); __func__, i2c_address, i2c_reg);
return -EIO;
} }
} }
i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff); i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff);
cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg_data); cs_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg_data);
if (cs8409_i2c_wait_complete(codec) == -1) { if (cs8409_i2c_wait_complete(codec) < 0) {
codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x = 0x%02x\n", codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n",
__func__, i2c_address, i2c_reg, retval); __func__, i2c_address, i2c_reg);
return -EIO;
} }
cs8409_enable_i2c_clock(codec, 0); cs8409_enable_i2c_clock(codec, 0);
return retval; return 0;
} }
static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol, static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol,
...@@ -1624,14 +1657,27 @@ static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol, ...@@ -1624,14 +1657,27 @@ static int cs8409_cs42l42_volume_info(struct snd_kcontrol *kcontrol,
static void cs8409_cs42l42_update_volume(struct hda_codec *codec) static void cs8409_cs42l42_update_volume(struct hda_codec *codec)
{ {
struct cs_spec *spec = codec->spec; struct cs_spec *spec = codec->spec;
int data;
mutex_lock(&spec->cs8409_i2c_mux); mutex_lock(&spec->cs8409_i2c_mux);
spec->cs42l42_hp_volume[0] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
CS8409_CS42L42_REG_HS_VOLUME_CHA, 1)); CS8409_CS42L42_REG_HS_VOLUME_CHA, 1);
spec->cs42l42_hp_volume[1] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, if (data >= 0)
CS8409_CS42L42_REG_HS_VOLUME_CHB, 1)); spec->cs42l42_hp_volume[0] = -data;
spec->cs42l42_hs_mic_volume[0] = -(cs8409_i2c_read(codec, CS42L42_I2C_ADDR, else
CS8409_CS42L42_REG_AMIC_VOLUME, 1)); spec->cs42l42_hp_volume[0] = CS8409_CS42L42_HP_VOL_REAL_MIN;
data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
CS8409_CS42L42_REG_HS_VOLUME_CHB, 1);
if (data >= 0)
spec->cs42l42_hp_volume[1] = -data;
else
spec->cs42l42_hp_volume[1] = CS8409_CS42L42_HP_VOL_REAL_MIN;
data = cs8409_i2c_read(codec, CS42L42_I2C_ADDR,
CS8409_CS42L42_REG_AMIC_VOLUME, 1);
if (data >= 0)
spec->cs42l42_hs_mic_volume[0] = -data;
else
spec->cs42l42_hs_mic_volume[0] = CS8409_CS42L42_AMIC_VOL_REAL_MIN;
mutex_unlock(&spec->cs8409_i2c_mux); mutex_unlock(&spec->cs8409_i2c_mux);
spec->cs42l42_volume_init = 1; spec->cs42l42_volume_init = 1;
} }
...@@ -1782,7 +1828,7 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec) ...@@ -1782,7 +1828,7 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec)
} }
/* Configure CS42L42 slave codec for jack autodetect */ /* Configure CS42L42 slave codec for jack autodetect */
static int cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec)
{ {
struct cs_spec *spec = codec->spec; struct cs_spec *spec = codec->spec;
...@@ -1804,8 +1850,6 @@ static int cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) ...@@ -1804,8 +1850,6 @@ static int cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec)
cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b79, 0x00, 1); cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b79, 0x00, 1);
mutex_unlock(&spec->cs8409_i2c_mux); mutex_unlock(&spec->cs8409_i2c_mux);
return 0;
} }
/* Enable and run CS42L42 slave codec jack auto detect */ /* Enable and run CS42L42 slave codec jack auto detect */
...@@ -1860,9 +1904,9 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) ...@@ -1860,9 +1904,9 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
{ {
struct cs_spec *spec = codec->spec; struct cs_spec *spec = codec->spec;
int status_changed = 0; int status_changed = 0;
unsigned int reg_cdc_status = 0; int reg_cdc_status;
unsigned int reg_hs_status = 0; int reg_hs_status;
unsigned int reg_ts_status = 0; int reg_ts_status;
int type = 0; int type = 0;
struct hda_jack_tbl *jk; struct hda_jack_tbl *jk;
...@@ -1881,13 +1925,15 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) ...@@ -1881,13 +1925,15 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res)
reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124, 1); reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124, 1);
reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1);
/* Clear interrupts */ /* Clear interrupts, by reading interrupt status registers */
cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1); cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1);
cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1);
cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1);
mutex_unlock(&spec->cs8409_i2c_mux); mutex_unlock(&spec->cs8409_i2c_mux);
/* If status values are < 0, read error has occurred. */
if (reg_cdc_status < 0 || reg_hs_status < 0 || reg_ts_status < 0)
return;
/* HSDET_AUTO_DONE */ /* HSDET_AUTO_DONE */
if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) { if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) {
......
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