Commit fd1d9e2d authored by Dario Binacchi's avatar Dario Binacchi Committed by Jyri Sarha

drm/tilcdc: fix LCD pixel clock setting

The tilcdc_pclk_diff() compares the requested pixel clock rate to the
real one, so passing it clk_rate instead of clk_rate / clkdiv caused
it to fail even if the clk_rate was properly set. Adding the
real_pclk_rate variable makes the code more readable.
Signed-off-by: default avatarDario Binacchi <dariobin@libero.it>
Reviewed-by: default avatarJyri Sarha <jyri.sarha@iki.fi>
Reviewed-by: default avatarTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: default avatarJyri Sarha <jyri.sarha@iki.fi>
Link: https://patchwork.freedesktop.org/patch/msgid/20210322213337.26667-3-dariobin@libero.it
parent e17d1364
...@@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ...@@ -203,7 +203,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_drm_private *priv = dev->dev_private;
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
unsigned long clk_rate, real_rate, pclk_rate; unsigned long clk_rate, real_rate, real_pclk_rate, pclk_rate;
unsigned int clkdiv; unsigned int clkdiv;
int ret; int ret;
...@@ -214,7 +214,8 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ...@@ -214,7 +214,8 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
ret = clk_set_rate(priv->clk, pclk_rate * clkdiv); ret = clk_set_rate(priv->clk, pclk_rate * clkdiv);
clk_rate = clk_get_rate(priv->clk); clk_rate = clk_get_rate(priv->clk);
if (ret < 0 || tilcdc_pclk_diff(pclk_rate, clk_rate) > 5) { real_pclk_rate = clk_rate / clkdiv;
if (ret < 0 || tilcdc_pclk_diff(pclk_rate, real_pclk_rate) > 5) {
/* /*
* If we fail to set the clock rate (some architectures don't * If we fail to set the clock rate (some architectures don't
* use the common clock framework yet and may not implement * use the common clock framework yet and may not implement
......
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