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Commit fd5ada04 authored by Martin Schwidefsky's avatar Martin Schwidefsky
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s390/time: remove ETR support 

The External-Time-Reference (ETR) clock synchronization interface has
been superseded by Server-Time-Protocol (STP). Remove the outdated
ETR interface.
Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
parent 936cc855
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arch/s390/include/asm/etr.h deleted 100644 → 0
View file @ 936cc855
/*
* Copyright IBM Corp. 2006
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
*/
#ifndef __S390_ETR_H
#define __S390_ETR_H
/* ETR attachment control register */
struct etr_eacr {
unsigned int e0 : 1; /* port 0 stepping control */
unsigned int e1 : 1; /* port 1 stepping control */
unsigned int _pad0 : 5; /* must be 00100 */
unsigned int dp : 1; /* data port control */
unsigned int p0 : 1; /* port 0 change recognition control */
unsigned int p1 : 1; /* port 1 change recognition control */
unsigned int _pad1 : 3; /* must be 000 */
unsigned int ea : 1; /* ETR alert control */
unsigned int es : 1; /* ETR sync check control */
unsigned int sl : 1; /* switch to local control */
} __attribute__ ((packed));
/* Port state returned by steai */
enum etr_psc {
etr_psc_operational = 0,
etr_psc_semi_operational = 1,
etr_psc_protocol_error = 4,
etr_psc_no_symbols = 8,
etr_psc_no_signal = 12,
etr_psc_pps_mode = 13
};
/* Logical port state returned by stetr */
enum etr_lpsc {
etr_lpsc_operational_step = 0,
etr_lpsc_operational_alt = 1,
etr_lpsc_semi_operational = 2,
etr_lpsc_protocol_error = 4,
etr_lpsc_no_symbol_sync = 8,
etr_lpsc_no_signal = 12,
etr_lpsc_pps_mode = 13
};
/* ETR status words */
struct etr_esw {
struct etr_eacr eacr; /* attachment control register */
unsigned int y : 1; /* stepping mode */
unsigned int _pad0 : 5; /* must be 00000 */
unsigned int p : 1; /* stepping port number */
unsigned int q : 1; /* data port number */
unsigned int psc0 : 4; /* port 0 state code */
unsigned int psc1 : 4; /* port 1 state code */
} __attribute__ ((packed));
/* Second level data register status word */
struct etr_slsw {
unsigned int vv1 : 1; /* copy of validity bit data frame 1 */
unsigned int vv2 : 1; /* copy of validity bit data frame 2 */
unsigned int vv3 : 1; /* copy of validity bit data frame 3 */
unsigned int vv4 : 1; /* copy of validity bit data frame 4 */
unsigned int _pad0 : 19; /* must by all zeroes */
unsigned int n : 1; /* EAF port number */
unsigned int v1 : 1; /* validity bit ETR data frame 1 */
unsigned int v2 : 1; /* validity bit ETR data frame 2 */
unsigned int v3 : 1; /* validity bit ETR data frame 3 */
unsigned int v4 : 1; /* validity bit ETR data frame 4 */
unsigned int _pad1 : 4; /* must be 0000 */
} __attribute__ ((packed));
/* ETR data frames */
struct etr_edf1 {
unsigned int u : 1; /* untuned bit */
unsigned int _pad0 : 1; /* must be 0 */
unsigned int r : 1; /* service request bit */
unsigned int _pad1 : 4; /* must be 0000 */
unsigned int a : 1; /* time adjustment bit */
unsigned int net_id : 8; /* ETR network id */
unsigned int etr_id : 8; /* id of ETR which sends data frames */
unsigned int etr_pn : 8; /* port number of ETR output port */
} __attribute__ ((packed));
struct etr_edf2 {
unsigned int etv : 32; /* Upper 32 bits of TOD. */
} __attribute__ ((packed));
struct etr_edf3 {
unsigned int rc : 8; /* failure reason code */
unsigned int _pad0 : 3; /* must be 000 */
unsigned int c : 1; /* ETR coupled bit */
unsigned int tc : 4; /* ETR type code */
unsigned int blto : 8; /* biased local time offset */
/* (blto - 128) * 15 = minutes */
unsigned int buo : 8; /* biased utc offset */
/* (buo - 128) = leap seconds */
} __attribute__ ((packed));
struct etr_edf4 {
unsigned int ed : 8; /* ETS device dependent data */
unsigned int _pad0 : 1; /* must be 0 */
unsigned int buc : 5; /* biased ut1 correction */
/* (buc - 16) * 0.1 seconds */
unsigned int em : 6; /* ETS error magnitude */
unsigned int dc : 6; /* ETS drift code */
unsigned int sc : 6; /* ETS steering code */
} __attribute__ ((packed));
/*
* ETR attachment information block, two formats
* format 1 has 4 reserved words with a size of 64 bytes
* format 2 has 16 reserved words with a size of 96 bytes
*/
struct etr_aib {
struct etr_esw esw;
struct etr_slsw slsw;
unsigned long long tsp;
struct etr_edf1 edf1;
struct etr_edf2 edf2;
struct etr_edf3 edf3;
struct etr_edf4 edf4;
unsigned int reserved[16];
} __attribute__ ((packed,aligned(8)));
/* ETR interruption parameter */
struct etr_irq_parm {
unsigned int _pad0 : 8;
unsigned int pc0 : 1; /* port 0 state change */
unsigned int pc1 : 1; /* port 1 state change */
unsigned int _pad1 : 3;
unsigned int eai : 1; /* ETR alert indication */
unsigned int _pad2 : 18;
} __attribute__ ((packed));
/* Inline assembly helper functions */
static inline int etr_setr(struct etr_eacr *ctrl)
{
int rc = -EOPNOTSUPP;
asm volatile(
" .insn s,0xb2160000,%1\n"
"0: la %0,0\n"
"1:\n"
EX_TABLE(0b,1b)
: "+d" (rc) : "Q" (*ctrl));
return rc;
}
/* Stores a format 1 aib with 64 bytes */
static inline int etr_stetr(struct etr_aib *aib)
{
int rc = -EOPNOTSUPP;
asm volatile(
" .insn s,0xb2170000,%1\n"
"0: la %0,0\n"
"1:\n"
EX_TABLE(0b,1b)
: "+d" (rc) : "Q" (*aib));
return rc;
}
/* Stores a format 2 aib with 96 bytes for specified port */
static inline int etr_steai(struct etr_aib *aib, unsigned int func)
{
register unsigned int reg0 asm("0") = func;
int rc = -EOPNOTSUPP;
asm volatile(
" .insn s,0xb2b30000,%1\n"
"0: la %0,0\n"
"1:\n"
EX_TABLE(0b,1b)
: "+d" (rc) : "Q" (*aib), "d" (reg0));
return rc;
}
/* Function codes for the steai instruction. */
#define ETR_STEAI_STEPPING_PORT 0x10
#define ETR_STEAI_ALTERNATE_PORT 0x11
#define ETR_STEAI_PORT_0 0x12
#define ETR_STEAI_PORT_1 0x13
/* Functions needed by the machine check handler */
int etr_switch_to_local(void);
int etr_sync_check(void);
void etr_queue_work(void);
/* notifier for syncs */
extern struct atomic_notifier_head s390_epoch_delta_notifier;
/* STP interruption parameter */
struct stp_irq_parm {
unsigned int _pad0 : 14;
unsigned int tsc : 1; /* Timing status change */
unsigned int lac : 1; /* Link availability change */
unsigned int tcpc : 1; /* Time control parameter change */
unsigned int _pad2 : 15;
} __attribute__ ((packed));
#define STP_OP_SYNC 1
#define STP_OP_CTRL 3
struct stp_sstpi {
unsigned int rsvd0;
unsigned int rsvd1 : 8;
unsigned int stratum : 8;
unsigned int vbits : 16;
unsigned int leaps : 16;
unsigned int tmd : 4;
unsigned int ctn : 4;
unsigned int rsvd2 : 3;
unsigned int c : 1;
unsigned int tst : 4;
unsigned int tzo : 16;
unsigned int dsto : 16;
unsigned int ctrl : 16;
unsigned int rsvd3 : 16;
unsigned int tto;
unsigned int rsvd4;
unsigned int ctnid[3];
unsigned int rsvd5;
unsigned int todoff[4];
unsigned int rsvd6[48];
} __attribute__ ((packed));
/* Functions needed by the machine check handler */
int stp_sync_check(void);
int stp_island_check(void);
void stp_queue_work(void);
#endif /* __S390_ETR_H */
arch/s390/include/asm/stp.h 0 → 100644
View file @ fd5ada04
/*
* Copyright IBM Corp. 2006
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
*/
#ifndef __S390_STP_H
#define __S390_STP_H
/* notifier for syncs */
extern struct atomic_notifier_head s390_epoch_delta_notifier;
/* STP interruption parameter */
struct stp_irq_parm {
unsigned int _pad0 : 14;
unsigned int tsc : 1; /* Timing status change */
unsigned int lac : 1; /* Link availability change */
unsigned int tcpc : 1; /* Time control parameter change */
unsigned int _pad2 : 15;
} __attribute__ ((packed));
#define STP_OP_SYNC 1
#define STP_OP_CTRL 3
struct stp_sstpi {
unsigned int rsvd0;
unsigned int rsvd1 : 8;
unsigned int stratum : 8;
unsigned int vbits : 16;
unsigned int leaps : 16;
unsigned int tmd : 4;
unsigned int ctn : 4;
unsigned int rsvd2 : 3;
unsigned int c : 1;
unsigned int tst : 4;
unsigned int tzo : 16;
unsigned int dsto : 16;
unsigned int ctrl : 16;
unsigned int rsvd3 : 16;
unsigned int tto;
unsigned int rsvd4;
unsigned int ctnid[3];
unsigned int rsvd5;
unsigned int todoff[4];
unsigned int rsvd6[48];
} __attribute__ ((packed));
/* Functions needed by the machine check handler */
int stp_sync_check(void);
int stp_island_check(void);
void stp_queue_work(void);
#endif /* __S390_STP_H */
arch/s390/kernel/nmi.c
View file @ fd5ada04
......@@ -16,7 +16,7 @@
#include <linux/module.h>
#include <asm/lowcore.h>
#include <asm/smp.h>
#include <asm/etr.h>
#include <asm/stp.h>
#include <asm/cputime.h>
#include <asm/nmi.h>
#include <asm/crw.h>
......@@ -27,7 +27,6 @@ struct mcck_struct {
unsigned int kill_task : 1;
unsigned int channel_report : 1;
unsigned int warning : 1;
unsigned int etr_queue : 1;
unsigned int stp_queue : 1;
unsigned long mcck_code;
};
......@@ -82,8 +81,6 @@ void s390_handle_mcck(void)
if (xchg(&mchchk_wng_posted, 1) == 0)
kill_cad_pid(SIGPWR, 1);
}
if (mcck.etr_queue)
etr_queue_work();
if (mcck.stp_queue)
stp_queue_work();
if (mcck.kill_task) {
......@@ -241,8 +238,6 @@ static int notrace s390_validate_registers(union mci mci)
#define ED_STP_ISLAND 6 /* External damage STP island check */
#define ED_STP_SYNC 7 /* External damage STP sync check */
#define ED_ETR_SYNC 12 /* External damage ETR sync check */
#define ED_ETR_SWITCH 13 /* External damage ETR switch to local */
/*
* machine check handler.
......@@ -325,15 +320,11 @@ void notrace s390_do_machine_check(struct pt_regs *regs)
}
if (mci.ed && mci.ec) {
/* External damage */
if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC))
mcck->etr_queue |= etr_sync_check();
if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH))
mcck->etr_queue |= etr_switch_to_local();
if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
mcck->stp_queue |= stp_sync_check();
if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
mcck->stp_queue |= stp_island_check();
if (mcck->etr_queue || mcck->stp_queue)
if (mcck->stp_queue)
set_cpu_flag(CIF_MCCK_PENDING);
}
if (mci.se)
......
arch/s390/kernel/time.c
View file @ fd5ada04
......@@ -46,7 +46,7 @@
#include <asm/irq.h>
#include <asm/irq_regs.h>
#include <asm/vtimer.h>
#include <asm/etr.h>
#include <asm/stp.h>
#include <asm/cio.h>
#include "entry.h"
......@@ -189,20 +189,16 @@ static void clock_comparator_interrupt(struct ext_code ext_code,
set_clock_comparator(S390_lowcore.clock_comparator);
}
static void etr_timing_alert(struct etr_irq_parm *);
static void stp_timing_alert(struct stp_irq_parm *);
static void timing_alert_interrupt(struct ext_code ext_code,
unsigned int param32, unsigned long param64)
{
inc_irq_stat(IRQEXT_TLA);
if (param32 & 0x00c40000)
etr_timing_alert((struct etr_irq_parm *) &param32);
if (param32 & 0x00038000)
stp_timing_alert((struct stp_irq_parm *) &param32);
}
static void etr_reset(void);
static void stp_reset(void);
void read_persistent_clock64(struct timespec64 *ts)
......@@ -302,7 +298,6 @@ void update_vsyscall_tz(void)
void __init time_init(void)
{
/* Reset time synchronization interfaces. */
etr_reset();
stp_reset();
/* request the clock comparator external interrupt */
......@@ -449,301 +444,6 @@ static void __init time_init_wq(void)
time_sync_wq = create_singlethread_workqueue("timesync");
}
/*
* External Time Reference (ETR) code.
*/
static int etr_port0_online;
static int etr_port1_online;
static int etr_steai_available;
static int __init early_parse_etr(char *p)
{
if (strncmp(p, "off", 3) == 0)
etr_port0_online = etr_port1_online = 0;
else if (strncmp(p, "port0", 5) == 0)
etr_port0_online = 1;
else if (strncmp(p, "port1", 5) == 0)
etr_port1_online = 1;
else if (strncmp(p, "on", 2) == 0)
etr_port0_online = etr_port1_online = 1;
return 0;
}
early_param("etr", early_parse_etr);
enum etr_event {
ETR_EVENT_PORT0_CHANGE,
ETR_EVENT_PORT1_CHANGE,
ETR_EVENT_PORT_ALERT,
ETR_EVENT_SYNC_CHECK,
ETR_EVENT_SWITCH_LOCAL,
ETR_EVENT_UPDATE,
};
/*
* Valid bit combinations of the eacr register are (x = don't care):
* e0 e1 dp p0 p1 ea es sl
* 0 0 x 0 0 0 0 0 initial, disabled state
* 0 0 x 0 1 1 0 0 port 1 online
* 0 0 x 1 0 1 0 0 port 0 online
* 0 0 x 1 1 1 0 0 both ports online
* 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
* 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
* 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
* 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
* 0 1 x 1 1 1 0 0 both ports online, port 1 usable
* 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
* 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
* 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
* 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
* 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
* 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
* 1 0 x 1 1 1 0 0 both ports online, port 0 usable
* 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
* 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
* 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
* 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
*/
static struct etr_eacr etr_eacr;
static u64 etr_tolec; /* time of last eacr update */
static struct etr_aib etr_port0;
static int etr_port0_uptodate;
static struct etr_aib etr_port1;
static int etr_port1_uptodate;
static unsigned long etr_events;
static struct timer_list etr_timer;
static void etr_timeout(unsigned long dummy);
static void etr_work_fn(struct work_struct *work);
static DEFINE_MUTEX(etr_work_mutex);
static DECLARE_WORK(etr_work, etr_work_fn);
/*
* Reset ETR attachment.
*/
static void etr_reset(void)
{
etr_eacr = (struct etr_eacr) {
.e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
.p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
.es = 0, .sl = 0 };
if (etr_setr(&etr_eacr) == 0) {
etr_tolec = get_tod_clock();
set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
if (etr_port0_online && etr_port1_online)
set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
} else if (etr_port0_online || etr_port1_online) {
pr_warn("The real or virtual hardware system does not provide an ETR interface\n");
etr_port0_online = etr_port1_online = 0;
}
}
static int __init etr_init(void)
{
struct etr_aib aib;
if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
return 0;
time_init_wq();
/* Check if this machine has the steai instruction. */
if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
etr_steai_available = 1;
setup_timer(&etr_timer, etr_timeout, 0UL);
if (etr_port0_online) {
set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
queue_work(time_sync_wq, &etr_work);
}
if (etr_port1_online) {
set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
queue_work(time_sync_wq, &etr_work);
}
return 0;
}
arch_initcall(etr_init);
/*
* Two sorts of ETR machine checks. The architecture reads:
* "When a machine-check niterruption occurs and if a switch-to-local or
* ETR-sync-check interrupt request is pending but disabled, this pending
* disabled interruption request is indicated and is cleared".
* Which means that we can get etr_switch_to_local events from the machine
* check handler although the interruption condition is disabled. Lovely..
*/
/*
* Switch to local machine check. This is called when the last usable
* ETR port goes inactive. After switch to local the clock is not in sync.
*/
int etr_switch_to_local(void)
{
if (!etr_eacr.sl)
return 0;
disable_sync_clock(NULL);
if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
etr_eacr.es = etr_eacr.sl = 0;
etr_setr(&etr_eacr);
return 1;
}
return 0;
}
/*
* ETR sync check machine check. This is called when the ETR OTE and the
* local clock OTE are farther apart than the ETR sync check tolerance.
* After a ETR sync check the clock is not in sync. The machine check
* is broadcasted to all cpus at the same time.
*/
int etr_sync_check(void)
{
if (!etr_eacr.es)
return 0;
disable_sync_clock(NULL);
if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
etr_eacr.es = 0;
etr_setr(&etr_eacr);
return 1;
}
return 0;
}
void etr_queue_work(void)
{
queue_work(time_sync_wq, &etr_work);
}
/*
* ETR timing alert. There are two causes:
* 1) port state change, check the usability of the port
* 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
* sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
* or ETR-data word 4 (edf4) has changed.
*/
static void etr_timing_alert(struct etr_irq_parm *intparm)
{
if (intparm->pc0)
/* ETR port 0 state change. */
set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
if (intparm->pc1)
/* ETR port 1 state change. */
set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
if (intparm->eai)
/*
* ETR port alert on either port 0, 1 or both.
* Both ports are not up-to-date now.
*/
set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
queue_work(time_sync_wq, &etr_work);
}
static void etr_timeout(unsigned long dummy)
{
set_bit(ETR_EVENT_UPDATE, &etr_events);
queue_work(time_sync_wq, &etr_work);
}
/*
* Check if the etr mode is pss.
*/
static inline int etr_mode_is_pps(struct etr_eacr eacr)
{
return eacr.es && !eacr.sl;
}
/*
* Check if the etr mode is etr.
*/
static inline int etr_mode_is_etr(struct etr_eacr eacr)
{
return eacr.es && eacr.sl;
}
/*
* Check if the port can be used for TOD synchronization.
* For PPS mode the port has to receive OTEs. For ETR mode
* the port has to receive OTEs, the ETR stepping bit has to
* be zero and the validity bits for data frame 1, 2, and 3
* have to be 1.
*/
static int etr_port_valid(struct etr_aib *aib, int port)
{
unsigned int psc;
/* Check that this port is receiving OTEs. */
if (aib->tsp == 0)
return 0;
psc = port ? aib->esw.psc1 : aib->esw.psc0;
if (psc == etr_lpsc_pps_mode)
return 1;
if (psc == etr_lpsc_operational_step)
return !aib->esw.y && aib->slsw.v1 &&
aib->slsw.v2 && aib->slsw.v3;
return 0;
}
/*
* Check if two ports are on the same network.
*/
static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
{
// FIXME: any other fields we have to compare?
return aib1->edf1.net_id == aib2->edf1.net_id;
}
/*
* Wrapper for etr_stei that converts physical port states
* to logical port states to be consistent with the output
* of stetr (see etr_psc vs. etr_lpsc).
*/
static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
{
BUG_ON(etr_steai(aib, func) != 0);
/* Convert port state to logical port state. */
if (aib->esw.psc0 == 1)
aib->esw.psc0 = 2;
else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
aib->esw.psc0 = 1;
if (aib->esw.psc1 == 1)
aib->esw.psc1 = 2;
else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
aib->esw.psc1 = 1;
}
/*
* Check if the aib a2 is still connected to the same attachment as
* aib a1, the etv values differ by one and a2 is valid.
*/
static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
{
int state_a1, state_a2;
/* Paranoia check: e0/e1 should better be the same. */
if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
a1->esw.eacr.e1 != a2->esw.eacr.e1)
return 0;
/* Still connected to the same etr ? */
state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
if (state_a1 == etr_lpsc_operational_step) {
if (state_a2 != etr_lpsc_operational_step ||
a1->edf1.net_id != a2->edf1.net_id ||
a1->edf1.etr_id != a2->edf1.etr_id ||
a1->edf1.etr_pn != a2->edf1.etr_pn)
return 0;
} else if (state_a2 != etr_lpsc_pps_mode)
return 0;
/* The ETV value of a2 needs to be ETV of a1 + 1. */
if (a1->edf2.etv + 1 != a2->edf2.etv)
return 0;
if (!etr_port_valid(a2, p))
return 0;
return 1;
}
struct clock_sync_data {
atomic_t cpus;
int in_sync;
......@@ -780,693 +480,6 @@ static void clock_sync_cpu(struct clock_sync_data *sync)
fixup_clock_comparator(sync->fixup_cc);
}
/*
* Sync the TOD clock using the port referred to by aibp. This port
* has to be enabled and the other port has to be disabled. The
* last eacr update has to be more than 1.6 seconds in the past.
*/
static int etr_sync_clock(void *data)
{
static int first;
unsigned long long clock, old_clock, clock_delta, delay, delta;
struct clock_sync_data *etr_sync;
struct etr_aib *sync_port, *aib;
struct ptff_qto qto;
int port;
int rc;
etr_sync = data;
if (xchg(&first, 1) == 1) {
/* Slave */
clock_sync_cpu(etr_sync);
return 0;
}
/* Wait until all other cpus entered the sync function. */
while (atomic_read(&etr_sync->cpus) != 0)
cpu_relax();
port = etr_sync->etr_port;
aib = etr_sync->etr_aib;
sync_port = (port == 0) ? &etr_port0 : &etr_port1;
enable_sync_clock();
/* Set clock to next OTE. */
__ctl_set_bit(14, 21);
__ctl_set_bit(0, 29);
clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
old_clock = get_tod_clock();
if (set_tod_clock(clock) == 0) {
__udelay(1); /* Wait for the clock to start. */
__ctl_clear_bit(0, 29);
__ctl_clear_bit(14, 21);
etr_stetr(aib);
/* Adjust Linux timing variables. */
delay = (unsigned long long)
(aib->edf2.etv - sync_port->edf2.etv) << 32;
delta = adjust_time(old_clock, clock, delay);
clock_delta = clock - old_clock;
atomic_notifier_call_chain(&s390_epoch_delta_notifier, 0,
&clock_delta);
etr_sync->fixup_cc = delta;
fixup_clock_comparator(delta);
/* Verify that the clock is properly set. */
if (!etr_aib_follows(sync_port, aib, port)) {
/* Didn't work. */
disable_sync_clock(NULL);
etr_sync->in_sync = -EAGAIN;
rc = -EAGAIN;
} else {
if (ptff_query(PTFF_QTO) &&
ptff(&qto, sizeof(qto), PTFF_QTO) == 0)
/* Update LPAR offset */
lpar_offset = qto.tod_epoch_difference;
etr_sync->in_sync = 1;
rc = 0;
}
} else {
/* Could not set the clock ?!? */
__ctl_clear_bit(0, 29);
__ctl_clear_bit(14, 21);
disable_sync_clock(NULL);
etr_sync->in_sync = -EAGAIN;
rc = -EAGAIN;
}
xchg(&first, 0);
return rc;
}
static int etr_sync_clock_stop(struct etr_aib *aib, int port)
{
struct clock_sync_data etr_sync;
struct etr_aib *sync_port;
int follows;
int rc;
/* Check if the current aib is adjacent to the sync port aib. */
sync_port = (port == 0) ? &etr_port0 : &etr_port1;
follows = etr_aib_follows(sync_port, aib, port);
memcpy(sync_port, aib, sizeof(*aib));
if (!follows)
return -EAGAIN;
memset(&etr_sync, 0, sizeof(etr_sync));
etr_sync.etr_aib = aib;
etr_sync.etr_port = port;
get_online_cpus();
atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
put_online_cpus();
return rc;
}
/*
* Handle the immediate effects of the different events.
* The port change event is used for online/offline changes.
*/
static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
{
if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
eacr.es = 0;
if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
eacr.es = eacr.sl = 0;
if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
etr_port0_uptodate = etr_port1_uptodate = 0;
if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
if (eacr.e0)
/*
* Port change of an enabled port. We have to
* assume that this can have caused an stepping
* port switch.
*/
etr_tolec = get_tod_clock();
eacr.p0 = etr_port0_online;
if (!eacr.p0)
eacr.e0 = 0;
etr_port0_uptodate = 0;
}
if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
if (eacr.e1)
/*
* Port change of an enabled port. We have to
* assume that this can have caused an stepping
* port switch.
*/
etr_tolec = get_tod_clock();
eacr.p1 = etr_port1_online;
if (!eacr.p1)
eacr.e1 = 0;
etr_port1_uptodate = 0;
}
clear_bit(ETR_EVENT_UPDATE, &etr_events);
return eacr;
}
/*
* Set up a timer that expires after the etr_tolec + 1.6 seconds if
* one of the ports needs an update.
*/
static void etr_set_tolec_timeout(unsigned long long now)
{
unsigned long micros;
if ((!etr_eacr.p0 || etr_port0_uptodate) &&
(!etr_eacr.p1 || etr_port1_uptodate))
return;
micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
micros = (micros > 1600000) ? 0 : 1600000 - micros;
mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
}
/*
* Set up a time that expires after 1/2 second.
*/
static void etr_set_sync_timeout(void)
{
mod_timer(&etr_timer, jiffies + HZ/2);
}
/*
* Update the aib information for one or both ports.
*/
static struct etr_eacr etr_handle_update(struct etr_aib *aib,
struct etr_eacr eacr)
{
/* With both ports disabled the aib information is useless. */
if (!eacr.e0 && !eacr.e1)
return eacr;
/* Update port0 or port1 with aib stored in etr_work_fn. */
if (aib->esw.q == 0) {
/* Information for port 0 stored. */
if (eacr.p0 && !etr_port0_uptodate) {
etr_port0 = *aib;
if (etr_port0_online)
etr_port0_uptodate = 1;
}
} else {
/* Information for port 1 stored. */
if (eacr.p1 && !etr_port1_uptodate) {
etr_port1 = *aib;
if (etr_port0_online)
etr_port1_uptodate = 1;
}
}
/*
* Do not try to get the alternate port aib if the clock
* is not in sync yet.
*/
if (!eacr.es || !check_sync_clock())
return eacr;
/*
* If steai is available we can get the information about
* the other port immediately. If only stetr is available the
* data-port bit toggle has to be used.
*/
if (etr_steai_available) {
if (eacr.p0 && !etr_port0_uptodate) {
etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
etr_port0_uptodate = 1;
}
if (eacr.p1 && !etr_port1_uptodate) {
etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
etr_port1_uptodate = 1;
}
} else {
/*
* One port was updated above, if the other
* port is not uptodate toggle dp bit.
*/
if ((eacr.p0 && !etr_port0_uptodate) ||
(eacr.p1 && !etr_port1_uptodate))
eacr.dp ^= 1;
else
eacr.dp = 0;
}
return eacr;
}
/*
* Write new etr control register if it differs from the current one.
* Return 1 if etr_tolec has been updated as well.
*/
static void etr_update_eacr(struct etr_eacr eacr)
{
int dp_changed;
if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
/* No change, return. */
return;
/*
* The disable of an active port of the change of the data port
* bit can/will cause a change in the data port.
*/
dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
(etr_eacr.dp ^ eacr.dp) != 0;
etr_eacr = eacr;
etr_setr(&etr_eacr);
if (dp_changed)
etr_tolec = get_tod_clock();
}
/*
* ETR work. In this function you'll find the main logic. In
* particular this is the only function that calls etr_update_eacr(),
* it "controls" the etr control register.
*/
static void etr_work_fn(struct work_struct *work)
{
unsigned long long now;
struct etr_eacr eacr;
struct etr_aib aib;
int sync_port;
/* prevent multiple execution. */
mutex_lock(&etr_work_mutex);
/* Create working copy of etr_eacr. */
eacr = etr_eacr;
/* Check for the different events and their immediate effects. */
eacr = etr_handle_events(eacr);
/* Check if ETR is supposed to be active. */
eacr.ea = eacr.p0 || eacr.p1;
if (!eacr.ea) {
/* Both ports offline. Reset everything. */
eacr.dp = eacr.es = eacr.sl = 0;
on_each_cpu(disable_sync_clock, NULL, 1);
del_timer_sync(&etr_timer);
etr_update_eacr(eacr);
goto out_unlock;
}
/* Store aib to get the current ETR status word. */
BUG_ON(etr_stetr(&aib) != 0);
etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
now = get_tod_clock();
/*
* Update the port information if the last stepping port change
* or data port change is older than 1.6 seconds.
*/
if (now >= etr_tolec + (1600000 << 12))
eacr = etr_handle_update(&aib, eacr);
/*
* Select ports to enable. The preferred synchronization mode is PPS.
* If a port can be enabled depends on a number of things:
* 1) The port needs to be online and uptodate. A port is not
* disabled just because it is not uptodate, but it is only
* enabled if it is uptodate.
* 2) The port needs to have the same mode (pps / etr).
* 3) The port needs to be usable -> etr_port_valid() == 1
* 4) To enable the second port the clock needs to be in sync.
* 5) If both ports are useable and are ETR ports, the network id
* has to be the same.
* The eacr.sl bit is used to indicate etr mode vs. pps mode.
*/
if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
eacr.sl = 0;
eacr.e0 = 1;
if (!etr_mode_is_pps(etr_eacr))
eacr.es = 0;
if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
eacr.e1 = 0;
// FIXME: uptodate checks ?
else if (etr_port0_uptodate && etr_port1_uptodate)
eacr.e1 = 1;
sync_port = (etr_port0_uptodate &&
etr_port_valid(&etr_port0, 0)) ? 0 : -1;
} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
eacr.sl = 0;
eacr.e0 = 0;
eacr.e1 = 1;
if (!etr_mode_is_pps(etr_eacr))
eacr.es = 0;
sync_port = (etr_port1_uptodate &&
etr_port_valid(&etr_port1, 1)) ? 1 : -1;
} else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
eacr.sl = 1;
eacr.e0 = 1;
if (!etr_mode_is_etr(etr_eacr))
eacr.es = 0;
if (!eacr.es || !eacr.p1 ||
aib.esw.psc1 != etr_lpsc_operational_alt)
eacr.e1 = 0;
else if (etr_port0_uptodate && etr_port1_uptodate &&
etr_compare_network(&etr_port0, &etr_port1))
eacr.e1 = 1;
sync_port = (etr_port0_uptodate &&
etr_port_valid(&etr_port0, 0)) ? 0 : -1;
} else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
eacr.sl = 1;
eacr.e0 = 0;
eacr.e1 = 1;
if (!etr_mode_is_etr(etr_eacr))
eacr.es = 0;
sync_port = (etr_port1_uptodate &&
etr_port_valid(&etr_port1, 1)) ? 1 : -1;
} else {
/* Both ports not usable. */
eacr.es = eacr.sl = 0;
sync_port = -1;
}
/*
* If the clock is in sync just update the eacr and return.
* If there is no valid sync port wait for a port update.
*/
if ((eacr.es && check_sync_clock()) || sync_port < 0) {
etr_update_eacr(eacr);
etr_set_tolec_timeout(now);
goto out_unlock;
}
/*
* Prepare control register for clock syncing
* (reset data port bit, set sync check control.
*/
eacr.dp = 0;
eacr.es = 1;
/*
* Update eacr and try to synchronize the clock. If the update
* of eacr caused a stepping port switch (or if we have to
* assume that a stepping port switch has occurred) or the
* clock syncing failed, reset the sync check control bit
* and set up a timer to try again after 0.5 seconds
*/
etr_update_eacr(eacr);
if (now < etr_tolec + (1600000 << 12) ||
etr_sync_clock_stop(&aib, sync_port) != 0) {
/* Sync failed. Try again in 1/2 second. */
eacr.es = 0;
etr_update_eacr(eacr);
etr_set_sync_timeout();
} else
etr_set_tolec_timeout(now);
out_unlock:
mutex_unlock(&etr_work_mutex);
}
/*
* Sysfs interface functions
*/
static struct bus_type etr_subsys = {
.name = "etr",
.dev_name = "etr",
};
static struct device etr_port0_dev = {
.id = 0,
.bus = &etr_subsys,
};
static struct device etr_port1_dev = {
.id = 1,
.bus = &etr_subsys,
};
/*
* ETR subsys attributes
*/
static ssize_t etr_stepping_port_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%i\n", etr_port0.esw.p);
}
static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
static ssize_t etr_stepping_mode_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
char *mode_str;
if (etr_mode_is_pps(etr_eacr))
mode_str = "pps";
else if (etr_mode_is_etr(etr_eacr))
mode_str = "etr";
else
mode_str = "local";
return sprintf(buf, "%s\n", mode_str);
}
static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
/*
* ETR port attributes
*/
static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
{
if (dev == &etr_port0_dev)
return etr_port0_online ? &etr_port0 : NULL;
else
return etr_port1_online ? &etr_port1 : NULL;
}
static ssize_t etr_online_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
unsigned int online;
online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
return sprintf(buf, "%i\n", online);
}
static ssize_t etr_online_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
unsigned int value;
value = simple_strtoul(buf, NULL, 0);
if (value != 0 && value != 1)
return -EINVAL;
if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
return -EOPNOTSUPP;
mutex_lock(&clock_sync_mutex);
if (dev == &etr_port0_dev) {
if (etr_port0_online == value)
goto out; /* Nothing to do. */
etr_port0_online = value;
if (etr_port0_online && etr_port1_online)
set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
else
clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
queue_work(time_sync_wq, &etr_work);
} else {
if (etr_port1_online == value)
goto out; /* Nothing to do. */
etr_port1_online = value;
if (etr_port0_online && etr_port1_online)
set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
else
clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
queue_work(time_sync_wq, &etr_work);
}
out:
mutex_unlock(&clock_sync_mutex);
return count;
}
static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
static ssize_t etr_stepping_control_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
etr_eacr.e0 : etr_eacr.e1);
}
static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
static ssize_t etr_mode_code_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
if (!etr_port0_online && !etr_port1_online)
/* Status word is not uptodate if both ports are offline. */
return -ENODATA;
return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
etr_port0.esw.psc0 : etr_port0.esw.psc1);
}
static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
static ssize_t etr_untuned_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v1)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf1.u);
}
static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
static ssize_t etr_network_id_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v1)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf1.net_id);
}
static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
static ssize_t etr_id_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v1)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf1.etr_id);
}
static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
static ssize_t etr_port_number_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v1)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf1.etr_pn);
}
static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
static ssize_t etr_coupled_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v3)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf3.c);
}
static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
static ssize_t etr_local_time_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v3)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf3.blto);
}
static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
static ssize_t etr_utc_offset_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct etr_aib *aib = etr_aib_from_dev(dev);
if (!aib || !aib->slsw.v3)
return -ENODATA;
return sprintf(buf, "%i\n", aib->edf3.buo);
}
static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
static struct device_attribute *etr_port_attributes[] = {
&dev_attr_online,
&dev_attr_stepping_control,
&dev_attr_state_code,
&dev_attr_untuned,
&dev_attr_network,
&dev_attr_id,
&dev_attr_port,
&dev_attr_coupled,
&dev_attr_local_time,
&dev_attr_utc_offset,
NULL
};
static int __init etr_register_port(struct device *dev)
{
struct device_attribute **attr;
int rc;
rc = device_register(dev);
if (rc)
goto out;
for (attr = etr_port_attributes; *attr; attr++) {
rc = device_create_file(dev, *attr);
if (rc)
goto out_unreg;
}
return 0;
out_unreg:
for (; attr >= etr_port_attributes; attr--)
device_remove_file(dev, *attr);
device_unregister(dev);
out:
return rc;
}
static void __init etr_unregister_port(struct device *dev)
{
struct device_attribute **attr;
for (attr = etr_port_attributes; *attr; attr++)
device_remove_file(dev, *attr);
device_unregister(dev);
}
static int __init etr_init_sysfs(void)
{
int rc;
rc = subsys_system_register(&etr_subsys, NULL);
if (rc)
goto out;
rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
if (rc)
goto out_unreg_subsys;
rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
if (rc)
goto out_remove_stepping_port;
rc = etr_register_port(&etr_port0_dev);
if (rc)
goto out_remove_stepping_mode;
rc = etr_register_port(&etr_port1_dev);
if (rc)
goto out_remove_port0;
return 0;
out_remove_port0:
etr_unregister_port(&etr_port0_dev);
out_remove_stepping_mode:
device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
out_remove_stepping_port:
device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
out_unreg_subsys:
bus_unregister(&etr_subsys);
out:
return rc;
}
device_initcall(etr_init_sysfs);
/*
* Server Time Protocol (STP) code.
*/
......
arch/s390/kvm/kvm-s390.c
View file @ fd5ada04
......@@ -28,7 +28,7 @@
#include <linux/vmalloc.h>
#include <asm/asm-offsets.h>
#include <asm/lowcore.h>
#include <asm/etr.h>
#include <asm/stp.h>
#include <asm/pgtable.h>
#include <asm/gmap.h>
#include <asm/nmi.h>
......
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