Commit fd63e2a9 authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter

drm/i915: combine i9xx_get_hpd_pins and pch_get_hpd_pins

These functions are quite similar, so combine them with the use of a new
argument for a function that detects long pulses. This will be also
needed by an upcoming patch adding support for BXT long pulse detection.

No functional change.

v2:
- rebase on top -nightly (Daniel)
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarSonika Jindal <sonika.jindal@intel.com>
Reviewed-by: default avatarSivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b8bb08ec
...@@ -1256,9 +1256,10 @@ static bool i9xx_port_hotplug_long_detect(enum port port, u32 val) ...@@ -1256,9 +1256,10 @@ static bool i9xx_port_hotplug_long_detect(enum port port, u32 val)
} }
/* Get a bit mask of pins that have triggered, and which ones may be long. */ /* Get a bit mask of pins that have triggered, and which ones may be long. */
static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask, static void intel_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
u32 hotplug_trigger, u32 dig_hotplug_reg, u32 hotplug_trigger, u32 dig_hotplug_reg,
const u32 hpd[HPD_NUM_PINS]) const u32 hpd[HPD_NUM_PINS],
bool long_pulse_detect(enum port port, u32 val))
{ {
enum port port; enum port port;
int i; int i;
...@@ -1273,7 +1274,7 @@ static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask, ...@@ -1273,7 +1274,7 @@ static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
*pin_mask |= BIT(i); *pin_mask |= BIT(i);
port = intel_hpd_pin_to_port(i); port = intel_hpd_pin_to_port(i);
if (pch_port_hotplug_long_detect(port, dig_hotplug_reg)) if (long_pulse_detect(port, dig_hotplug_reg))
*long_mask |= BIT(i); *long_mask |= BIT(i);
} }
...@@ -1282,34 +1283,6 @@ static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask, ...@@ -1282,34 +1283,6 @@ static void pch_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
} }
/* Get a bit mask of pins that have triggered, and which ones may be long. */
static void i9xx_get_hpd_pins(u32 *pin_mask, u32 *long_mask,
u32 hotplug_trigger, const u32 hpd[HPD_NUM_PINS])
{
enum port port;
int i;
*pin_mask = 0;
*long_mask = 0;
if (!hotplug_trigger)
return;
for_each_hpd_pin(i) {
if ((hpd[i] & hotplug_trigger) == 0)
continue;
*pin_mask |= BIT(i);
port = intel_hpd_pin_to_port(i);
if (i9xx_port_hotplug_long_detect(port, hotplug_trigger))
*long_mask |= BIT(i);
}
DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x, pins 0x%08x\n",
hotplug_trigger, *pin_mask);
}
static void gmbus_irq_handler(struct drm_device *dev) static void gmbus_irq_handler(struct drm_device *dev)
{ {
struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_private *dev_priv = dev->dev_private;
...@@ -1547,7 +1520,9 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev) ...@@ -1547,7 +1520,9 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) { if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) {
u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X; u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_G4X;
i9xx_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, hpd_status_g4x); intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
hotplug_trigger, hpd_status_g4x,
i9xx_port_hotplug_long_detect);
intel_hpd_irq_handler(dev, pin_mask, long_mask); intel_hpd_irq_handler(dev, pin_mask, long_mask);
if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X) if (hotplug_status & DP_AUX_CHANNEL_MASK_INT_STATUS_G4X)
...@@ -1555,7 +1530,9 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev) ...@@ -1555,7 +1530,9 @@ static void i9xx_hpd_irq_handler(struct drm_device *dev)
} else { } else {
u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915; u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
i9xx_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, hpd_status_i915); intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
hotplug_trigger, hpd_status_g4x,
i9xx_port_hotplug_long_detect);
intel_hpd_irq_handler(dev, pin_mask, long_mask); intel_hpd_irq_handler(dev, pin_mask, long_mask);
} }
} }
...@@ -1662,8 +1639,9 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir) ...@@ -1662,8 +1639,9 @@ static void ibx_irq_handler(struct drm_device *dev, u32 pch_iir)
dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger, intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
dig_hotplug_reg, hpd_ibx); dig_hotplug_reg, hpd_ibx,
pch_port_hotplug_long_detect);
intel_hpd_irq_handler(dev, pin_mask, long_mask); intel_hpd_irq_handler(dev, pin_mask, long_mask);
} }
...@@ -1763,8 +1741,10 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir) ...@@ -1763,8 +1741,10 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG); dig_hotplug_reg = I915_READ(PCH_PORT_HOTPLUG);
I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg); I915_WRITE(PCH_PORT_HOTPLUG, dig_hotplug_reg);
pch_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
dig_hotplug_reg, hpd_cpt); intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
dig_hotplug_reg, hpd_cpt,
pch_port_hotplug_long_detect);
intel_hpd_irq_handler(dev, pin_mask, long_mask); intel_hpd_irq_handler(dev, pin_mask, long_mask);
} }
...@@ -1981,7 +1961,8 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status) ...@@ -1981,7 +1961,8 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
/* Clear sticky bits in hpd status */ /* Clear sticky bits in hpd status */
I915_WRITE(BXT_HOTPLUG_CTL, hp_control); I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
pch_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control, hpd_bxt); intel_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control,
hpd_bxt, pch_port_hotplug_long_detect);
intel_hpd_irq_handler(dev, pin_mask, long_mask); intel_hpd_irq_handler(dev, pin_mask, long_mask);
} }
......
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