Commit fe5b1886 authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter

drm/i915: disable GT power saving early during system suspend

Atm, we disable GT power saving during the end of the suspend sequence
in i915_save_state(). Doing the disabling at that point seems arbitrary.
One reason to disable it early though is to have a quiescent HW state
before we do anything else (for example save registers). So move the
disabling earlier, which also takes care canceling of the deferred RPS
enabling work done by intel_disable_gt_powersave().

Note that after the move we'll call intel_disable_gt_powersave() only
in case modeset is enabled, but that's anyway the only case where we
have it enabled in the first place.
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarRobert Beckett <robert.beckett@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e494837a
...@@ -524,10 +524,11 @@ static int i915_drm_freeze(struct drm_device *dev) ...@@ -524,10 +524,11 @@ static int i915_drm_freeze(struct drm_device *dev)
return error; return error;
} }
cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
drm_irq_uninstall(dev); drm_irq_uninstall(dev);
dev_priv->enable_hotplug_processing = false; dev_priv->enable_hotplug_processing = false;
intel_disable_gt_powersave(dev);
/* /*
* Disable CRTCs directly since we want to preserve sw state * Disable CRTCs directly since we want to preserve sw state
* for _thaw. * for _thaw.
......
...@@ -328,8 +328,6 @@ int i915_save_state(struct drm_device *dev) ...@@ -328,8 +328,6 @@ int i915_save_state(struct drm_device *dev)
} }
} }
intel_disable_gt_powersave(dev);
/* Cache mode state */ /* Cache mode state */
if (INTEL_INFO(dev)->gen < 7) if (INTEL_INFO(dev)->gen < 7)
dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0); dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment