Commit fee3d8ee authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Matthias Brugger

arm64: dts: mediatek: mt6795: Add support for the CMDQ/GCE mailbox

In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox.
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230412112739.160376-17-angelogioacchino.delregno@collabora.comSigned-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 1e5b6725
...@@ -7,6 +7,7 @@ ...@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mediatek,mt6795-clk.h> #include <dt-bindings/clock/mediatek,mt6795-clk.h>
#include <dt-bindings/gce/mediatek,mt6795-gce.h>
#include <dt-bindings/pinctrl/mt6795-pinfunc.h> #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
#include <dt-bindings/power/mt6795-power.h> #include <dt-bindings/power/mt6795-power.h>
#include <dt-bindings/reset/mediatek,mt6795-resets.h> #include <dt-bindings/reset/mediatek,mt6795-resets.h>
...@@ -401,6 +402,15 @@ fhctl: clock-controller@10209f00 { ...@@ -401,6 +402,15 @@ fhctl: clock-controller@10209f00 {
status = "disabled"; status = "disabled";
}; };
gce: mailbox@10212000 {
compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce";
reg = <0 0x10212000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_GCE>;
clock-names = "gce";
#mbox-cells = <2>;
};
gic: interrupt-controller@10221000 { gic: interrupt-controller@10221000 {
compatible = "arm,gic-400"; compatible = "arm,gic-400";
#interrupt-cells = <3>; #interrupt-cells = <3>;
......
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