Commit ff29ee8f authored by Arend van Spriel's avatar Arend van Spriel Committed by Greg Kroah-Hartman

staging: brcm80211: remove redundant CHIPREV macro

The CHIPREV macro simply expands to the macro argument so it is
redundant and as such removed.
Reviewed-by: default avatarRoland Vossen <rvossen@broadcom.com>
Signed-off-by: default avatarArend van Spriel <arend@broadcom.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent dfa26436
...@@ -51,7 +51,6 @@ ...@@ -51,7 +51,6 @@
#define SPI_BUS 6 /* gSPI target */ #define SPI_BUS 6 /* gSPI target */
#define RPC_BUS 7 /* RPC target */ #define RPC_BUS 7 /* RPC target */
#define CHIPREV(rev) (rev)
/* Defines for DMA Address Width - Shared between OSL and HNDDMA */ /* Defines for DMA Address Width - Shared between OSL and HNDDMA */
#define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */ #define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */
......
...@@ -408,7 +408,7 @@ bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded) ...@@ -408,7 +408,7 @@ bool BCMFASTPATH wlc_dpc(wlc_info_t *wlc, bool bounded)
printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
__func__, wlc_hw->sih->chip, __func__, wlc_hw->sih->chip,
CHIPREV(wlc_hw->sih->chiprev)); wlc_hw->sih->chiprev);
WLCNTINCR(wlc->pub->_cnt->psmwds); WLCNTINCR(wlc->pub->_cnt->psmwds);
......
...@@ -6428,7 +6428,7 @@ void wlc_high_dpc(wlc_info_t *wlc, u32 macintstatus) ...@@ -6428,7 +6428,7 @@ void wlc_high_dpc(wlc_info_t *wlc, u32 macintstatus)
printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n", printk_once("%s : PSM Watchdog, chipid 0x%x, chiprev 0x%x\n",
__func__, wlc->pub->sih->chip, __func__, wlc->pub->sih->chip,
CHIPREV(wlc->pub->sih->chiprev)); wlc->pub->sih->chiprev);
WLCNTINCR(wlc->pub->_cnt->psmwds); WLCNTINCR(wlc->pub->_cnt->psmwds);
......
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#include <bcmdevs.h> #include <bcmdevs.h>
#define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \ #define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \
(CHIPREV(sih->chiprev) == 0) && \ (sih->chiprev == 0) && \
(sii->coreid[sii->curidx] == MIPS74K_CORE_ID)) (sii->coreid[sii->curidx] == MIPS74K_CORE_ID))
/* EROM parsing */ /* EROM parsing */
......
...@@ -1361,7 +1361,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -1361,7 +1361,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
si_pmu_set_4330_plldivs(sih); si_pmu_set_4330_plldivs(sih);
if ((sih->chip == BCM4329_CHIP_ID) if ((sih->chip == BCM4329_CHIP_ID)
&& (CHIPREV(sih->chiprev) == 0)) { && (sih->chiprev == 0)) {
W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); W_REG(osh, &cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1);
tmp = R_REG(osh, &cc->pllcontrol_data); tmp = R_REG(osh, &cc->pllcontrol_data);
...@@ -1443,7 +1443,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc, ...@@ -1443,7 +1443,7 @@ static void si_pmu1_pllinit0(si_t *sih, struct osl_info *osh, chipcregs_t *cc,
((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK); ((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK);
if ((sih->chip == BCM4329_CHIP_ID) if ((sih->chip == BCM4329_CHIP_ID)
&& CHIPREV(sih->chiprev) == 0) { && sih->chiprev == 0) {
/* clear the htstretch before clearing HTReqEn */ /* clear the htstretch before clearing HTReqEn */
AND_REG(osh, &cc->clkstretch, ~CSTRETCH_HT); AND_REG(osh, &cc->clkstretch, ~CSTRETCH_HT);
tmp &= ~PCTL_HT_REQ_EN; tmp &= ~PCTL_HT_REQ_EN;
...@@ -1708,7 +1708,7 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh) ...@@ -1708,7 +1708,7 @@ u32 si_pmu_si_clock(si_t *sih, struct osl_info *osh)
PMU5_MAINPLL_SI); PMU5_MAINPLL_SI);
break; break;
case BCM4329_CHIP_ID: case BCM4329_CHIP_ID:
if (CHIPREV(sih->chiprev) == 0) if (sih->chiprev == 0)
clock = 38400 * 1000; clock = 38400 * 1000;
else else
clock = si_pmu1_cpuclk0(sih, osh, cc); clock = si_pmu1_cpuclk0(sih, osh, cc);
...@@ -2562,7 +2562,7 @@ void si_pmu_swreg_init(si_t *sih, struct osl_info *osh) ...@@ -2562,7 +2562,7 @@ void si_pmu_swreg_init(si_t *sih, struct osl_info *osh)
0xe); 0xe);
/* Reduce LNLDO1 output voltage to 1.2V */ /* Reduce LNLDO1 output voltage to 1.2V */
si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_LNLDO1, 0xe); si_pmu_set_ldo_voltage(sih, osh, SET_LDO_VOLTAGE_LNLDO1, 0xe);
if (CHIPREV(sih->chiprev) == 0) if (sih->chiprev == 0)
si_pmu_regcontrol(sih, 2, 0x400000, 0x400000); si_pmu_regcontrol(sih, 2, 0x400000, 0x400000);
break; break;
......
...@@ -594,7 +594,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -594,7 +594,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
((sih->chip == BCM43236_CHIP_ID ((sih->chip == BCM43236_CHIP_ID
|| sih->chip == BCM43235_CHIP_ID || sih->chip == BCM43235_CHIP_ID
|| sih->chip == BCM43238_CHIP_ID) || sih->chip == BCM43238_CHIP_ID)
&& (CHIPREV(sii->pub.chiprev) <= 2))) { && (sii->pub.chiprev <= 2))) {
if ((cc->chipstatus & CST43236_BP_CLK) != 0) { if ((cc->chipstatus & CST43236_BP_CLK) != 0) {
uint clkdiv; uint clkdiv;
...@@ -653,7 +653,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -653,7 +653,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
if ((sih->chip == BCM43224_CHIP_ID) || if ((sih->chip == BCM43224_CHIP_ID) ||
(sih->chip == BCM43421_CHIP_ID)) { (sih->chip == BCM43421_CHIP_ID)) {
/* enable 12 mA drive strenth for 43224 and set chipControl register bit 15 */ /* enable 12 mA drive strenth for 43224 and set chipControl register bit 15 */
if (CHIPREV(sih->chiprev) == 0) { if (sih->chiprev == 0) {
SI_MSG(("Applying 43224A0 WARs\n")); SI_MSG(("Applying 43224A0 WARs\n"));
si_corereg(sih, SI_CC_IDX, si_corereg(sih, SI_CC_IDX,
offsetof(chipcregs_t, chipcontrol), offsetof(chipcregs_t, chipcontrol),
...@@ -662,7 +662,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh, ...@@ -662,7 +662,7 @@ static si_info_t *si_doattach(si_info_t *sii, uint devid, struct osl_info *osh,
si_pmu_chipcontrol(sih, 0, CCTRL_43224A0_12MA_LED_DRIVE, si_pmu_chipcontrol(sih, 0, CCTRL_43224A0_12MA_LED_DRIVE,
CCTRL_43224A0_12MA_LED_DRIVE); CCTRL_43224A0_12MA_LED_DRIVE);
} }
if (CHIPREV(sih->chiprev) >= 1) { if (sih->chiprev >= 1) {
SI_MSG(("Applying 43224B0+ WARs\n")); SI_MSG(("Applying 43224B0+ WARs\n"));
si_pmu_chipcontrol(sih, 0, CCTRL_43224B0_12MA_LED_DRIVE, si_pmu_chipcontrol(sih, 0, CCTRL_43224B0_12MA_LED_DRIVE,
CCTRL_43224B0_12MA_LED_DRIVE); CCTRL_43224B0_12MA_LED_DRIVE);
...@@ -1043,7 +1043,7 @@ void si_watchdog(si_t *sih, uint ticks) ...@@ -1043,7 +1043,7 @@ void si_watchdog(si_t *sih, uint ticks)
if (PMUCTL_ENAB(sih)) { if (PMUCTL_ENAB(sih)) {
if ((sih->chip == BCM4319_CHIP_ID) && if ((sih->chip == BCM4319_CHIP_ID) &&
(CHIPREV(sih->chiprev) == 0) && (ticks != 0)) { (sih->chiprev == 0) && (ticks != 0)) {
si_corereg(sih, SI_CC_IDX, si_corereg(sih, SI_CC_IDX,
offsetof(chipcregs_t, clk_ctl_st), ~0, 0x2); offsetof(chipcregs_t, clk_ctl_st), ~0, 0x2);
si_setcore(sih, USB20D_CORE_ID, 0); si_setcore(sih, USB20D_CORE_ID, 0);
......
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