Commit ff4fe81d authored by Michael Chan's avatar Michael Chan Committed by David S. Miller

bnxt_en: Use firmware provided message timeout value.

Before this patch, we used a hardcoded value of 500 msec as the default
value for firmware message response timeout.  For better portability with
future hardware or debug platforms, use the value provided by firmware in
the first response and store it for all susequent messages.  Redefine the
macro HWRM_CMD_TIMEOUT to the stored value.  Since we don't have the
value yet in the first message, use the 500 ms default if the stored value
is zero.
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dfc9c94a
...@@ -2638,6 +2638,9 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout) ...@@ -2638,6 +2638,9 @@ int _hwrm_send_message(struct bnxt *bp, void *msg, u32 msg_len, int timeout)
/* Ring channel doorbell */ /* Ring channel doorbell */
writel(1, bp->bar0 + 0x100); writel(1, bp->bar0 + 0x100);
if (!timeout)
timeout = DFLT_HWRM_CMD_TIMEOUT;
i = 0; i = 0;
if (intr_process) { if (intr_process) {
/* Wait until hwrm response cmpl interrupt is processed */ /* Wait until hwrm response cmpl interrupt is processed */
...@@ -3809,6 +3812,10 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp) ...@@ -3809,6 +3812,10 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp)
resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld, resp->hwrm_fw_maj, resp->hwrm_fw_min, resp->hwrm_fw_bld,
resp->hwrm_intf_maj, resp->hwrm_intf_min, resp->hwrm_intf_upd); resp->hwrm_intf_maj, resp->hwrm_intf_min, resp->hwrm_intf_upd);
bp->hwrm_cmd_timeout = le16_to_cpu(resp->def_req_timeout);
if (!bp->hwrm_cmd_timeout)
bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT;
hwrm_ver_get_exit: hwrm_ver_get_exit:
mutex_unlock(&bp->hwrm_cmd_lock); mutex_unlock(&bp->hwrm_cmd_lock);
return rc; return rc;
......
...@@ -477,7 +477,8 @@ struct rx_tpa_end_cmp_ext { ...@@ -477,7 +477,8 @@ struct rx_tpa_end_cmp_ext {
#define RING_CMP(idx) ((idx) & bp->cp_ring_mask) #define RING_CMP(idx) ((idx) & bp->cp_ring_mask)
#define NEXT_CMP(idx) RING_CMP(ADV_RAW_CMP(idx, 1)) #define NEXT_CMP(idx) RING_CMP(ADV_RAW_CMP(idx, 1))
#define HWRM_CMD_TIMEOUT 500 #define DFLT_HWRM_CMD_TIMEOUT 500
#define HWRM_CMD_TIMEOUT (bp->hwrm_cmd_timeout)
#define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4) #define HWRM_RESET_TIMEOUT ((HWRM_CMD_TIMEOUT) * 4)
#define HWRM_RESP_ERR_CODE_MASK 0xffff #define HWRM_RESP_ERR_CODE_MASK 0xffff
#define HWRM_RESP_LEN_MASK 0xffff0000 #define HWRM_RESP_LEN_MASK 0xffff0000
...@@ -957,6 +958,7 @@ struct bnxt { ...@@ -957,6 +958,7 @@ struct bnxt {
void *hwrm_dbg_resp_addr; void *hwrm_dbg_resp_addr;
dma_addr_t hwrm_dbg_resp_dma_addr; dma_addr_t hwrm_dbg_resp_dma_addr;
#define HWRM_DBG_REG_BUF_SIZE 128 #define HWRM_DBG_REG_BUF_SIZE 128
int hwrm_cmd_timeout;
struct mutex hwrm_cmd_lock; /* serialize hwrm messages */ struct mutex hwrm_cmd_lock; /* serialize hwrm messages */
struct hwrm_ver_get_output ver_resp; struct hwrm_ver_get_output ver_resp;
#define FW_VER_STR_LEN 32 #define FW_VER_STR_LEN 32
......
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