Commit ffe536ba authored by Joshua Uziel's avatar Joshua Uziel Committed by David S. Miller

Sparc32 cleanups.

parent 87cf25a1
...@@ -1437,8 +1437,6 @@ P: Anton Blanchard ...@@ -1437,8 +1437,6 @@ P: Anton Blanchard
M: anton@samba.org M: anton@samba.org
L: sparclinux@vger.kernel.org L: sparclinux@vger.kernel.org
L: ultralinux@vger.kernel.org L: ultralinux@vger.kernel.org
W: http://ultra.linux.cz
W: http://www.geog.ubc.ca/s_linux.html
S: Maintained S: Maintained
SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER SPECIALIX IO8+ MULTIPORT SERIAL CARD DRIVER
......
...@@ -83,7 +83,7 @@ int cpu_idle(void) ...@@ -83,7 +83,7 @@ int cpu_idle(void)
fps = (fps + (faults - last_faults)) >> 1; fps = (fps + (faults - last_faults)) >> 1;
last_faults = faults; last_faults = faults;
#if 0 #if 0
printk("kernel faults / second = %d\n", fps); printk("kernel faults / second = %ld\n", fps);
#endif #endif
if (fps >= SUN4C_FAULT_HIGH) { if (fps >= SUN4C_FAULT_HIGH) {
sun4c_grow_kernel_ring(); sun4c_grow_kernel_ring();
......
...@@ -53,11 +53,9 @@ swift_flush_cache_all: ...@@ -53,11 +53,9 @@ swift_flush_cache_all:
.globl swift_flush_cache_mm .globl swift_flush_cache_mm
swift_flush_cache_mm: swift_flush_cache_mm:
#ifndef CONFIG_SMP
ld [%o0 + AOFF_mm_context], %g2 ld [%o0 + AOFF_mm_context], %g2
cmp %g2, -1 cmp %g2, -1
be swift_flush_cache_mm_out be swift_flush_cache_mm_out
#endif
WINDOW_FLUSH(%g4, %g5) WINDOW_FLUSH(%g4, %g5)
rd %psr, %g1 rd %psr, %g1
andn %g1, PSR_ET, %g3 andn %g1, PSR_ET, %g3
...@@ -121,11 +119,9 @@ swift_flush_cache_range: ...@@ -121,11 +119,9 @@ swift_flush_cache_range:
swift_flush_cache_page: swift_flush_cache_page:
ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */
70: 70:
#ifndef CONFIG_SMP
ld [%o0 + AOFF_mm_context], %g2 ld [%o0 + AOFF_mm_context], %g2
cmp %g2, -1 cmp %g2, -1
be swift_flush_cache_page_out be swift_flush_cache_page_out
#endif
WINDOW_FLUSH(%g4, %g5) WINDOW_FLUSH(%g4, %g5)
rd %psr, %g1 rd %psr, %g1
andn %g1, PSR_ET, %g3 andn %g1, PSR_ET, %g3
...@@ -226,11 +222,9 @@ swift_flush_sig_insns: ...@@ -226,11 +222,9 @@ swift_flush_sig_insns:
swift_flush_tlb_range: swift_flush_tlb_range:
ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
swift_flush_tlb_mm: swift_flush_tlb_mm:
#ifndef CONFIG_SMP
ld [%o0 + AOFF_mm_context], %g2 ld [%o0 + AOFF_mm_context], %g2
cmp %g2, -1 cmp %g2, -1
be swift_flush_tlb_all_out be swift_flush_tlb_all_out
#endif
swift_flush_tlb_all: swift_flush_tlb_all:
mov 0x400, %o1 mov 0x400, %o1
sta %g0, [%o1] ASI_M_FLUSH_PROBE sta %g0, [%o1] ASI_M_FLUSH_PROBE
...@@ -244,11 +238,9 @@ swift_flush_tlb_page: ...@@ -244,11 +238,9 @@ swift_flush_tlb_page:
mov SRMMU_CTX_REG, %g1 mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3 ld [%o0 + AOFF_mm_context], %o3
andn %o1, (PAGE_SIZE - 1), %o1 andn %o1, (PAGE_SIZE - 1), %o1
#ifndef CONFIG_SMP
cmp %o3, -1 cmp %o3, -1
be swift_flush_tlb_page_out be swift_flush_tlb_page_out
nop nop
#endif
#if 1 #if 1
mov 0x400, %o1 mov 0x400, %o1
sta %g0, [%o1] ASI_M_FLUSH_PROBE sta %g0, [%o1] ASI_M_FLUSH_PROBE
......
...@@ -27,10 +27,8 @@ tsunami_flush_cache_range: ...@@ -27,10 +27,8 @@ tsunami_flush_cache_range:
ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */ ld [%o0 + 0x0], %o0 /* XXX vma->vm_mm, GROSS XXX */
tsunami_flush_cache_mm: tsunami_flush_cache_mm:
ld [%o0 + AOFF_mm_context], %g2 ld [%o0 + AOFF_mm_context], %g2
#ifndef CONFIG_SMP
cmp %g2, -1 cmp %g2, -1
be tsunami_flush_cache_out be tsunami_flush_cache_out
#endif
tsunami_flush_cache_all: tsunami_flush_cache_all:
WINDOW_FLUSH(%g4, %g5) WINDOW_FLUSH(%g4, %g5)
tsunami_flush_page_for_dma: tsunami_flush_page_for_dma:
...@@ -50,11 +48,9 @@ tsunami_flush_sig_insns: ...@@ -50,11 +48,9 @@ tsunami_flush_sig_insns:
tsunami_flush_tlb_range: tsunami_flush_tlb_range:
ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */ ld [%o0 + 0x00], %o0 /* XXX vma->vm_mm GROSS XXX */
tsunami_flush_tlb_mm: tsunami_flush_tlb_mm:
#ifndef CONFIG_SMP
ld [%o0 + AOFF_mm_context], %g2 ld [%o0 + AOFF_mm_context], %g2
cmp %g2, -1 cmp %g2, -1
be tsunami_flush_tlb_out be tsunami_flush_tlb_out
#endif
tsunami_flush_tlb_all: tsunami_flush_tlb_all:
mov 0x400, %o1 mov 0x400, %o1
sta %g0, [%o1] ASI_M_FLUSH_PROBE sta %g0, [%o1] ASI_M_FLUSH_PROBE
...@@ -73,10 +69,8 @@ tsunami_flush_tlb_page: ...@@ -73,10 +69,8 @@ tsunami_flush_tlb_page:
mov SRMMU_CTX_REG, %g1 mov SRMMU_CTX_REG, %g1
ld [%o0 + AOFF_mm_context], %o3 ld [%o0 + AOFF_mm_context], %o3
andn %o1, (PAGE_SIZE - 1), %o1 andn %o1, (PAGE_SIZE - 1), %o1
#ifndef CONFIG_SMP
cmp %o3, -1 cmp %o3, -1
be tsunami_flush_tlb_page_out be tsunami_flush_tlb_page_out
#endif
lda [%g1] ASI_M_MMUREGS, %g5 lda [%g1] ASI_M_MMUREGS, %g5
sta %o3, [%g1] ASI_M_MMUREGS sta %o3, [%g1] ASI_M_MMUREGS
sta %g0, [%o1] ASI_M_FLUSH_PROBE sta %g0, [%o1] ASI_M_FLUSH_PROBE
......
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