- 20 Sep, 2023 4 commits
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Konrad Dybcio authored
Add the three LEDs (blue/yellow/green) connected to TLMM GPIOs. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230906-topic-rb1_features_sans_icc-v1-4-e92ce6fbde16@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Enable the ADSP, MPSS and Wi-Fi. Tighten up the Wi-Fi regulators to make them compliant with that the chip expects. The Wi-Fi reports: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230906-topic-rb1_features_sans_icc-v1-3-e92ce6fbde16@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Commit b4fe47d1 ("arm64: dts: qcom: qrb2210-rb1: Add regulators") introduced regulator settings that were never put in place, as all of the properties ended 'microvolts' instead of 'microvolt' (which dt schema did not check for back then). Fix the microvolts-microvolt typo and adjust voltage ranges where it's necessary to fit within the volt = base + n*step formula. Reported-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Fixes: b4fe47d1 ("arm64: dts: qcom: qrb2210-rb1: Add regulators") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230906-topic-rb1_features_sans_icc-v1-2-e92ce6fbde16@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
Newer RB1 board revisions have a debug UART on QUP0. Sadly, it looks like even when ordering one in retail, customers receive prototype boards with "Enginering Sample" written on them. Use QUP4 for UART to make all known RB1 boards boot. Fixes: e1877196 ("arm64: dts: qcom: Add initial QTI RB1 device tree") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reported-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230906-topic-rb1_features_sans_icc-v1-1-e92ce6fbde16@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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- 19 Sep, 2023 25 commits
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Konrad Dybcio authored
Hook up the interrupts that signal the Limits Management Hardware has started some sort of throttling action. Fixes: 7dbd121a ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230811-topic-7280_lmhirq-v1-1-c262b6a25c8f@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Change the UFS QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230731111158.3998107-1-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Douglas Anderson authored
Let's provide the proper link from the touchscreen to the panel on trogdor devices where the touchscreen support it. This allows the OS to power sequence the touchscreen more properly. For the most part, this is just expected to marginally improve power consumption while the screen is off. However, in at least one trogdor model (wormdingler) it's suspected that this will fix some behavorial corner cases when the panel power cycles (like for a modeset) without the touchscreen power cycling. NOTE: some trogdor variants use touchscreens that don't (yet) support linking the touchscreen and the panel. Those variants are left alone. Reviewed-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Benjamin Tissoires <bentiss@kernel.org> Acked-by: Benjamin Tissoires <bentiss@kernel.org> Link: https://lore.kernel.org/r/20230727101636.v4.11.Ia06c340e3482563e6bfd3106ecd0d3139f173ca4@changeidSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Nikita Travkin authored
gt510 has two capacitive keys on the bottom. Define keycodes to enable them. Signed-off-by: Nikita Travkin <nikita@trvn.ru> Link: https://lore.kernel.org/r/20230725-gt5-panel-v1-3-7c787e33a614@trvn.ruSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Siddharth Manthan authored
The device has a 8 inch lsl080al03 display. Add it to the device tree. Signed-off-by: Siddharth Manthan <siddharth.manthan@gmail.com> Co-developed-by: Nikita Travkin <nikita@trvn.ru> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230725-gt5-panel-v1-2-7c787e33a614@trvn.ruSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Jasper Korten authored
The device has a 9.7 inch ltl101at01 display. Add it to the device tree. Signed-off-by: Jasper Korten <jja2000@gmail.com> Co-developed-by: Nikita Travkin <nikita@trvn.ru> Signed-off-by: Nikita Travkin <nikita@trvn.ru> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230725-gt5-panel-v1-1-7c787e33a614@trvn.ruSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
Enable MDSS and DSI, and configure the Samsung SOFEF01-M ams597ut01 6.0" 1080x2520 panel. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-17-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
Add the DT nodes that describe the MDSS hardware on SM6125, containing one MDP (display controller) together with a single DSI and DSI PHY. No DisplayPort support is added for now. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-16-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
Enable and configure the dispcc node on SM6125 for consumption by MDSS later on. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-15-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
We have a working RPM XO clock; no other driver except rpmcc should be parenting directly to the fixed-factor xo_board clock nor should it be reachable by that global name. Remove the name to that effect, so that every clock relation is explicitly defined in DTS. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-14-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
This node has always resided in the wrong spot, making it somewhat harder to contribute new node entries while maintaining proper sorting around it. Move the node up to sit after hsusb_phy1 where it maintains proper numerical sorting on the (first of its many) reg address property. Fixes: cff4bbaf ("arm64: dts: qcom: Add support for SM6125") Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-3-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Marijn Suijten authored
APPS IOMMU is the only node in sm6125.dtsi that doesn't have its address padded to 8 hexadecimals; fix this by prepending a 0. Fixes: 8ddb4bc3 ("arm64: dts: qcom: sm6125: Configure APPS SMMU") Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-2-a3f287dd6c07@somainline.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Bindings require different order of clocks for USB DWC3 nodes (sleep before mock_utmi). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230723141849.93078-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Bindings require different order of clocks for USB DWC3 nodes (sleep before mock_utmi). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230723141849.93078-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
There are two entries for similar reserved memory: qseecom@cb400000 and audio@cb400000. Keep the qseecom as it is longer. Warning (unique_unit_address_if_enabled): /reserved-memory/audio@cb400000: duplicate unit-address (also used in node /reserved-memory/qseecom@cb400000) Fixes: 69876bc6 ("arm64: dts: qcom: msm8992-libra: Fix the memory map") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230720072048.10093-2-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Reserved memory @6c00000 is defined in MSM8994 DTSI and few boards: Warning (unique_unit_address_if_enabled): /reserved-memory/reserved@6c00000: duplicate unit-address (also used in node /reserved-memory/hole2@6c00000) Warning (unique_unit_address_if_enabled): /reserved-memory/reserved@6c00000: duplicate unit-address (also used in node /reserved-memory/memory@6c00000) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230720072048.10093-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Alexey Minnekhanov authored
Modem subsystem in SDM630/660 is similar to MSM8998 and device tree node for it is based on the one from msm8998.dtsi. Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Link: https://lore.kernel.org/r/20230719093458.2668842-1-alexeymin@postmarketos.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Konrad Dybcio authored
This property isn't used or defined anymore. Get rid of it. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230714-topic-lpass_lpi_cleanup-v1-3-dc18b5bd14f7@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
Add proper audio routes for onboard analogue microphones: AMIC[1345]. Use also new DAPM input widget (TX SWR_INPUTn) for them, not the deprecated ADC one. Change is not compatible with older kernels not having the new SWR_INPUTn input widget. Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230717143824.203352-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Jagadeesh Kona authored
Add device node for camera clock controller on Qualcomm SM8550 platform. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-6-quic_jkona@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Bjorn Andersson authored
Merge the SM8550 camera clock controller through a topic branch, to get access to the DeviceTree bindings.
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Jagadeesh Kona authored
Add support for camera qdss, sleep and xo clocks. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-5-quic_jkona@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Jagadeesh Kona authored
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8550 platform. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-4-quic_jkona@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Jagadeesh Kona authored
Lucid ole pll has as extra RINGOSC_CAL_L field in L register in addition to the fields that are part of lucid evo pll, hence add support for lucid ole pll configure function to configure the ole plls. Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-3-quic_jkona@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Jagadeesh Kona authored
Add device tree bindings for the camera clock controller on Qualcomm SM8550 platform. Co-developed-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230707035744.22245-2-quic_jkona@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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- 16 Sep, 2023 1 commit
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Gaurav Kohli authored
Fix the apps iommu local address space range as per data sheet. Fixes: 6a6729f3 ("arm64: dts: qcom: msm8916: Add IOMMU support") Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Gaurav Kohli <quic_gkohli@quicinc.com> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230915143304.477-1-quic_gkohli@quicinc.comSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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- 15 Sep, 2023 1 commit
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Konrad Dybcio authored
Describe the interconnect paths related to QUPs and add the power-domains powering them. This is required for icc sync_state, as otherwise QUP access is gated. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230703-topic-8250_qup_icc-v2-4-9ba0a9460be2@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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- 14 Sep, 2023 9 commits
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-11-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-10-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-9-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-8-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Use usb_1_ssphy's clock as gcc's usb3_phy_wrapper_gcc_usb30_pipe_clk clock source. Suggested-by: Neil Armstrong <neil.armstrong@linaro.org> Fixes: 1c39e6f9 ("arm64: dts: qcom: sc7280: Add USB related nodes") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-7-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Dmitry Baryshkov authored
Change the USB QMP PHY to use newer style of QMP PHY bindings (single resource region, no per-PHY subnodes). Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230711120916.4165894-6-dmitry.baryshkov@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Maulik Shah authored
Add power-domains for cpuidle states to use psci os-initiated idle states. Cc: devicetree@vger.kernel.org Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Link: https://lore.kernel.org/r/20230703085555.30285-4-quic_mkshah@quicinc.com [bjorn: Corrected psci child node names to match binding] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230906104744.163479-6-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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Krzysztof Kozlowski authored
According to schematics the L9B regulator supplies VCCQ (already in DTS) and the UFS controller pads (VDD_PX10, missing vdd-hba). Add the missing supply for full hardware description, even though it should not have functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230906104744.163479-5-krzysztof.kozlowski@linaro.orgSigned-off-by: Bjorn Andersson <andersson@kernel.org>
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