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- 20 Jul, 2022 12 commits
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Krzysztof Kozlowski authored
Document board compatibles already present in Linux kernel. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220521164550.91115-3-krzysztof.kozlowski@linaro.orgSigned-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Krzysztof Kozlowski authored
Document board compatibles already present in Linux kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Add prefix for SHIFT GmbH, phone manufacturer (https://www.shiftphones.com/en/). Signed-off-by:
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Krzysztof Kozlowski authored
Document several board compatibles already present in Linux kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Document several board compatibles already present in Linux kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Document several board compatibles already present in Linux kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Document several board compatibles already present in Linux kernel. Signed-off-by:
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Krzysztof Kozlowski authored
Document several board compatibles already present in Linux kernel. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20220520123252.365762-5-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
The compatibles for APQ8094/MSM8994 boards are different than specified in bindings. None of them use fallback to other SoC variant. Fixes: 9ad3c08f ("dt-bindings: arm: qcom: Document sony boards for apq8094") Signed-off-by:
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Krzysztof Kozlowski authored
The order of compatibles for MSM8916 MTP board is different: msm8916-mtp.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,msm8916-mtp', 'qcom,msm8916-mtp/1', 'qcom,msm8916'] is too long Fixes: 9d3ef77f ("dt-bindings: arm: Convert QCom board/soc bindings to json-schema") Signed-off-by: -
Krzysztof Kozlowski authored
The MSM8916 Longcheer L8150 uses a fallback in compatible: msm8916-longcheer-l8150.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['longcheer,l8150', 'qcom,msm8916-v1-qrd/9-v1', 'qcom,msm8916'] is too long Fixes: b72160fa ("dt-bindings: qcom: Document bindings for new MSM8916 devices") Signed-off-by: -
Krzysztof Kozlowski authored
The MSM8916 Alcatel OneTouch Idol 3 does not use MTP fallbacks in compatibles: msm8916-alcatel-idol347.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed: ['alcatel,idol347', 'qcom,msm8916'] is too short Reported-by:
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- 19 Jul, 2022 5 commits
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Bhupesh Sharma authored
make dtbs_check currently reports the following errors with qrb5165-rb5 led nodes: arch/arm64/boot/dts/qcom/qrb5165-rb5.dtb: leds: 'bt', 'user4', 'wlan' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Fix the same. Also while at it, fix a blank line issue in the led node. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Bhupesh Sharma authored
make dtbs_check currently reports the following warnings with qrb5165-rb5 lpg nodes: arch/arm64/boot/dts/qcom/qrb5165-rb5.dts: Warning (reg_format): /soc@0/spmi@c440000/pmic@5/lpg/led@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) arch/arm64/boot/dts/qcom/qrb5165-rb5.dts: Warning (avoid_default_addr_size): /soc@0/spmi@c440000/pmic@5/lpg/led@1: Relying on default #address-cells value Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Bjorn Andersson authored
The kernel log contains complaints about i2c11 and i2c14 lacking clock-frequency, specify a reasonable value to suppress this warning. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20220717034403.2135027-4-bjorn.andersson@linaro.org
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Bjorn Andersson authored
Enable gpi_dma1 so that i2c14 is able to find its DMA controller. Signed-off-by:
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Bjorn Andersson authored
The I2C and SPI might be configured in GPI DMA mode, fill in the properties needed for this. Signed-off-by:
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- 18 Jul, 2022 3 commits
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Kuogee Hsieh authored
Both vdda-1p2-supply and vdda-0p9-supply regulators are controlled by dp combo phy. Therefore remove them from dp controller. Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Steev Klimaszewski authored
qcom-cpufreq-hw finds turbo-mode in the LUT hardware tables and slaps the flag on the last element, so there's no reason to add it in the dts, so remove it. Signed-off-by:
Steev Klimaszewski <steev@kali.org> Signed-off-by:
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Steev Klimaszewski authored
When booting a Thinkpad x13s, we see the message [ 0.997647] cpu cpu0: failed to update OPP for freq=300000 So, lets add in 300MHz to make it happy Signed-off-by:
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- 17 Jul, 2022 4 commits
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Johan Hovold authored
Three SoCs did not follow the interrupt order specified by the USB controller binding. While keeping the non-SuperSpeed interrupts together seems natural, reorder the interrupts to match the binding. Acked-by:
Johan Hovold <johan+linaro@kernel.org> [bjorn: Omitted sdx65 part from this patch] Signed-off-by:
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Johan Hovold authored
Only one of the USB controllers supports SuperSpeed and have an SS PHY wakeup interrupt. Reorder the interrupts so that they match the updated binding which specifically has the optional interrupt last. Acked-by:
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Johan Hovold authored
The two single-port SC8280XP USB controllers do not have an hs_phy_irq interrupt. Instead they have a pwr_event interrupt which is distinct from the former and not yet supported by the driver. Fix the USB node interrupt names so that they match the devicetree binding. Also fix the pwr_event interrupt of the second controller which should be 811 as noticed by Andrew Halaney. Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Reviewed-by:
Andrew Halaney <ahalaney@redhat.com> Acked-by:
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Johan Hovold authored
Fix the USB controller clock order and naming so that they match the devicetree binding. Note that the driver currently simply enables all clocks in the order that they are specified in the devicetree. Reordering the clocks as per the binding means that the only explicit ordering constraint found in the vendor driver, that cfg_noc should be enabled before the core_clk, is now honoured. Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by:
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- 16 Jul, 2022 16 commits
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Johan Hovold authored
Fix the usb_1 SS PHY interrupt, which was mistakingly replaced with one of the usb_2 PHY interrupts. Signed-off-by:
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Manivannan Sadhasivam authored
PPI interrupt should be 7 for the PMU. Cc: Johan Hovold <johan+linaro@kernel.org> Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Reported-by:
Steve Capper <Steve.Capper@arm.com> Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by:
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Parikshit Pareek authored
There has been wrong values introduced for context interrupt for smu node apps_smmu. Fix those ones with due correction. Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by:
Parikshit Pareek <quic_ppareek@quicinc.com> Signed-off-by:
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Sumit Garg authored
Currently the DT for QCS404 SoC has setup for 2 USB2 PHYs with one each assigned to USB3 controller and USB2 controller. This assignment is incorrect which only works by luck: as when each USB HCI comes up it configures the *other* controllers PHY which is enough to make them happy. If, for any reason, we were to disable one of the controllers then both would stop working. This was a difficult inconsistency to be caught which was found while trying to enable USB support in u-boot. So with all the required drivers ported to u-boot, I couldn't get the same USB storage device enumerated in u-boot which was being enumerated fine by the kernel. The root cause of the problem came out to be that I wasn't enabling USB2 PHY: "usb2_phy_prim" in u-boot. Then I realised that via simply disabling the same USB2 PHY currently assigned to USB2 host controller in the kernel disabled enumeration for USB3 host controller as well. So fix this inconsistency by correctly assigning USB2 PHYs. Fixes: 9375e7d7 ("arm64: dts: qcom: qcs404: Add USB devices and PHYs") Signed-off-by:
Sumit Garg <sumit.garg@linaro.org> Reviewed-by:
Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
The eDP node includes two clocks which are used by the eDP PHY rather than eDP controller itself. Drop these clocks to remove extra difference between eDP and DP controllers. Suggested-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Dmitry Baryshkov authored
Drop #address/#size-cells from eDP device node. For eDP the panels are not described directly under the controller node. They are either present under aux-bus child node, or they are declared separately (e.g. in a /soc node). Reviewed-by:
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Dmitry Baryshkov authored
Drop #clock-cells from DP device node. It is a leftover from the times before splitting the deviice into controller and PHY devices. Now the clocks are provided by the PHY, while the controller doesn't provide any clocks. Reviewed-by:
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Dmitry Baryshkov authored
Follow the schema for the DP controller and declare 5 register regions instead of using a single region for all the registers. Note, this extends the dts by adding p1 region to the DP node (to be used for DP MST). Signed-off-by:
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Dmitry Baryshkov authored
Drop #clock-cells from DP device node. It is a leftover from the times before splitting the device into controller and PHY devices. Now the clocks are provided by the PHY, while the controller doesn't provide any clocks. Reviewed-by:
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Dmitry Baryshkov authored
Follow the schema for the DP controller and declare 5 register regions instead of using a single region for all the registers. Note, this extends the dts by adding p1 region to the DP node (to be used for DP MST). Signed-off-by:
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Srinivasa Rao Mandadapu authored
Move wcd specific pin conf to common file to support various herbronie variant boards and to avoid duplicate nodes in dts files. Signed-off-by:
Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reviewed-by:
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Marijn Suijten authored
These voltages are not a multiple of the given step-size 8000 (with base voltage 1664000) in pm8998_pldo, resulting in PLDO regulators l18 and l22 failing to validate and in turn not probing the rpm-pm8998-regulator driver: l18: unsupportable voltage constraints 2856000-2848000uV qcom_rpm_smd_regulator rpm-glink:rpm-requests:pm8998-regulators: l18: devm_regulator_register() failed, ret=-22 Round the voltages down for the sake of erring on the safe side, leaving a comment in place to document this discrepancy wrt downstream sources. Fixes: 390883af ("arm64: dts: qcom: msm8998: Introduce support for Sony Yoshino platform") Reported-by:Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
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Marijn Suijten authored
It seems the SM6350_CX definition was temporarily replaced with its literal value 0 in 1797e1c9 ("arm64: dts: qcom: sm6350: Add SDHCI1/2 nodes") to prevent a dependency on the qcom-rpmpd.h header patch being available prior to this DT patch being applied, similar to c23f1b77 ("arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX"). However, unlike the revert of that in the sm6125 tree the next merge window around in a90b8adf ("Revert "arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX""), this has not yet happened for sm6350: replace them back now that the definitions are definitely available. Signed-off-by:
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Robert Marko authored
Add interrupt-parent to the SoC DTSI to avoid duplicating it in each board DTS file. Remove interrupt-parent from existing board DTS files. Signed-off-by:
Robert Marko <robimarko@gmail.com> Signed-off-by:
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Robert Marko authored
Add #size-cells and #address-cells to the SoC DTSI to avoid duplicating the same properties in board DTS files. Remove the mentioned properties from current board DTS files. Signed-off-by:
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Dmitry Baryshkov authored
Rename DPU device node to display-controller@ae01000 to follow the DPU schema. Signed-off-by:
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