- 11 May, 2012 7 commits
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Richard Zhao authored
It'll be easier to add other board specific code. Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Add basic support for imx6q-sabresd. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Do not hardcode the local mac address. Let bootloader retrieve it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
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Fabio Estevam authored
Remove bootargs field as this information is retrieved from the bootloader. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Ying-Chun Liu (PaulLiu) authored
Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Signed-off-by: Richard Zhao <richard.zhao@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- 09 May, 2012 4 commits
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo authored
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
This patch also adds the SPDIF baud clock mux and dividers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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- 02 May, 2012 11 commits
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
This also changes the DMA clkdev lookup to use the imx-dma driver name and "ahb" as connection ID to request the hclk dma clock. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Shawn Guo authored
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo authored
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo authored
This PLL is found on i.MX6 SoCs Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Sascha Hauer authored
This PLL is found on i.MX51 and i.MX53 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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- 25 Apr, 2012 18 commits
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Sascha Hauer authored
- Add necessary #ifdefs for CONFIG_COMMON_CLOCK - Add a global spinlock to protect the CCM registers Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Instead of having a cpu_is_* in each ccm register access it is more efficient to make it a variable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
We used to pass the timer clock directly to mxc_timer_init. We should instead request the correct clock. This is an intermediate step: For now we request the clock in the timer code when NULL is passed as clock. Also, the gpt on some i.MX have an additional ipg clock which can be gated. Request and enable this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
prepare the clock before enabling it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Every i.MX ehci controller has a ahb and a ipg clock, so request it on every SoC. Do not make a special case for the usb phy clock of the i.MX51. Just request it but make it optional. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer authored
the current i.MX clock support groups together unrelated clocks to a single clock which is then used by the driver. This can't be accomplished with the generic clock framework so we instead request the individual clocks in the driver. For i.MX there are generally three different clocks: ipg: bus clock (needed to access registers) ahb: dma relevant clock, sometimes referred to as hclk in the datasheet per: bit clock, pixel clock This patch changes the driver to request the individual clocks. Currently all clk_get will get the same clock until the SoCs are converted to the generic clock framework Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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