- 27 Jun, 2024 40 commits
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Ryan Seto authored
[WHY] Added HW cursor visual confirm [HOW] Added visual confirm logic when programming cursor positions. HW is programmed on cursor updates since cursor can change without flips. Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Alex Hung <alex.hung@amd.com> Signed-off-by:
Ryan Seto <ryanseto@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Nevenko Stupar authored
[WHY & HOW] Adjust hot spot positions between ODM slices when cursor magnification is used. Reviewed-by:
Sridevi Arvindekar <sridevi.arvindekar@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Nevenko Stupar <nevenko.stupar@amd.com> Tested-by:
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Alvin Lee authored
[WHAT & HOW] We must wait for ODM double buffer updates to complete before exiting the pipe update sequence or we may reduce DISPCLK and hit some transient underflow (pixel rate is reduced before the pipes have ODM enabled). Reviewed-by:
Samson Tam <samson.tam@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
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Duncan Ma authored
[WHY] When system exits idle state followed by enabling the display, DSC memory may still be forced in a deep sleep or shutdown state. Intermittent DSC corruption is seen when display is visible. [HOW] When DSC is enabled, reset dsc memory to force and disable status. Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Duncan Ma <duncan.ma@amd.com> Tested-by:
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Alvin Lee authored
[WHAT & HOW] According to register specifications, the CURSOR_DST_X_OFFSET is relative to the start of the data viewport, not RECOUT space. In this case we must transform the cursor coordinates passed to hubp401_cursor_set_position into viewport space to program this register. This fixes an underflow issue that occurs in scaled mode with low refresh rate. Reviewed-by:
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Alex Hung authored
[WHAT] 1. is_pwrseq0 needs to check link before accessing link->link_index. 2. context is checked before accessing its bw_ctx.dml2 3. clk_mgr_base->bw_params is checked before clk_table.num_entries_per_cl This fixes 4 REVERSE_INULL issues reported by Coverity. Reviewed-by:
Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by:
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Daniel Sa authored
[WHY] Some monitors are forced to a lower resolution and refresh rate after system restarts. [HOW] Some monitors may give invalid LTTPR information when queried such as indicating they have one DP lane instead of 4. If given an invalid DPCD version, skip over getting lttpr link rate and lane counts. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
Daniel Sa <daniel.sa@amd.com> Tested-by:
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Dillon Varone authored
[WHY & HOW] Currently the force only works for a single display, make it so it can be forced per stream. Reviewed-by:
Dillon Varone <dillon.varone@amd.com> Tested-by:
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Sung-huai Wang authored
[WHY] Underflow occurs on some platforms when urgent BW is close to the maximum in DPM0. [HOW] It does not occur at DPM1, so as a workaround restrict the maximum amount and increase the lowest state index for clock states until we're out of DPM0. Adds DML2 config options to specify this pe platform as required. Reviewed-by:
Sung-huai Wang <danny.wang@amd.com> Tested-by:
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George Shen authored
[WHY] In check_mode_supported, we should validate that the required clocks can be successfully mapped to DPM levels. This ensures we only apply dynamic ODM optimizations to modes that are supported without dynamic ODM optimizations to begin with. [HOW] Call dpmm to check that the display config can successfully be mapped to a DPM level. Reviewed-by:
Chaitanya Dhere <chaitanya.dhere@amd.com> Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by:
George Shen <george.shen@amd.com> Tested-by:
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TungYu Lu authored
[WHY] Tiled displays showed not aligned on 8K60hz when system resumed from S3/S4. [HOW] Do dc_trigger_sync to re-sync pipes to ensure OTG become synced. Reviewed-by:
TungYu Lu <tungyu.lu@amd.com> Tested-by:
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Leo (Hanghong) Ma authored
[WHY && HOW] Some DP EDID CTS tests fail due to HPO disable, and we should keep it enable on DCN4 dGPU. Reviewed-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Tested-by:
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Aurabindo Pillai authored
[WHAT & HOW] On DCN401, the cursor composition to the plane happens after scaler. So the cursor isn't stretched with the rest of the surface. Temporarily disable hardware cursor in case when hardware rotation is enabled such that userspace falls back to software cursor. Reviewed-by:
Sun peng Li <sunpeng.li@amd.com> Reviewed-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by:
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Joan Lee authored
[WHY & HOW] Driver side adding replay general cmd interface. Replay general command will config at most two uint_32 parameters, with a replay general command subtype to set relative configurations. Reviewed-by:
Joan Lee <joan.lee@amd.com> Tested-by:
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Alex Hung authored
[WHAT & HOW] Check mod_hdcp_execute_and_set() return values in authenticated_dp. This fixes 3 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] dm_dmub_hw_init and drm_dp_mst_topology_mgr_set_mst can return error codes and errors should be reported. This fixes 2 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] BIOS_CMD_TABLE_REVISION and link_transmitter_control can return error codes and errors should be reported. This fixes 3 CHECKED_RETURN issues reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] clk_mgr_helper_get_active_display_cnt returns display count and itself alone has no use. This fixes 1 CHECKED_RETURN issue reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] surf_linear_128_l/c are used in CalculateBytePerPixelAndBlockSizes before they are assigned, so initializing them before passing them into the function. This fixes 2 UNINIT issues reported by Coverity. Reviewed-by:
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Nevenko Stupar authored
[WHY & HOW] Fix the cursor size between ODM slices. Reviewed-by:
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Alex Hung authored
[WHAT] The DC_LOG_DC should be run after link->link_enc is checked, not before. This fixes 1 REVERSE_INULL issue reported by Coverity. Reviewed-by:
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Alex Hung authored
[WHAT & HOW] The null checks for pipe_ctx->stream and pipe_ctx->stream_res.tg are redundant as they were already dereferenced previously, as reported by Coverity; therefore the null checks are removed. This fixes 6 REVERSE_INULL issues reported by Coverity. Reviewed-by:
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Michael Strauss authored
[WHY] New register field added in DP2.1 SCR, needed for auxless ALPM [HOW] Echo value read from 0xF0007 back to sink Reviewed-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Nevenko Stupar authored
[WHY & HOW] Current code for cursor positions does not work properly with different ODM options and HW rotations like ODM 2to1, 3to1 and 4to1, and has different issues depending on angle of HW rotations. [HOW] Fixed these issues so to work properly when ODM is used with HW rotations. Reviewed-by:
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Ivan Lipski authored
[WHY] Coverity analysis flagged this code as DEADCODE because the condition '(!need_recovery)' is never true. The variable 'need_recovery' is initialized as 'true', is not assigned to 'false' anywhere before the conditional statement. Since the variable is only used for the conditional check, but the check can never be true, the variable itself is redundant. [HOW] Removed the variable 'need_recovery'. Reviewed-by:
Ivan Lipski <ivlipski@amd.com> Tested-by:
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Hawking Zhang authored
fault_status is read only register. fault_cntl is not accessible from guest environment. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
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Ivan Lipski authored
[WHY] Coverity analysis flagged these files as containing DEADCODE, i. e. redundant or unreachabale. In these files, variable 'mode_422' is always the same file (0 or false), so any code logic with it is redundant. [HOW] Removed 'mode_422' variable and all code with it from 'display_rq_dlg_calc_' functions in dml. Reviewed-by:
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Relja Vojvodic authored
[WHY] Function was used to check the number of FEs connected to the current BE. This was then used to determine if the symclk could be disabled, if all FEs were disconnected. However, the function would skip over the primary FE and return 0 when the primary FE was still connected. This caused black screens on driver disable with an MST daisy chain hooked up. [HOW] Refactored the function to correctly return the number of FEs connected to the input BE. Also renamed it for clarity. Reviewed-by:
Relja Vojvodic <relja.vojvodic@amd.com> Tested-by:
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Nicholas Susanto authored
[WHY] On hotpluggin a 4k144 HDMI FRL setup, display fails FRL link training and falls back to TMDS which is caused by driver not ungating HPO before doing FRL link training. [HOW] Enable debug flag to disable HPO power gate in DCN35 Reviewed-by:
Charlene Liu <charlene.liu@amd.com> Signed-off-by:
Nicholas Susanto <nicholas.susanto@amd.com> Tested-by:
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Frank Min authored
Access ltr through pci cfg space instead of mmio while programing aspm on gfx12 Signed-off-by:
Frank Min <Frank.Min@amd.com> Reviewed-by:
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Yang Wang authored
refine gfx12 firmware loading Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Kenneth Feng authored
This reverts commit 6b18376e. Revert this due to a final solution: commit ed3165d6 ("drm/amdgpu/jpeg5: reprogram doorbell setting after power up for each playback") Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Reviewed-by:
Sonny Jiang <sonjiang@amd.com> Signed-off-by:
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Frank Min authored
gfx12 only support MTYPE UC and NC, so update it accordingly. Signed-off-by:
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Dan Carpenter authored
We recently added locking to add_queue_mes() but this error path was overlooked. Add an unlock to the error path. Fixes: 1802b042 ("drm/amdgpu/kfd: remove is_hws_hang and is_resetting") Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by:
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Jiapeng Chong authored
No functional modification involved. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3171:2-3: Unneeded semicolon. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3185:2-3: Unneeded semicolon. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_shared.c:3200:2-3: Unneeded semicolon. Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9365Signed-off-by:
Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by:
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Dan Carpenter authored
This code works, but it's not aligned correctly. Add a couple missing tabs. Signed-off-by:
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Pierre-Eric Pelloux-Prayer authored
dma_resv_trylock being successful doesn't guarantee that bo->tbo.base.resv is not NULL, so check its validity before using it. Signed-off-by:
Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by:
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Lijo Lazar authored
Cache the PCI state before bus master is disabled. The saved state is later used for other cases like restoring config space after mode-2 reset. Fixes: 5c03e584 ("drm/amdgpu:add smu mode1/2 support for aldebaran") Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Reviewed-by:
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Yang Wang authored
refine gfx11 firmware loading Signed-off-by:
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Sonny Jiang authored
Doorbell needs to be configured after power up during each playback Signed-off-by:
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