From Sascha Hauer:
ARM i.MX SoC updates for v3.8

* tag 'imx-soc-1' of git://git.pengutronix.de/git/imx/linux-2.6:
  ARM i.MX6: remove gate_mask from pllv3
  ARM i.MX6: Fix ethernet PLL clocks
  ARM i.MX6: rename PLLs according to datasheet
  ARM i.MX6: Add pwm support
  ARM i.MX51: Add pwm support
  ARM i.MX53: Add pwm support
  ARM: mx5: Replace clk_register_clkdev with clock DT lookup
Signed-off-by: Olof Johansson <olof@lixom.net>

Pulling in a newer version of the depend branch from the gpio tree,
since there was some randconfig breakage introduced at the version we
had, and we want to keep those things as bisectable as possible. It's
not bad enough to warrant a rebase though, so there'll be a window of
exposure to this.

* depends/gpio-devel:
  gpio: SPEAr: add spi chipselect control driver
  gpio: gpio-max710x: Support device tree probing
  gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration
  gpio: tegra: read output value when gpio is set in direction_out
  gpio: pca953x: Add compatible strings to gpio-pca953x driver
  gpio: pca953x: Register an IRQ domain
  gpio: mvebu: Set free callback for gpio_chip
  gpio: tegra: Drop exporting static functions
  gpio: tegra: Staticize non-exported symbols
  gpio: tegra: fix suspend/resume apis
  gpio-pch: Set parent dev for gpio chip
  gpio: em: Fix build errors
Signed-off-by: Olof Johansson <olof@lixom.net>

Now that the additional enable bits in the enet PLL are handled
as gates, the gate_mask is identical for all plls. Remove the
gate_mask from the code and use the BM_PLL_ENABLE bit for
enabling/disabling the PLL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

In current code the ethernet PLL is not handled correctly. The PLL runs at 500MHz
and has different outputs. Only the enet reference clock is implemented. This
patch changes the PLL so that it outputs 500MHz and adds the additional outputs
as dividers. This now matches the datasheet which says:

> This PLL synthesizes a low jitter clock from 24 MHz reference clock.
> The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are:
>  • Ref_PCIe = 125 MHz
>  • Ref_SATA = 100 MHz
>  • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

In recent reference manuals the PLLs were renumbered. PLL8 now is
PLL6 and vice versa. Change the code according to the reference
manual to avoid confusion.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>

Similarly as it was done for mx6q, use a DT lookup in order to make maintainance
task for the clock devices easier.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

From Maxime Ripard:

Here is a pull request to add the support for Allwinner A10 SoCs.

* sunxi/soc2:
  ARM: sunxi: Add sunxi restart function via onchip watchdog
  ARM: sunxi: Add sun4i and cubieboard support
  ARM: sunxi: Add earlyprintk support for UART0 (sun4i)
  ARM: sunxi: Restructure sunxi dts/dtsi files
Signed-off-by: Olof Johansson <olof@lixom.net>

From Kukjin Kim:
Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12
SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA
PHY.

As I commented on [4/7], this branch merged pinctrl/samsung to support
pinctrl for exynos4x12 without useless merge conflicts.

* samsung/pinctrl:
  pinctrl: samsung: Update error check for unsigned variables
  pinctrl: samsung: Add support for EXYNOS4X12
  Documentation: Update samsung-pinctrl device tree bindings documentation
  pinctrl: samsung: Add GPIO to IRQ translation
  pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
  pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts
  pinctrl: samsung: Use one GPIO chip per pin bank
  pinctrl: exynos: Use one IRQ domain per pin bank
  pinctrl: samsung: Include bank-specific eint offset in bank struct
  pinctrl: samsung: Hold pointer to driver data in bank struct
  pinctrl: samsung: Match pin banks with their device nodes
  ARM: dts: exynos4210-pinctrl: Add nodes for pin banks
  pinctrl: samsung: Distinguish between pin group and bank nodes
  pinctrl: samsung: Remove static pin enumerations
  pinctrl: samsung: Assing pin numbers dynamically
  pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank
  pinctrl: samsung: Detect and handle unsupported configuration types

From Alexander Shiyan:

The main direction of this patchset - approaching the platform to the
possibility of using configurations with multiple platforms in a single
kernel. Added support of the majority of the necessary kernel symbol.
Also part of the driver code used only for the platform was moved to the
board code and converted to the use of standard drivers.

* clps711x/soc2:
  MAINTAINERS: Add ARM CLPS711X entry
  ARM: clps711x: Update defconfig due latest changes and new kernel symbols
  ARM: clps711x: Rename board files to match functionality
  ARM: clps711x: edb7211: Add support for NOR-Flash
  ARM: clps711x: Moving backlight controls of framebuffer driver to the board
  ARM: clps711x: p720t: Special driver for handling NAND memory is removed
  ARM: clps711x: Moving power management of framebuffer driver to the board
  ARM: clps711x: autcpu12: Special driver for handling NAND memory is removed
  ARM: clps711x: Unused empty "ACK" calls for IRQ-chips removed
  ARM: clps711x: Add FIQ interrupt handling
  ARM: clps711x: Implement usage "MULTI_IRQ_HANDLER" kernel option for a platform
  ARM: clps711x: Implement usage "SPARSE_IRQ" kernel option for a platform
  ARM: clps711x: cdb89712: Special driver for handling memory is removed
  ARM: clps711x: Always select AUTO_ZRELADDR for a platform
  ARM: clps711x: p720t: Unneeded inclusion of head-sa1100.S removed
  ARM: clps711x: Transform clps711x-framebuffer to platform driver and use it
  ARM: clps711x: p720t: Using "leds-gpio" driver for LED control
  ARM: clps711x: Using platform_driver for ethernet device

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch moves the backlight controls for clps711x-framebuffer driver
to the board code. To control we use "generic-bl" driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
[olof: fixed space/tab whitespace in drivers/video/clps711xfb.c]
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch provide migration to using "gpio-nand" driver instead of using
special driver for handling NAND memory.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch moves the power management for clps711x-framebuffer driver
to the board code. To control we use "platform-lcd" driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch provide migration to using "gpio-nand" and "basic-mmio-gpio"
drivers instead of using special driver for handling NAND memory.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

CLPS711X-target CPU can have a several FIQ interrupts. With this patch
we adds handling for a one which will be used for ALSA PCM later.
Since FIQ have a separate handler we only add "mask" and "unmask" calls
which will used for enable/disable_irq functions.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

This patch provide migration to using "physmap-flash" and "mtd-ram"
drivers instead of using special driver for handling memory.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

This is required for some of the clps711x series, so we're bringing in
the dependency explicitly.

By Linus Walleij (5) and others
via Linus Walleij
* depends/gpio-devel:
  GPIO: clps711x: use platform_device_unregister in gpio_clps711x_init()
  gpio/tc3589x: convert to use the simple irqdomain
  gpio/em: convert to linear IRQ domain
  gpio/mvebu: convert to use irq_domain_add_simple()
  gpio/tegra: convert to use linear irqdomain
  gpiolib: unlock on error in gpio_export()
  gpiolib: add gpio get direction callback support
  GPIO: clps711x: Fix direction logic for PORTD
  GPIO: clps711x: Fix return value for gpio_clps711x_get
  gpiolib: Refactor gpio_export
  GPIO: vt8500: Add extended gpio bank for WM8505/WM8650
  gpio: clps711x: delete local <mach/gpio.h> header
  GPIO: Add support for GPIO on CLPS711X-target platform
  DA9055 GPIO driver
  gpio/gpio-omap: Use existing pointer to struct device
  gpio/gpio-pl061: Covert to use devm_* functions
Signed-off-by: Olof Johansson <olof@lixom.net>

From Rob Herring:
Add cpuidle driver support for Calxeda Highbank SOC.

* tag 'highbank-cpuidle' of git://sources.calxeda.com/kernel/linux:
  cpuidle: add Calxeda SOC idle support

From Rob Herring:
Use common debug_ll_init function and remove the static mapping code
from mach-highbank.

* tag 'highbank-debugll-cleanup' of git://sources.calxeda.com/kernel/linux:
  ARM: highbank: use common debug_ll_io_init
  ARM: implement debug_ll_io_init()

From Pawel Moll:
* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
  ARM: vexpress: Remove motherboard dependencies in the DTS files
  ARM: vexpress: Start using new Versatile Express infrastructure
  ARM: vexpress: Add config bus components and clocks to DTs
  mfd: Versatile Express system registers driver
  mfd: Versatile Express config infrastructure

From Mike Turquette:
* depends/clk:
  clk: Common clocks implementation for Versatile Express
  clk: Versatile Express clock generators ("osc") driver
  CLK: clk-twl6040: Initial clock driver for OMAP4+ McPDM fclk clock
  clk: fix return value check in sirfsoc_of_clk_init()
  clk: fix return value check in of_fixed_clk_setup()
  clk: ux500: Update sdmmc clock to 100MHz for u8500
  clk: ux500: Support prcmu ape opp voltage clock
  mfd: dbx500: Export prmcu_request_ape_opp_100_voltage
  clk: Don't return negative numbers for unsigned values with !clk
  clk: Fix documentation typos
  clk: Document .is_enabled op
  clk: SPEAr: Vco-pll: Fix compilation warning

Merge tag 'bcm2835-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc

From Stephen Warren:
ARM: bcm2835: defconfig updates

procfs and sysfs are enabled in bcm2835_defconfig.

* tag 'bcm2835-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
  ARM: bcm2835: enable procfs and sysfs in defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'bcm2835-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/soc

From Stephen Warren:
ARM: bcm2835: core SoC enhancements

A machine restart/reboot implementation is added. The GPIO/pinmux
controller is instantiated, and dummy gpio.h added.

* tag 'bcm2835-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
  ARM: bcm2835: enable GPIO/pinctrl
  ARM: bcm2835: implement machine restart hook
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: defconfig update

Many new features are enabled in tegra_defconfig:

* BRCMFMAC: wlan driver, enable as module.
* MTD, MTD_CHAR, MTD_M25P80, SPI_TEGRA20_SLINK, CONFIG_SPI_TEGRA20_SFLASH
  to enable serial flash on Cardhu and TrimSlice.
* PWM/backlight features for use with tegradrm.
* tegradrm; Tegra's new display driver.
* CMA, so that tegradrm can allocate large buffers.
* SquashFS, which is used as the root filesystem on boards based on
  the Tamonten processor module.

* tag 'tegra-for-3.8-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: defconfig updates

Merge tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: cpuidle enhancements

A cpuidle state "LP2" is added, which power-gates the CPUs. Support for
CPUs 1..n is essentially complete, although support for CPU0 could
benefit from future use of coupled-cpuidle or similar techniques.

A couple of very minor cleanups to cpuidle were included too.

This pull request is based on tegra-for-3.8-soc.

* tag 'tegra-for-3.8-cpuidle' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
  ARM: tegra: retain L2 content over CPU suspend/resume
  ARM: tegra30: cpuidle: add powered-down state for CPU0
  ARM: tegra30: flowctrl: add cpu_suspend_exter/exit function
  ARM: tegra30: clocks: add CPU low-power function into tegra_cpu_car_ops
  ARM: tegra30: common: enable csite clock
  ARM: tegra30: cpuidle: add powered-down state for secondary CPUs
  ARM: tegra: cpuidle: add CPU resume function
  ARM: tegra: cpuidle: separate cpuidle driver for different chips
  ARM: tegra: rename the file of "sleep-tXX" to "sleep-tegraXX"
  ARM: tegra: cpuidle: replace LP3 with ARM_CPUIDLE_WFI_STATE

Merge tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From Stephen Warren:
ARM: tegra: core SoC code enhancements

Various small clock initialization table and driver changes to support
WiFi modules, SPI controllers, and host1x (graphics/display hardware).

Various AHB/APB-related clocks were added to the Tegra30 clock driver.

The level 2 cache initialization is now driven by data from device tree,
and the cache configuration tweaked.

AUXDATA is added to support SPI controllers and host1x.

Code to decode Tegra's "speedo" process identification fuses is added.

This pull request is based on tegra-for-3.8-cleanup.

* tag 'tegra-for-3.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (26 commits)
  ARM: tegra: Add Tegra30 host1x clock support
  ARM: tegra: Add AUXDATA for Tegra30 host1x
  ARM: tegra: Add Tegra20 host1x clock support
  ARM: tegra: Add AUXDATA for Tegra20 host1x
  ARM: tegra: Tegra30 speedo-based process identification
  ARM: tegra: Add speedo-based process identification
  ARM: tegra: flexible spare fuse read function
  ARM: tegra: Implement 6395/1 for Tegra
  ARM: tegra: Add OF_DEV_AUXDATA for sflash driver in board dt
  ARM: tegra: enable data prefetch on L2
  ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
  ARM: tegra: common: using OF api for L2 cache init
  ARM: tegra: dt: add L2 cache controller
  ARM: tegra30: clocks: add AHB and APB clocks
  ARM: tegra: set up wlan clocks for tegra dt
  ARM: tegra: move irammap.h to mach-tegra
  ARM: tegra: move iomap.h to mach-tegra
  ARM: tegra: remove <mach/dma.h>
  ARM: tegra: move tegra-ahb.h out of arch/arm/mach-tegra/
  ARM: tegra: remove unnecessary includes of <mach/*.h>
  ...

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

clps711x-framebuffer driver needs to be updated and this is a first step
to make driver better. With this patch we are convert clps711x-framebuffer
to platform device and load this driver from board code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>

Instead of manually create LED class device, we will use "leds-gpio"
driver for LED control.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>