- 29 Apr, 2013 7 commits
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Seung-Woo Kim authored
The hdmi common device registration function does not need extern definition and for error case and unregister case, exynos_drm_hdmi_pdev should be cleared. Signed-off-by:
Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Seung-Woo Kim authored
platform_device_register_simple() never returns NULL, but IS_ERR_OR_NULL macro is used for checking return value in exynos drm driver. Signed-off-by:
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Sylwester Nawrocki authored
This patch adds OF initialization support for the FIMC driver. The binding documentation can be found at Documentation/devicetree/ bindings/media/samsung-fimc.txt. The syscon regmap interface is used to serialize access to the shared CAMBLK registers from within the V4L2 FIMC-IS and the DRM FIMC drivers. The DRM driver uses this interface for setting up the FIFO data link between FIMD and FIMC IP blocks, while the V4L2 one for setting up a data link between the camera ISP and FIMC for camera capture. The CAMBLK registers are not accessed any more through a statically mapped IO. Synchronized access to these registers is required for simultaneous operation of the camera ISP and the DRM IPP on Exynos4x12. The driver data and driver_ids static data structures are removed since Exynos4 is going to be a dt-only platform and there is currently no board file in mainline that defines platform data for the FIMC IPP, i.e. uses it. Camera input signal polarities are not currently parsed from the device tree. Signed-off-by:
Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
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Sylwester Nawrocki authored
The clocks handling is refactored and a "mux" clock handling is added to account for changes in the clocks driver. After switching to the common clock framework the sclk_fimc clock is now split into two clocks: a gate and a mux clock. In order to retain the exisiting functionality two additional consumer clocks are passed to the driver from device tree: "mux" and "parent". Then the driver sets "parent" clock as a parent clock of the "mux" clock. These two additional clocks are optional, and should go away when there is a standard way of setting up parent clocks on DT platforms. Signed-off-by:
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Sylwester Nawrocki authored
There is no need for explicit calls of devm_kfree(), as the allocated memory will be freed during driver's detach. Remove the redundant devm_kfree() calls from probe() and remove() callbacks. Signed-off-by:
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Vikas Sajjan authored
Common Clock Framework introduced the need to prepare clocks before enabling them, otherwise clk_enable() fails. This patch adds clk_prepare_enable and clk_disable_unprepare() calls to the driver. This patch also removes clk_disable() from fimd_remove() as it will be done by pm_runtime_put_sync. Signed-off-by:
Vikas Sajjan <vikas.sajjan@linaro.org> Signed-off-by:
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- 26 Apr, 2013 33 commits
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Dave Airlie authored
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next "Nothing overly exciting here aside from calim's fermi/kepler vram compression patches. The rest is misc fixes I gathered from the list. Most of the stuff from me is fixing issues that have come up from the work on kepler PM, as well as a commit moving all the old-school modesetting out of the way (no code changes here). There's other patches to go on top of that, but, it'll have to wait until I can rip out the old PM code, it's a bit tangled." * 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (38 commits) drm/nouveau/fifo: implement channel creation event generation drm/nouveau/core: allow non-maskable events drm/nouveau/timer: allow alarms to be cancelled drm/nouveau/device: tweak the device/subdev relationship a little drm/nouveau/device: enable proper constructor/destructor drm/nouveau/device: have engine object initialised before creation drm/nouveau/device: convert to engine, rather than subdev drm/nv50-/disp: use self as parent for subobjects drm/nv50-/fifo: use parent as self for subobjects drm/nv20-nv30/gr: use parent as self for subobjects drm/nvc0-/gr: use self as parent for subobjects drm/nv04-nv40/instmem: use self as parent for subobjects drm/nv04-nv40/vm: use self as parent for subobjects drm/nv50-/bar: use self as parent for subobjects drm/nv04-nv40/instmem: remove parent deref hack drm/nouveau/i2c: remove parent deref hack drm/nouveau/core: rebase object ref/use counts after ctor/init/fini events drm/nv50/disp: inform core when we're not creating a new context drm/nouveau/therm: send some messages to debug level drm/nve0/gr: add handling for a bunch of PGRAPH traps ...
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Ben Skeggs authored
Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Fixes not-in-use engines not having their reset() method called on resume. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
This is intended to support named (with a handle, etc) objects having children that don't have an outside reference. This will replace the various hacks around the place where subdev objects have children, and have to manually drop the self-refs so that they can be destroyed etc when all the outside refs have gone. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Christoph Bumiller authored
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Ben Skeggs authored
We need to be able to process interrupts before the DRM code is able to actually enable them, set it up ourselves. Also, it's less convoluted to *not* use the DRM wrappers it appears... Signed-off-by: -
Ben Skeggs authored
It'd be pretty awesome if someone would care enough to port this all properly to a class interface, perhaps submitting a command stream to the core via a sw object on PFIFO (emulating how EVO works basically, and also what nvidia have done forever..).. But, this seems unlikely given how old this hardware is now, so, lets just hide it away. There's a heap of other bits and pieces laying around that are still tangled. I'll (re)move them in pieces. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Seen in the wild, don't have the hardware but this hacks things up to treat it the same as GF119 for now. Should be relatively safe, I'd be very surprised if anything major changed outside of PGRAPH. PGRAPH (3D etc) is disabled by default however until it's confirmed working. Signed-off-by: -
Roy Spliet authored
v2: read, don't assume.. *puts on brown paper bag* Signed-off-by:
Roy Spliet <r.spliet@student.tudelft.nl> Signed-off-by:
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Florian Scholz authored
This patch adds support for the backlight control of the NVIDIA GT 525M, which identifies itself as a member of the NVC0 family. v2. Extended to handle Kepler too Signed-off-by: -
Christoph Bumiller authored
Signed-off-by:
Christoph Bumiller <e0425955@student.tuwien.ac.at> Signed-off-by:
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Christoph Bumiller authored
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Christoph Bumiller authored
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Christoph Bumiller authored
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Ben Skeggs authored
Compression not supported, and will be silently dropped. Original G80 can't handle this either and requires LINEAR memtype, though it's still possible to correctly texture and m2mf to/from these objects anyway. Signed-off-by:
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