- 26 Jan, 2018 4 commits
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Gregory CLEMENT authored
On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock is optional because not all the SoCs need them but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updating accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Gregory CLEMENT authored
clk_disable_unprepare() already checks that the clock pointer is valid. No need to test it before calling it. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Gustavo A. R. Silva authored
Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Yixun Lan authored
Add description for 'data' parameter and drop unused 'irq' memeber. Here is the warnings: drivers/i2c/busses/i2c-meson.c:103: warning: No description found for parameter 'data' drivers/i2c/busses/i2c-meson.c:103: warning: Excess struct member 'irq' description in 'meson_i2c' Reported-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 24 Jan, 2018 5 commits
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Jian Hu authored
This patch try to add support for I2C controller in Meson-AXG SoC, Due to the IP changes between I2C controller, we need to introduce a compatible data to make the divider factor configurable. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jian Hu authored
Update the doc to explicitly add Meson-AXG to support list Signed-off-by: Jian Hu <jian.hu@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Fugang Duan authored
Add runtime pm support to dynamically manage the clock to avoid enable/disable clock in frequently that can improve the i2c bus transfer performance. And use pm_runtime_force_suspend/resume() instead of lpi2c_imx_suspend/resume(). Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Nothing big, but they get annoying after a while ;) Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Bartosz Golaszewski authored
i2c_davinci_cpufreq_transition() is implemented in a way that will block if it ever gets called while no transfer is in progress. Not only that, but reinit_completion() is never called for xfr_complete. Use the fact that cpufreq uses an srcu_notifier (running in process context) for transitions and that the bus_lock is taken during the call to master_xfer() and simplify the code by removing the transfer completion entirely and protecting i2c_davinci_cpufreq_transition() with i2c_lock/unlock_adapter(). Reported-by: David Lechner <david@lechnology.com> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Sekhar Nori <nsekhar@ti.com> Tested-by: David Lechner <david@lechnology.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 17 Jan, 2018 4 commits
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Wolfram Sang authored
gcc noticed the kerneldoc was wrongly formatted. Fix it! drivers/i2c/busses/i2c-rk3x.c:164: warning: Cannot understand * @grf_offset: ... on line 164 - I thought it was a doc line Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Julia Lawall authored
This driver creates a number of const structures that it stores in the data field of an of_device_id array. The data field of an of_device_id structure has type const void *, so there is no need for a const-discarding cast when putting const values into such a structure. Furthermore, adding const to the declaration of the location that receives a const value from such a field ensures that the compiler will continue to check that the value is not modified. The const-discarding cast on the extraction from the data field is thus no longer needed. Done using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
That path has gone away for a long time. Move the HW name upwards for a proper header. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Arnd Bergmann authored
As of v4.15, Kbuild warns about missing MODULE_LICENSE tags: WARNING: modpost: missing MODULE_LICENSE() in drivers/i2c/busses/i2c-acorn.o This adds a license, author and description tag, matching the comment at the start of the acorn i2c driver. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 15 Jan, 2018 20 commits
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Wolfram Sang authored
We can force levels of SCL and SDA, so we can use that for bus recovery. Note that we cannot read SDA back, because we will only get the internal state of the bus free detection. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
If we managed to get a client release SDA again, send a STOP afterwards to make sure we have a consistent state on the bus again. Tested-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
If we have a function to control SDA, we should ensure that SDA is not held down by us. So, release the GPIO in this case. Tested-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
This will be needed when we want to create STOP conditions, too, later. Create the needed fields and populate them for the GPIO case if the GPIO is set to output. Tested-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
No reason to have them undefined, so let's add them. Tested-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
"Used internally" is vague. What it actually means is that those fields are populated by the core if valid GPIOs are provided. Change the comments to reflect that. Tested-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Andrzej Hajda authored
Exynos-I2C uses default timeout of 1 second for the whole transaction, including re-transmissions due to arbitration lost errors (-EAGAIN). To allow re-transmissions driver's internal timeout should be significantly lower, 100ms seems to be good candidate. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Radu Rendec authored
Use only a portion of the data buffer for DMA transfers, which is always 16-byte aligned. This makes the DMA buffer address 16-byte aligned and compensates for spurious hardware parity errors that may appear when the DMA buffer address is not 16-byte aligned. The data buffer is enlarged in order to accommodate any possible 16-byte alignment offset and changes the DMA code to only use a portion of the data buffer, which is 16-byte aligned. The symptom of the hardware issue is the same as the one addressed in v3.12-rc2-5-gbf416910 and manifests by transfers failing with EIO, with bit 9 being set in the ERRSTS register. Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Arseny Solokha authored
Remove the facility for setting the prescaler value at compile time entirely. It was only used for two SoCs, duplicating the actual value for one of them and setting sometimes bogus value for another. Make all MPC8xxx SoCs obtain their actual I2C clock prescaler from a single place in the code. Changes from v2: - left Device Tree compatibles in place Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Arseny Solokha authored
According to the reference manuals for the corresponding SoCs, SEC frequency ratio configuration is indicated by bit 26 of the POR Device Status Register 2. Consequently, SEC_CFG bit should be tested by mask 0x20, not 0x80. Testing the wrong bit leads to selection of wrong I2C clock prescaler on those SoCs. Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Arseny Solokha authored
Commit 8ce795cb ("i2c: mpc: assign the correct prescaler from SVR") introduced the common helper function for obtaining the actual clock prescaler value for MPC85xx. However, getting the prescaler for MPC8544 which depends on the SEC frequency ratio on this platform, has been always performed separately based on the corresponding Device Tree configuration. Move special handling of MPC8544 into that common helper. Make it dependent on the SoC version and not on Device Tree compatible node, as is the case with all other SoCs. Handle MPC8533 the same way which is similar to MPC8544 in this regard, according to AN2919 "Determining the I2C Frequency Divider Ratio for SCL". Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Arseny Solokha authored
Obtaining the actual I2C clock prescaler value in mpc_i2c_setup_8xxx() only happens when the clock parameter is set to something other than MPC_I2C_CLOCK_LEGACY. When the clock parameter is exactly MPC_I2C_CLOCK_LEGACY, the prescaler parameter is used in arithmetic division as provided by the caller, resulting in a division by zero for the majority of processors supported by the module. Avoid division by zero by obtaining the actual I2C clock prescaler in mpc_i2c_setup_8xxx() unconditionally regardless of the passed clock value. Signed-off-by: Arseny Solokha <asolokha@kb.kras.ru> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Radu Rendec authored
This patch dumps general and master registers at the end of transactions when debugging is enabled. Previously, registers were only dumped before submitting new descriptors (at the beginning of transactions). This helps debugging if some registers change as result of a failed transaction (e.g. bits are set in the ERRSTS general register). Signed-off-by: Radu Rendec <radu.rendec@gmail.com> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Make use of the new formula for more precise bus frequencies. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
The formula to generate the desired bus speeds has changed a little over time. Implement the new formula and allow drivers to opt-in by changing to this new config set. Ensure in probe that we don't divide by zero. The returned values on a R-Car H2 (r8a7790/Lager board) match the suggested values in the datasheet. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Because we will add a second formula soon, put the sanity checks for the computed results into a separate function. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Start RuntimePM a bit earlier, so we can use it to enable the clock during probe for frequency calculations. Make sure it is enabled before calling setup(). Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Require the setup callback and move the frequency calculation into it. This is in preparation for supporting multiple formulas. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
The setup callback will be more generic and, thus, need to be able to return error codes. Change the return type to 'int' for that. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
For refactoring reasons, we will need this information before the setup callback. Also, simplify the comment to a oneliner. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 04 Jan, 2018 1 commit
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Jan Kundrát authored
"Slow" GPIOs (usually those connected over an SPI or an I2C bus) are, well, slow in their operation. It is generally a good idea to avoid using them for time-critical operation, but sometimes the hardware just sucks, and the software has to cope. In addition to that, the I2C bus itself does not actually define any strict timing limits; the bus is free to go all the way down to DC. The timeouts (and therefore the slowest acceptable frequency) are present only in SMBus. The `can_sleep` is IMHO a wrong concept to use here. My SPI-to-quad-UART chip (MAX14830) is connected via a 26MHz SPI bus, and it happily drives SCL at 200kHz (5µs pulses) during my benchmarks. That's faster than the maximal allowed speed of the traditional I2C. The previous version of this code did not really block operation over slow GPIO pins, anyway. Instead, it just resorted to printing a warning with a backtrace each time a GPIO pin was accessed, thereby slowing things down even more. Finally, it's not just me. A similar patch was originally submitted in 2015 [1]. [1] https://patchwork.ozlabs.org/patch/450956/Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 03 Jan, 2018 4 commits
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Jun Gao authored
Make sure i2c module clock has been enabled before i2c registers access. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jun Gao authored
Add i2c compatible for MT2712. Compare to MT8173 i2c controller, internal divider of i2c source clock need to be configured for MT2712 i2c speed calculation. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jun Gao authored
Add MT2712 i2c binding to binding file. Compare to MT8173 i2c controller, MT2712 has timing adjust registers which can adjust the internal divider of i2c source clock, SCL duty cycle, SCL compare point, start(repeated start) and stop time, SDA change time. Signed-off-by: Jun Gao <jun.gao@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Merge tag 'at24-4.16-updates-for-wolfram' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into i2c/for-4.16 "AT24 updates for 4.16 merge window The driver has been converted to using regmap instead of raw i2c and smbus calls which shrank the code significantly. Device tree binding document has been cleaned up. Device tree support in the driver has been improved and we now support all at24 models as well as two new DT properties (no-read-rollover and wp-gpios). We no longer user unreadable magic values for driver data as the way it was implemented caused problems for some EEPROM models - we switched to regular structs. Aside from that, there's a bunch of coding style fixes and minor improvements all over the place."
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- 02 Jan, 2018 2 commits
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Bartosz Golaszewski authored
Add all supported at24 variants to the of_match table. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
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Bartosz Golaszewski authored
Add other variants of at24 EEPROMs we support in the driver to the list of allowed compatible fallbacks. Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Rob Herring <robh@kernel.org>
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