- 16 Feb, 2024 6 commits
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Yifan Zhang authored
This patch to add PSP 14.0.1 support. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Yifan Zhang authored
This patch to add smuio 14.0.1 support. Signed-off-by:
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Yifan Zhang authored
This patch to add nbio 7.11.1 support. Signed-off-by:
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Yifan Zhang authored
Fix up doorbell setup and clockgating. v2: squash in fixes (Alex) Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Signed-off-by:
Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Signed-off-by:
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Felix Kuehling authored
The TBA and TMA, along with an unused IB allocation, reside at low addresses in the VM address space. A stray VM fault which hits these pages must be serviced by making their page table entries invalid. The scheduler depends upon these pages being resident and fails, preventing a debugger from inspecting the failure state. By relocating these pages above 47 bits in the VM address space they can only be reached when bits [63:48] are set to 1. This makes it much less likely for a misbehaving program to generate accesses to them. The current placement at VA (PAGE_SIZE*2) is readily hit by a NULL access with a small offset. v2: - Move it to the reserved space to avoid concflicts with Mesa - Add macros to make reserved space management easier v3: - Move VM max PFN calculation into AMDGPU_VA_RESERVED macros Cc: Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Cc: Christian Koenig <christian.koenig@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Jay Cornwall <jay.cornwall@amd.com> Signed-off-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Aric Cyr authored
Summary: * Revert some changes related to pixel encoding and clocks that cause corruption * IPS hang fix and FGCG enable by default for DCN35 * PSR-SU/Replay fixes * Plane clip size change treated as medium update * Fix for checking link alignment done during link training. * HDMI compliance test fixes and other improvements Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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- 14 Feb, 2024 30 commits
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Likun Gao authored
Support PSP ip block discovery for psp v14. Add psp ip block for psp v14_0_2 and v14_0_3. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Likun Gao authored
Add a new parameter psp_timeout to limit psp related operation to unify the timeout limition for psp. Signed-off-by:
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Likun Gao authored
Set boot_time_tmr flag for the ASIC which MP0 ip version newer than 14.0.2 For runtime TMR: Init tmr and load tmr should did. For boottime TMR: If do not support autoload, skip init TMR. If support autoload, excute init TMR but skip load tmr. v2: rebase (Alex) Signed-off-by: -
Likun Gao authored
Add flag boot_time_tmr to indicate boot time TMR or runtime TMR instead of function. v2: rework logic (Alex) Signed-off-by:
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Likun Gao authored
Set psp->autoload_supported to true by default, as only a few version of ASIC not support autoload, and the furture version of PSP should support this. Signed-off-by:
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George Shen authored
[Why/How] A regression was identified with the change to add left edge pixel for YCbCr422/420 + ODM combine cases. This reverts commit 288c0254 Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Martin Leung <martin.leung@amd.com> Acked-by:
George Shen <george.shen@amd.com> Tested-by:
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Likun Gao authored
Support PSP ip block for psp v14. Add psp ip block for psp v14_0_2 and v14_0_3. v2: sqaush in 14.0.3 firmware fix (Alex) Signed-off-by:
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Likun Gao authored
Spirom update typically requires extremely long duration for command execution, and special helper function to wait for it's completion. Signed-off-by:
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Lijo Lazar authored
Allow reducing max UCLK in MANUAL performance level. New UCLK value should be less than the max DPM level UCLK level value. Ex: echo manual > "/sys/bus/pci/devices/.../power_dpm_force_performance_level" echo m 1 900 > "/sys/bus/pci/devices/.../pp_od_clk_voltage” echo c > "/sys/bus/pci/devices/.../pp_od_clk_voltage” Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Asad Kamal <asad.kamal@amd.com> Tested-by:
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Felix Kuehling authored
The reservation is there to catch NULL pointer dereferences from the GPU. Reduce the size to 64KB to make sure that shared virtual address programming models can map all CPU-accessible virtual addresses for GPU access. This is also the default for CPU virtual address mappings as seen in /proc/sys/vm/mmap_min_addr. Reviewed-by:
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Hawking Zhang authored
Add psp v14_0 ip block support. v2: rebase (Alex) Signed-off-by:
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Hawking Zhang authored
v1: Add mp v14_0_2 register offset and shift masks header files. (Hawking) v2: Update mp v14_0_2 register offset and shift masks header files to RE2. (Likun) v3: Update mp v14_0_2 register offset and shift masks header files to RE2.5. (Likun) v4: Update mp v14_0_2 register offset and shift masks header files to RE3. (Likun) v5: Updates (Alex) Signed-off-by: -
Rajneesh Bhardwaj authored
Gfx11 debug flags mask is currently set with an implicit assumption that no other mqd update flags exist. This needs to be fixed with newly introduced flag UPDATE_FLAG_IS_GWS by the previous patch. Reviewed-by:
Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Signed-off-by:
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Rajneesh Bhardwaj authored
In certain cooperative group dispatch scenarios the default SPI resource allocation may cause reduced per-CU workgroup occupancy. Set COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST=1 to mitigate soft hang scenarions. Reviewed-by:
Joseph Greathouse <Joseph.Greathouse@amd.com> Signed-off-by:
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Nicholas Kazlauskas authored
[Why] New worst-case measurement observed at 1897us. [How] Increase to 2000us to cover the new worst case + margin. Reviewed-by:
Ovidiu Bunea <ovidiu.bunea@amd.com> Acked-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by:
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Martin Tsai authored
[Why] Without acquiring DMCUB hw lock, a race condition is caused with Panel Replay feature, which will trigger a hang. Indicate that a lock is necessary to prevent this when replay feature is enabled. [How] To allow dmub hw lock on Replay. Reviewed-by:
Robin Chen <robin.chen@amd.com> Acked-by:
Martin Tsai <martin.tsai@amd.com> Tested-by:
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Charlene Liu authored
[why] allow psr-su/replay for z8 Reviewed-by:
Muhammad Ahmed <ahmed.ahmed@amd.com> Reviewed-by:
Sung joon Kim <sungjoon.kim@amd.com> Acked-by:
Charlene Liu <charlene.liu@amd.com> Tested-by:
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Srinivasan Shanmugam authored
The dcn30_get_gamcor_current() function is responsible for determining the current gamma correction mode used by the display controller. However, the 'mode' variable, which stores the gamma correction mode, was not initialized before its first usage, leading to an uninitialized symbol error. Thus initializes the 'mode' variable with a default value of LUT_BYPASS before the conditional statements in the function, improves code clarity and stability, ensuring correct behavior of the dcn30_get_gamcor_current() function in determining the gamma correction mode. Fixes the below: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp_cm.c:77 dpp30_get_gamcor_current() error: uninitialized symbol 'mode'. Fixes: 03f54d7d ("drm/amd/display: Add DCN3 DPP") Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Suggested-by:
Roman Li <roman.li@amd.com> Reviewed-by:
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Thong authored
Update the maximum resolution reported for HEVC encoding on VCN 4 devices to reflect its 8K encoding capability. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3159Signed-off-by:
Thong <thong.thai@amd.com> Reviewed-by:
Ruijing Dong <ruijing.dong@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] Read modify write hazards can occur when using a single shared scratch register between driver and firmware leading to driver accessing DCN in IPS2 and a system hang. [How] Add infrastructure for using REGION6 as a shared firmware state between driver and firmware. This region is uncachable. Replace the existing get/set idle calls with reads/writes to the (volatile) shared firmware state blocks that a separated by at least a cache line between firmware and driver. Remove the workarounds that required rewriting/checking read modify write hazards. Reviewed-by:
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Sohaib Nadeem authored
[why]: issues fixed: - comparison with wider integer type in loop condition which can cause infinite loops - pointer dereference before null check Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Josip Pavic <josip.pavic@amd.com> Acked-by:
Sohaib Nadeem <sohaib.nadeem@amd.com> Tested-by:
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Roman Li authored
[Why] There is a potential memory access violation while iterating through array of dcn35 clks. [How] Limit iteration per array size. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
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Michael Strauss authored
[WHY] Need to fix some broken logic and sequencing in initial commit [HOW] Fix logic handling override deprogramming when exiting SQ128. Don't exit early from dp_set_hw_lane_settings for DP2/FIXED_VS case. Move LTTPR 128b/132b check out of requires_hwss and check during runtime, as LTTPR caps are not populated on initial call. Add pending_test_pattern to link state to allow HWSS to set FFE overrides on retimer TX and/or skip setting APU TX FFE depending on requested pattern. Use updated clock source for SQ128 override sequence. Skip HW FFE preset programming when performing test pattern overrides. Reviewed-by:
Wenjing Liu <wenjing.liu@amd.com> Acked-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Charlene Liu authored
[why] sw has most of the fgcg enabled which is the same as HW default. but driver disabled some due to enable flag not initialized. comparing HW state, we still need to enable dpp and dio. Reviewed-by:
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Wenjing Liu authored
[why] When clip size is changed recout and viewport size would require an update. When the update is clip size only current driver fails to program the update into hardware. [how] Set a new clip_size_change flag when it is detected and set MED update type and reprogram scaling params in next program pipe. Reviewed-by:
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Gabe Teeger authored
This reverts commit f341055b. System hang observed, this commit is thought to be the regression point. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Gabe Teeger <gabe.teeger@amd.com> Tested-by:
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Tom Chung authored
[Why] The original picture aspect ratio in mode struct may have chance be overwritten with wrong aspect ratio data in create_stream_for_sink(). It will create a different VIC output and cause HDMI compliance test failed. [How] Preserve the original picture aspect ratio data during create the stream. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Tom Chung <chiahsuan.chung@amd.com> Tested-by:
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Srinivasan Shanmugam authored
As part of a cleanup amdgpu_dm_fini() function, which is typically called when a device is being shut down or a driver is being unloaded The below error message suggests that there is a potential null pointer dereference issue with adev->dm.dc. In the below, line of code where adev->dm.dc is used without a preceding null check: for (i = 0; i < adev->dm.dc->caps.max_links; i++) { To fix this issue, add a null check for adev->dm.dc before this line. Reported by smatch: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:1959 amdgpu_dm_fini() error: we previously assumed 'adev->dm.dc' could be null (see line 1943) Fixes: 006c26a0 ("drm/amd/display: Fix crash on device remove/driver unload") Cc: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: -
Sohaib Nadeem authored
[why]: This reverts commit 2ff33c75. The commit caused corruption when running some applications in fullscreen Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Acked-by:
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Zhikai Zhai authored
[WHY] We Double-check link status if training successful, but miss the lane align status. [HOW] Add the lane align status check Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Zhikai Zhai <zhikai.zhai@amd.com> Tested-by:
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- 13 Feb, 2024 2 commits
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Mario Limonciello authored
commit ab475033 ("drm/amdgpu/sdma5.2: add begin/end_use ring callbacks") caused GFXOFF control to be used more heavily and the codepath that was removed from commit 0dee7263 ("drm/amd: flush any delayed gfxoff on suspend entry") now can be exercised at suspend again. Users report that by using GNOME to suspend the lockscreen trigger will cause SDMA traffic and the system can deadlock. This reverts commit 0dee7263. Acked-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Mario Limonciello authored
commit 5095d541 ("drm/amd: Evict resources during PM ops prepare() callback") intentionally moved the eviction of resources to earlier in the suspend process, but this introduced a subtle change that it occurs before adev->in_s0ix or adev->in_s3 are set. This meant that APUs actually started to evict resources at suspend time as well. Explicitly set s0ix or s3 in the prepare() stage, and unset them if the prepare() stage failed. v2: squash in warning fix from Stephen Rothwell Reported-by:
Jürg Billeter <j@bitron.ch> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3132#note_2271038 Fixes: 5095d541 ("drm/amd: Evict resources during PM ops prepare() callback") Acked-by:
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- 12 Feb, 2024 2 commits
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Alex Deucher authored
MEM_TRAINING_ENCROACHED_SIZE is for BIST training data. It's not memory type specific. Reviewed-by:
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Hamza Mahfooz authored
Currently, if the abmlevel module parameter is set, it is possible for user space to override the ABM level at some point after boot. However, that is undesirable because it means that we aren't respecting the user's wishes with regard to the level that they want to use. So, prevent user space from changing the ABM level if the module parameter is set to a non-auto value. Tested-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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