Commits · 270a5747802d4cf43b91b9e03cccb1fb5d5e8a34 · Kirill Smelkov / linux

20 Sep, 2011 40 commits
- drm/nvd0/disp: skeletal handling of modeset interrupts · 270a5747
  Ben Skeggs authored Jul 05, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  270a5747
- drm/nvd0/disp: start on SOR encoder functions · 83fc083c
  Ben Skeggs authored Jul 05, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  83fc083c
- drm/nvd0/disp: setup a couple of dma objects we'll need · efd272a7
  Ben Skeggs authored Jul 05, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  efd272a7
- drm/nvd0/disp: start on interrupt handling · 4600522a
  Ben Skeggs authored Jul 05, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  4600522a
- drm/nvd0/disp: whip up some basic dma handling for the evo channels · 51beb428
  Ben Skeggs authored Jul 05, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  51beb428
- drm/nvd0/disp: very initial evo setup · 26f6d88b
  Ben Skeggs authored Jul 04, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  26f6d88b
- drm/nouveau/bios: allow passing in crtc to the init table parser · 02e4f587
  Ben Skeggs authored Jul 06, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  02e4f587
- drm/nvd0/pm: enable clock/voltage hooks · 4784e4aa
  Ben Skeggs authored Jul 04, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  4784e4aa
- drm/nouveau/bios: fix INIT_GPIO for new chipsets · 75139063
  Ben Skeggs authored Jul 03, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  75139063
- drm/nvd0/gpio: initial implementation · d7f8172c
  Ben Skeggs authored Jul 03, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  d7f8172c
- drm/nvd0/i2c: initial implementation · eeb3ca12
  Ben Skeggs authored Jul 02, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  eeb3ca12
- drm/nouveau: initial chipset description for nvdX chipsets · d9f61c2d
  Ben Skeggs authored Jul 04, 2011
```
All the non-stubbed functions should be okay for this chipset, the rest
will be added back as they're figured out.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  d9f61c2d
- drm/nouveau: allow modeset module option to select 'headless mode' · 03bc9675
  Ben Skeggs authored Jul 04, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  03bc9675
- drm/nouveau: fixup init/fini sequence to deal with no CRTCs · 1575b364
  Ben Skeggs authored Jul 04, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  1575b364
- drm/nouveau: make general drm modesetting init common · 048a8859
  Ben Skeggs authored Jul 04, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  048a8859
- drm/nvd0: add a card_type for 0xdX chipsets · 2e9733ff
  Ben Skeggs authored Jul 02, 2011
```
These are different enough from 0xcX to justify it, half fermi, half
kepler(??)..
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  2e9733ff
- drm/nv04/pm: recalibrate timer on nvclk changes · f3f2f54e
  Martin Peres authored Jul 04, 2011
```
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  f3f2f54e
- drm/nouveau/tmr: calibrate for ns timestamps on init · 591b06d7
  Ben Skeggs authored Jul 03, 2011
```
We previously assumed (incorrectly a lot of the time) that PTIMER would
be programmed at a frequency which'd give its 64-bit timestamps in
nanoseconds.

By programming PTIMER ourselves, we avoid this problem.
Reviewed-by: Martin Peres <martin.peres@ensi-bourges.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  591b06d7
- drm/nvc0/gr: unblacklist nvcf acceleration · 16cd399c
  Ben Skeggs authored Jul 02, 2011
```
Reported to be working.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  16cd399c
- drm/nouveau: don't complain for disabled timingset entries · 0b3b5579
  Ben Skeggs authored Jun 29, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  0b3b5579
- drm/nvc0/gr: copy GPC mpart config from PFFB · e425e0b3
  Ben Skeggs authored Jun 29, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  e425e0b3
- drm/nvc0/vram: support non-uniform memory size per controller · aa650096
  Ben Skeggs authored Jun 24, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  aa650096
- drm/nvc0/gr: add support for nvcf chipset · 3c23a7b8
  Ben Skeggs authored Jun 24, 2011
```
untested, written from a trace, accel disabled by default until it is
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  3c23a7b8
- drm/nouveau: allow a nouveau_mm to be created with holes · a12036ba
  Ben Skeggs authored Jun 24, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  a12036ba
- drm/nouveau: embed nouveau_mm · 987eec10
  Ben Skeggs authored Jun 24, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  987eec10
- drm/nv31/mpeg: support for a single class3174 user · 52d07331
  Ben Skeggs authored Jun 23, 2011
```
Uncertain if/how the hw does multiple PMPEG channels, supporting one is
better than none however.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  52d07331
- drm/nouveau: rename nv40_mpeg to nv31_mpeg · 323dcac5
  Ben Skeggs authored Jun 23, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  323dcac5
- drm/nvc0/pm: more complete parsing of clock domains · 9698b9a6
  Ben Skeggs authored Jun 21, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  9698b9a6
- drm/nvc0/pm: initial implementation of clocks_get() · 354d0781
  Ben Skeggs authored Jun 19, 2011
```
Not too certain on memory clock yet, but it gets the right numbers for
each perflvl on my NVC0.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  354d0781
- drm/nva3/pm: idle graphics engine before changing clocks · d0f67a48
  Ben Skeggs authored Jun 18, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  d0f67a48
- drm/nouveau: add function to wait until a callback returns true · 78e2933d
  Ben Skeggs authored Jun 18, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  78e2933d
- drm/nv50/gr: insert set/clr of a ctxprog flag at start/end of ctxprog · 95f0de3a
  Ben Skeggs authored Jun 18, 2011
```
The set will be replaced with a wait on the same flag by a subsequent
commit in order to halt a ctxprog's execution temporarily.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  95f0de3a
- drm/nva3/pm: tidy and add some comments here and there · cec2a270
  Ben Skeggs authored Jun 17, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  cec2a270
- drm/nva3/pm: parse/reclock vdec/41a0 clocks · 4fd2847e
  Ben Skeggs authored Jun 17, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  4fd2847e
- drm/nva3/pm: rewrite clock_set, and switch to new interfaces · ca94a71f
  Ben Skeggs authored Jun 17, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  ca94a71f
- drm/nouveau/pm: add hooks to get/set *all* clocks at once · 77e7da68
  Ben Skeggs authored Jun 17, 2011
```
This is probably better than having to tell the common code about all the
clocks that exist on every chipset.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  77e7da68
- drm/nva3/pm: rewrite clock readback functions, far more correct now · 3b0582d3
  Ben Skeggs authored Jun 17, 2011
```
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  3b0582d3
- drm/nouveau/pm: some fermi chipsets still use volt 0x30 · 03ce8d9e
  Ben Skeggs authored Jun 10, 2011
```
Fun, fun.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  03ce8d9e
- drm/nouveau/pm: allow voltage-only perflvl set, enable nvc0 · da1dc4cf
  Ben Skeggs authored Jun 10, 2011
```
Okay, my card didn't blow up.  Lets turn it on!
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  da1dc4cf
- drm/nvc0/pm: enable voltage_get · 3c71c233
  Ben Skeggs authored Jun 09, 2011
```
I don't have a terribly good reason for not enabling voltage_set too, but,
lets wait and see.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
```
  3c71c233