- 02 May, 2024 39 commits
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Likun Gao authored
Only execute IMU related functions if dpm>0. Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Kenneth Feng authored
support imu related function for gfx v12. Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Likun Gao authored
Split PFF/ME/MEC firmware address setting function from related load microcode funtion, as it's also needed for rlc autolad. Signed-off-by:
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Likun Gao authored
Initial support for GFX 12. v1: Add gfx v12_0 ip block support. (Likun) v2: Switch to gfx.kiq array. Move the vmhub from ring callback to ring. (Hawking) v3: Update various callback function impl. (Hawking) v4: Warning fixes (Alex) v5: squash in imu fix, csb, rlc autoload implementations (Alex) v6: Rebase (Alex) Signed-off-by: -
Jack Xiao authored
Enlarge the data cache boundary. v2: use the fix data cache boundary. Signed-off-by:
Jack Xiao <Jack.Xiao@amd.com> Reviewed-by:
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Jonathan Kim authored
Fix request to MES to set SQ_SHADER_TBA_HI.trap_en for GFX12. Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Signed-off-by:
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shaoyunl authored
On MES12, HW can monitor up to 2048 doorbells that not be mapped currently and trigger the interrupt to MES when these unmapped doorbell been ringed. Signed-off-by:
shaoyunl <shaoyun.liu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Jack Xiao authored
1. fix available compute queue to use 2. enable mes v12 self test Signed-off-by:
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Likun Gao authored
Split the function of mes fimrware address setting from mes firmware load for mes v12, as it's also needed for rlc autoload. Signed-off-by:
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Jack Xiao authored
v1: Add mes v12_0 ip block support. (Jack) v2: Switch to gfx.kiq array. (Hawking) v3: Switch to AMDGPU_GFXHUB(0). (Hawking) v4: Rebase (Alex) Signed-off-by:
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Likun Gao authored
Keep gfx v12 mes fw name to gc_12_x_x_mes.bin and gc_12_x_x_mes1.bin. Signed-off-by:
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Harish Kasiviswanathan authored
Add MES_v12 header definition for gfx12 v2: Modify SET_SHADER_DEBUGGER to match mes_v11 definition. This doesn't change the structure layout v3: Removed unncessary comment and spaces Signed-off-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Likun Gao authored
Add RLC autoload TOC header file for soc24 ASIC. Signed-off-by:
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Likun Gao authored
Add new RLC_TABLE_OF_CONTENT structure definition. Signed-off-by:
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Likun Gao authored
Add gfx12 clearstate register arrays. Signed-off-by:
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Likun Gao authored
Set GC family for GC 12.0 IPs. v2: squash in updates (Alex) Signed-off-by:
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Likun Gao authored
Add gfx v12_0_0 family id Signed-off-by:
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Sonny Jiang authored
VCN5 session info package interface changed Signed-off-by:
Sonny Jiang <sonny.jiang@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
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Hawking Zhang authored
Add gfx v9_4_4 ip block support Signed-off-by:
Le Ma <le.ma@amd.com> Signed-off-by:
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Hawking Zhang authored
Add smu v13_0_14 ip block support Signed-off-by:
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Hawking Zhang authored
Add psp v13_0_14 ip block support. Signed-off-by:
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Hawking Zhang authored
Add sdma v4_4_5 ip block support Signed-off-by:
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Aurabindo Pillai authored
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is made in DC codebase to use 4.1.0 Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Lang Yu authored
Observed on gfx8 ASIC where KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM is used. Two attachments use the same VM, root PD would be locked twice. [ 57.910418] Call Trace: [ 57.793726] ? reserve_bo_and_cond_vms+0x111/0x1c0 [amdgpu] [ 57.793820] amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu+0x6c/0x1c0 [amdgpu] [ 57.793923] ? idr_get_next_ul+0xbe/0x100 [ 57.793933] kfd_process_device_free_bos+0x7e/0xf0 [amdgpu] [ 57.794041] kfd_process_wq_release+0x2ae/0x3c0 [amdgpu] [ 57.794141] ? process_scheduled_works+0x29c/0x580 [ 57.794147] process_scheduled_works+0x303/0x580 [ 57.794157] ? __pfx_worker_thread+0x10/0x10 [ 57.794160] worker_thread+0x1a2/0x370 [ 57.794165] ? __pfx_worker_thread+0x10/0x10 [ 57.794167] kthread+0x11b/0x150 [ 57.794172] ? __pfx_kthread+0x10/0x10 [ 57.794177] ret_from_fork+0x3d/0x60 [ 57.794181] ? __pfx_kthread+0x10/0x10 [ 57.794184] ret_from_fork_asm+0x1b/0x30 Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Reviewed-by:
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Yunxiang Li authored
This is part of the reset, move it into the reset function. Signed-off-by:
Yunxiang Li <Yunxiang.Li@amd.com> Reviewed-by:
Emily Deng <Emily.Deng@amd.com> Reviewed-by:
Zhigang Luo <zhigang.luo@amd.com> Signed-off-by:
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Lijo Lazar authored
amdxcp is a platform driver for creating partition devices. libdrm library identifies a platform device based on 'OF_FULLNAME' or 'MODALIAS'. If two or more devices have the same platform name, drm library only picks the first device. Platform driver core uses name of the device to populate 'MODALIAS'. When 'amdgpu_xcp' is used as the base name, only first partition device gets identified. Assign unique name so that drm library identifies partition devices separately. amdxcp doesn't support probe of partitions, it doesn't bother about modaliases. Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Acked-by:
Christian König <christian.koenig@amd.com> Acked-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Asad Kamal <asad.kamal@amd.com> Signed-off-by:
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Peyton Lee authored
Some version of BIOS does not enable all clock levels, resulting in high level clock frequency of 0. The number of valid CLKs must be confirmed in advance. Signed-off-by:
Peyton Lee <peytolee@amd.com> Reviewed-by:
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Srinivasan Shanmugam authored
This commit removes an unnecessary NULL check in the `dcn10_set_input_transfer_func` function in the `dcn10_hwseq.c` file. The variable `tf` is assigned the address of `plane_state->in_transfer_func` unconditionally, so it can never be `NULL`. Therefore, the check `if (tf == NULL)` is unnecessary and has been removed. Fixes the below smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c:1839 dcn10_set_input_transfer_func() warn: address of 'plane_state->in_transfer_func' is non-NULL Fixes: 285a7054 ("drm/amd/display: Remove plane and stream pointers from dc scratch") Cc: Wenjing Liu <wenjing.liu@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Alvin Lee <alvin.lee2@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Suggested-by:
Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
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Srinivasan Shanmugam authored
This commit removes a redundant NULL check in the `dce110_set_input_transfer_func` function in the `dce110_hwseq.c` file. The variable `tf` is assigned the address of `plane_state->in_transfer_func` unconditionally, so it can never be `NULL`. Therefore, the check `if (tf == NULL)` is unnecessary and has been removed. Fixes the below smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dce110/dce110_hwseq.c:301 dce110_set_input_transfer_func() warn: address of 'plane_state->in_transfer_func' is non-NULL Fixes: 285a7054 ("drm/amd/display: Remove plane and stream pointers from dc scratch") Cc: Wenjing Liu <wenjing.liu@amd.com> Cc: Tom Chung <chiahsuan.chung@amd.com> Cc: Alvin Lee <alvin.lee2@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Roman Li <roman.li@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Suggested-by:
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Yunxiang Li authored
The retry loop for SRIOV reset have refcount and memory leak issue. Depending on which function call fails it can potentially call amdgpu_amdkfd_pre/post_reset different number of times and causes kfd_locked count to be wrong. This will block all future attempts at opening /dev/kfd. The retry loop also leakes resources by calling amdgpu_virt_init_data_exchange multiple times without calling the corresponding fini function. Align with the bare-metal reset path which doesn't have these issues. This means taking the amdgpu_amdkfd_pre/post_reset functions out of the reset loop and calling amdgpu_device_pre_asic_reset each retry which properly free the resources from previous try by calling amdgpu_virt_fini_data_exchange. Signed-off-by:
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Aurabindo Pillai authored
Enable initializing Display Manager for DCN410 IP Signed-off-by:
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Yunxiang Li authored
There are other reset sources that pass NULL as the job pointer, such as amdgpu_amdkfd_reset_work. Therefore, using the job pointer to check if the FLR comes from the host does not work. Add a flag in reset_context to explicitly mark host triggered reset, and set this flag when we receive host reset notification. Signed-off-by:
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Yunxiang Li authored
Some times a hang GPU causes multiple reset sources to schedule resets. The second source will be able to trigger an unnecessary reset if they schedule after we call amdgpu_device_stop_pending_resets. Move amdgpu_device_stop_pending_resets to after the reset is done. Since at this point the GPU is supposedly in a good state, any reset scheduled after this point would be a legitimate reset. Remove unnecessary and incorrect checks for amdgpu_in_reset that was kinda serving this purpose. Signed-off-by:
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Zhigang Luo authored
increase retry times to wait host has enough time to complete reset. Signed-off-by:
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Zhigang Luo authored
VF can't access FB when host is doing mode1 reset. Using sizeof to get vf2pf info size, instead of reading it from vf2pf header stored in FB. Signed-off-by:
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Dan Carpenter authored
These lines are indented too far. Clean the whitespace. Reviewed-by:
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Colin Ian King authored
There are various spelling mistakes in dml2_printf messages, fix them. Reviewed-by:
Colin Ian King <colin.i.king@gmail.com> Signed-off-by:
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Nathan Chancellor authored
When building with clang 19 or newer (which strengthened some of the enum conversion warnings for C), there is a warning (or error with CONFIG_WERROR=y) around doing arithmetic with an enumerated type and a floating point expression. drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_dcn4.c:181:58: error: arithmetic between enumeration type 'enum dentist_divider_range' and floating-point type 'double' [-Werror,-Wenum-float-conversion] 181 | divider = (unsigned int)(DFS_DIVIDER_RANGE_SCALE_FACTOR * (vco_freq_khz / clock_khz)); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. This conversion is expected due to the nature of the enumerated value and definition, so silence the warning by casting the enumeration to an integer explicitly to make it clear to the compiler. Fixes: 70839da6 ("drm/amd/display: Add new DCN401 sources") Reviewed-by:Nathan Chancellor <nathan@kernel.org> Signed-off-by:
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Mario Limonciello authored
Panel replay was enabled by default in commit 5950efe2 ("drm/amd/display: Enable Panel Replay for static screen use case"), but it isn't working properly at least on some BOE and AUO panels. Instead of being static the screen is solid black when active. As it's a new feature that was just introduced that regressed VRR disable it for now so that problem can be properly root caused. Cc: Tom Chung <chiahsuan.chung@amd.com> Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3344 Fixes: 5950efe2 ("drm/amd/display: Enable Panel Replay for static screen use case") Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Acked-by:
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- 30 Apr, 2024 1 commit
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Tim Huang authored
Clear warnings that using uninitialized variable when fails to get the valid value from SMU. Signed-off-by:
Tim Huang <Tim.Huang@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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