- 16 Sep, 2014 40 commits
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Fabio Estevam authored
The lcdif node has a property named "display" and also a child node called "display", which causes the following warning: device-tree: Duplicate name in lcdif@80030000, renamed to "display#1" Rename the child node name in order to avoid the warning. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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Fabio Estevam authored
The lcdif node has a property named "display" and also a child node called "display", which causes the following warning: device-tree: Duplicate name in lcdif@80030000, renamed to "display#1" Rename the child node name in order to avoid the warning. Signed-off-by:
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Fabio Estevam authored
Add support for the "MX28LCD Seiko 4.3' WVGA" panel. Signed-off-by:
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Fabio Estevam authored
imx6sx has the same LCDIF controller IP as in mx28, so add the proper compatible strings. Signed-off-by:
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Philippe Reynes authored
Signed-off-by:
Philippe Reynes <tremyfr@gmail.com> Signed-off-by:
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Lucas Stach authored
Fixes "imx6q-pcie 1ffc000.pcie: missing *config* reg space" error exposed by new versions of the designware pcie driver. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
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Alexander Shiyan authored
This patch adds support for the i.MX1 APF9328 from Armadeus. This change is intended to further remove non-DT support for this board. Signed-off-by:
Alexander Shiyan <shc_work@mail.ru> Signed-off-by:
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Russell King authored
Add the IOMUX setting for the IR input, rather than relying on the boot loader. Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by:
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Rabeeh Khoury authored
HummingBoard after rev 2.0 and the production one starting rev 3.0 uses gpio 3,5 (EIM_DA5 pad) as the gpio infra red receiver input. Since the original Carrier1 board is obsolete and we are retiring it, update the DT file for this. This will mean IR reception will not work on Carrier1 with this DT file. Signed-off-by:
Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by:
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Rabeeh Khoury authored
Initial patch from Rabeeh, but with the electrical properties added. Signed-off-by:
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Rabeeh Khoury authored
Signed-off-by:
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Steffen Trumtrar authored
The i.MX53 has a Cortex-A8 Performance Monitor Unit. Add it to the dtsi. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
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Philipp Zabel authored
This patch adds the battery backed real time clock connected to I2C1 to the device tree. Signed-off-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
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Fabio Estevam authored
Add support for the "MX28LCD Seiko 4.3' WVGA" panel. Signed-off-by:
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Fabio Estevam authored
Let's keep pinctrl nodes sorted. Signed-off-by:
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Tim Harvey authored
Add support for the Gateworks GW5520 board. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
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Alexander Shiyan authored
This patch adds simple-card support to the i.MX SoCs. Signed-off-by:
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Alexander Shiyan authored
This patch adds support for the Freescale (Motorola) i.MX1 ADS board. This change is intended to further remove non-DT support for this board. Signed-off-by:
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Stefan Agner authored
Add USB support for Freescale Vybrid tower. The USB hosts over-current protection signal is not connected to the PHY's over- current protection, hence we need to disable it. Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
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Stefan Agner authored
Add USB support for Colibri VF61 modules. The Colibri standard pinout defines a pin for USB over-current. However, due to lack of pinmux options, the USB hosts over-current protection signal of the Colibri standard could not be connected to the PHY's over-current protection. Hence we need to disable the over-current functionality of the USB controller. Signed-off-by:
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Stefan Agner authored
Add device tree node for usbmisc which controls the non-core USB registers. This is required to use the property to disable the over- current detection. Signed-off-by:
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Stefan Agner authored
This adds USB PHY and USB controller nodes. Vybrid SoCs have two independent USB cores which each supports DR (dual role). However, real OTG is not supported since the OTG ID pin is not available. The PHYs are located within the anadig register range, hence we need to change the length of the anadig registers. Signed-off-by:
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Uwe Kleine-König authored
Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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Marc Kleine-Budde authored
Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de> [ukl: rebase from ancient kernel version] Signed-off-by:
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Michael Grzeschik authored
This patch adds pin configurations for: - csi aud6 - cspi1 uart3 - csi uart5 - cc - csi sdhc2 - csi cspi3 - sd1 cspi2 - cspi1 pwm Signed-off-by:
Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by:
Markus Pargmann <mpa@pengutronix.de> Signed-off-by:
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Markus Pargmann authored
The preloaded script addresses on imx25 and imx35 are different, so imx25 is not compatible with imx35-sdma unless a custom firmware is loaded. Signed-off-by:
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Bill Pringlemeir authored
The ttyLP1 is already the default console/serial port. The tower board will route ttyLP2 to the same connectors depending on the JP23/24 settings. See: http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/276457.html http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/275576.htmlSigned-off-by:
Bill Pringlemeir <bpringlemeir@nbsps.com> Acked-by:
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Anson Huang authored
Add thermal sensor support for i.MX6SL. Signed-off-by:
Anson Huang <b20788@freescale.com> Signed-off-by:
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Alexander Shiyan authored
This patch adds basic devicetree template for i.MX1 based SoCs. Signed-off-by:
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Philipp Zabel authored
Signed-off-by:
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Michael Olbrich authored
Signed-off-by:
Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by:
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Michael Olbrich authored
Signed-off-by:
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Lucas Stach authored
Everything in the PCI specification assumes devices to be enumerable on startup. This is only possible if they have power available. A future improvement may allow this regulator to be switched off for D3hot and D3cold power states, but there is a lot of work to do the pcie host controller side for this to work. To keep things simple always enable the regulator for now. Signed-off-by:
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Stefan Agner authored
The Colibri VF61 is a module which needs a carrier board to actually run. Different carrier board have different hardware support, hence we should reflect this in the device tree files. This patch adds the Colibri Evaluation Board, which supports almost all peripherals defined in the Colibri standard. Also align the compatible naming, file splitting and file naming with the scheme which was choosen for the Tegra based modules. Signed-off-by:
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Shawn Guo authored
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Shawn Guo authored
Immutable branch between MFD and some ARM sub-arch maintainers.
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Fabio Estevam authored
The rtc isl1208 driver is used by mx6 nitrogen board, so let's enable it by default. The fsl sai driver is used by the vf610-twr board, so let's enable it by default. simple-audio-card driver is used by the vf610-twr board, so let's enable it by default. Generated this patch by doing: - make imx_v6_v7_defconfig - make menuconfig and manually select options - make savedefconfig - cp defconfig arch/arm/configs/imx_v6_v7_defconfig ,which results in some additional cleanups. Signed-off-by:
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Fabio Estevam authored
The imx weim driver is used by some mx27/mx1 boards, so let's enable it by default. Generated this patch by doing: - make imx_v4_v5_defconfig - make menuconfig and manually select CONFIG_IMX_WEIM - make savedefconfig - cp defconfig arch/arm/configs/imx_v4_v5_defconfig ,which results in some additional cleanups. Signed-off-by:
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Joe Perches authored
Use the more common pr_warn. Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Anson Huang authored
On i.MX6Q TO > 1.0, i.MX6DL and i.MX6SX, gpt per clock can be from OSC instead of ipg_per, as ipg_per's rate may be scaled when system enter low bus mode, to keep system timer NOT drift, better to make gpt per clock at fixed rate, here add support for gpt per clock to be from OSC which is at fixed rate always. There are some difference on this implementation of gpt per clock source, see below for details: i.MX6Q TO > 1.0: GPT_CR_CLKSRC, b'101 selects fix clock of OSC / 8 for gpt per clk; i.MX6DL and i.MX6SX: GPT_CR_CLKSRC, b'101 selects OSC for gpt per clk, and we must enable GPT_CR_24MEM to enable OSC clk source for gpt per, GPT_PR_PRESCALER24M is for pre-scaling of this OSC clk, here set it to 8 to make gpt per clk is 3MHz; i.MX6SL: ipg_per can be from OSC directly, so no need to implement this new clk source for gpt per. Signed-off-by:
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