- 17 Dec, 2023 1 commit
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Alexey Minnekhanov authored
Panel driver samsung,s6e3fa2 does not use te-gpios. The pin is already configured properly through pinctrl. Fixes: 3657b677 ("ARM: dts: qcom: msm8974-klte: add support for display") Signed-off-by:
Alexey Minnekhanov <alexeymin@postmarketos.org> [luca: adjust commit message, add Fixes tag] Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Link: https://lore.kernel.org/r/20231217-msm8974-misc-v1-1-bece1ba2667d@z3ntu.xyzSigned-off-by:
Bjorn Andersson <andersson@kernel.org>
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- 16 Dec, 2023 3 commits
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André Apitzsch authored
This dts adds support for Motorola Moto G 4G released in 2013. Add a device tree with initial support for: - GPIO keys - Hall sensor - SDHCI - Vibrator Signed-off-by:
André Apitzsch <git@apitzsch.eu> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231214-peregrine-v2-2-a35102268442@apitzsch.euSigned-off-by:
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Krzysztof Kozlowski authored
Add dedicated compatible for the SDHCI MMC controller, because usage of generic qcom,sdhci-msm-v4 compatible alone is deprecated. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Manivannan Sadhasivam authored
Qcom SoCs doesn't support the legacy PCI, but only PCIe. So use the correct node name for the controller instances. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231206135540.17068-2-manivannan.sadhasivam@linaro.orgSigned-off-by:
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- 09 Dec, 2023 2 commits
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Luca Weiss authored
The msm8226 SoC contains an Adreno 305B. Add a node to configure it. Signed-off-by:
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Bryant Mairs authored
Some platforms don't use the built-in charging hardware (e.g. milletwifi). As this is an optional peripheral, default it to off. Keep it enabled for all other boards that use smbb. Signed-off-by:
Bryant Mairs <bryant@mai.rs> Signed-off-by:
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- 07 Dec, 2023 2 commits
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Krzysztof Kozlowski authored
The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by:
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Johan Hovold authored
The DP/DM wakeup interrupts are edge triggered and which edge to trigger on depends on use-case and whether a Low speed or Full/High speed device is connected. Fixes: fea4b410 ("ARM: dts: qcom: sdx55: Add USB3 and PHY support") Cc: stable@vger.kernel.org # 5.12 Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231120164331.8116-2-johan+linaro@kernel.orgSigned-off-by:
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- 04 Dec, 2023 2 commits
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Bjorn Andersson authored
Below pull request for ARM32 DeviceTree updates for v6.7 was posted to late to make it into v6.7, merge it into the branch for v6.8. More Qualcomm Arm32 DeviceTree updates for v6.7 This introduces new DeviceTree source for Microsoft Lumia 640, Microsoft Lumia 640 XL, Nokia Lumia 735, and Nokia Lumia 830, built on MSM8226 and MSM8926. A few stylistic issues are corrected on MSM8974.
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Luca Weiss authored
Add support for this smartphone based on the MSM8926 SoC, codenamed "memul". Supported functionality: * Power & volume buttons * ADSP * Magnetometer * Accelerometer * Touchscreen * Vibrator * SD card * Charger * USB Reviewed-by:
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- 03 Dec, 2023 4 commits
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Matti Lehtimäki authored
Add watchdog for MSM8974 platform. Signed-off-by:
Matti Lehtimäki <matti.lehtimaki@gmail.com> Signed-off-by:
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Krzysztof Kozlowski authored
Node names should not have vendor prefixes: qcom-sdx65-mtp.dtb: qcom,spmi@c440000: $nodename:0: 'qcom,spmi@c440000' does not match '^spmi@.* Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230924183103.49487-3-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
The SDX65 GCC clock controller expects two required clocks: pcie_pipe_clk and usb3_phy_wrapper_gcc_usb30_pipe_clk. The first one is provided by existing phy node, but second is not yet implemented. qcom-sdx65-mtp.dtb: clock-controller@100000: clocks: [[11, 0], [11, 1], [12]] is too short qcom-sdx65-mtp.dtb: clock-controller@100000: clock-names: ['bi_tcxo', 'bi_tcxo_ao', 'sleep_clk'] is too short Reviewed-by:
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Krzysztof Kozlowski authored
Qualcomm PCIe endpoint bindings expect phy-names to be "pciephy": arch/arm/boot/dts/qcom/qcom-sdx65-mtp.dtb: pcie-ep@1c00000: phy-names:0: 'pciephy' was expected Fixes: 9c0bb384 ("ARM: dts: qcom: sdx65: Add support for PCIe EP") Reviewed-by:
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- 14 Nov, 2023 26 commits
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Dmitry Baryshkov authored
Device tree node names should not use vendor prefix, they contain a generic name of the device. Drop the qcom, prefix from the SSBI node name. Signed-off-by:
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Dmitry Baryshkov authored
Device tree node names should not use vendor prefix, they contain a generic name of the device. Drop the qcom, prefix from the SSBI node name. Signed-off-by:
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Dmitry Baryshkov authored
Use generic `adc-channel@N' node names for board-specific ADC channels (routed to MPP pins) to follow the schema. Reviewed-by:
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Dmitry Baryshkov authored
Since keypad is used only by some devices, disable it by default and enable explicitly. Reviewed-by:
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Dmitry Baryshkov authored
The vph-pwr and boost regulators (even if they are unified by design) are not a property of SoC, so move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. The only msm8960 board file (qcom-msm8960-cdp) also defines this node together with the compatible string. Drop the useless device node. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
The set of regulators available over the RPM requests is not a property of the SoC. Move them to board files. Reviewed-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Merge interrups and interrupt-parent properties into a single interrupts-extended property. Suggested-by:
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Dmitry Baryshkov authored
Use symbolic names for IRQ flags instead of using the numeric values. Reviewed-by:
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Dmitry Baryshkov authored
Move reg property to come after compatible. Reviewed-by:
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Dmitry Baryshkov authored
Move reg property to come after compatible. Reviewed-by:
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Dmitry Baryshkov authored
Move pm8921 device nodes to follow the alphanumberic sorting order. Reviewed-by:
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Dmitry Baryshkov authored
Move pm8058 device nodes to follow the alphanumberic sorting order. Reviewed-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
Neil Armstrong <neil.armstrong@linaro.org> Acked-by:
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Dmitry Baryshkov authored
The PMICs are not a part of the SoC, so move PMICs to separate files and include them from the board files. Suggested-by:
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Dmitry Baryshkov authored
The PMIC is not a part of the SoC, so move PMIC to a separate file and include it from the board files. Suggested-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Acked-by:
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Dmitry Baryshkov authored
The interrupt of SSBI PMICs is routed to the SoCs GPIO. As such, it is not a property of the SoC, it is a property of the particular board (even if it is standard and unified between all devices). Move these interrupt specifications to the board files. Reviewed-by:
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Dmitry Baryshkov authored
Change PM8921 node labels to start with pm8921_ prefix, following other Qualcomm PMIC device nodes. Reviewed-by:
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