- 09 Jun, 2023 40 commits
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Austin Zheng authored
Why: Limit maximum clock speeds to DC mode limits for DC mode systems How: Store DC mode limits when individual clocks are initialized and cap the values when building the clock table Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Austin Zheng <austin.zheng@amd.com> Reviewed-by:
Alvin Lee <Alvin.Lee2@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Sridevi authored
[Why] Programming register delta for DSC sub-block [How] Change DSC, resource files for programming register delta. Acked-by:
Sridevi <sarvinde@amd.com> Reviewed-by:
Chris Park <Chris.Park@amd.com> Tested-by:
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Leo Ma authored
Revert commit 257e9891 ("drm/amd/display: cache trace buffer size") to fix regression found in tests. Acked-by:
Leo Ma <hanghong.ma@amd.com> Reviewed-by:
Josip Pavic <Josip.Pavic@amd.com> Tested-by:
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Kenneth Feng authored
On smu 13.0.0, the compute workload type cannot be set on all the skus due to some other problems. This workaround is to make sure compute workload type can also run on some specific skus. v2: keep the variable consistent Signed-off-by:
Kenneth Feng <kenneth.feng@amd.com> Acked-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
Feifei Xu <Feifei.Xu@amd.com> Signed-off-by:
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Charlene Liu authored
[why] check dmub_Srv exist or not before accessing dmub. Acked-by:
Charlene Liu <charlene.liu@amd.com> Reviewed-by:
Zhan Liu <Zhan.Liu@amd.com> Tested-by:
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shikaguo authored
This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface. - profile_peak - profile_min_mclk - profile_min_sclk - profile_standard Signed-off-by:
shikaguo <shikai.guo@amd.com> Reviewed-by:
Tim Huang <Tim.Huang@amd.com> Signed-off-by:
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Chong Li authored
enforce process isolation between graphics and compute via using the same reserved vmid. v2: remove params "struct amdgpu_vm *vm" from amdgpu_vmid_alloc_reserved and amdgpu_vmid_free_reserved. Signed-off-by:Chong Li <chongli2@amd.com> Reviewed-by:
Christian Koenig <Christian.Koenig@amd.com> Signed-off-by:
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Nathan Chancellor authored
-Wunused-but-set-variable was only supported in clang starting with 13.0.0, so earlier versions will emit a warning, which is turned into a hard error for the kernel to mirror GCC: error: unknown warning option '-Wunused-but-set-variable'; did you mean '-Wunused-const-variable'? [-Werror,-Wunknown-warning-option] The minimum supported version of clang for building the kernel is 11.0.0, so match the rest of the kernel and wrap -Wunused-but-set-variable in a cc-option call, so that it is only used when supported by the compiler. Closes: https://github.com/ClangBuiltLinux/linux/issues/1869 Fixes: 1b320ad3 ("drm/amd/amdgpu: introduce DRM_AMDGPU_WERROR") Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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Shiwu Zhang authored
Add the accelerator PCIe class and match the class in amdgpu for 0x1002 devices of that class. From PCI spec: "PCI Code and ID Assignment, r1.9, sec 1, 1.19" Signed-off-by:
Shiwu Zhang <shiwu.zhang@amd.com> Acked-by:
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Aurabindo Pillai authored
This reverts commit 4243c84a. Enables freesync video by default, since the hang and corruption issue on eDP panels are now fixed. Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Rodrigo Siqueira <rjordrigo@amd.com> Tested-by:
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Jonathan Kim authored
There are a couple of fixes required to enable gfx11 debugging. First, ADD_QUEUE.trap_en is an inappropriate place to toggle a per-process register so move it to SET_SHADER_DEBUGGER.trap_en. When ADD_QUEUE.skip_process_ctx_clear is set, MES will prioritize the SET_SHADER_DEBUGGER.trap_en setting. Second, to preserve correct save/restore priviledged wave states in coordination with the trap enablement setting, resume suspended waves early in the disable call. Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
Felix Kuehling <felix.kuehling@amd.com> Signed-off-by:
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Mario Limonciello authored
Non-root users shouldn't be able to try to trigger a VBIOS flash or query the flashing status. This should be reserved for users with the appropriate permissions. Cc: stable@vger.kernel.org Fixes: 8424f2cc ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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Mario Limonciello authored
The VBIOS image update flow requires userspace to: 1) Write the image to `psp_vbflash` 2) Read `psp_vbflash` 3) Poll `psp_vbflash_status` to check for completion If userspace reads `psp_vbflash` before writing an image, it's possible that it causes problems that can put the dGPU into an invalid state. Explicitly check that an image has been written before letting a read succeed. Cc: stable@vger.kernel.org Fixes: 8424f2cc ("drm/amdgpu/psp: Add vbflash sysfs interface support") Reviewed-by:
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Tim Huang authored
This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface. - profile_peak - profile_min_mclk - profile_min_sclk - profile_standard Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Tim Huang authored
Add the ability to control the vclk and dclk frequency by power_dpm_force_performance_level interface. Signed-off-by:
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Tim Huang authored
PMFW use the left-shifted 16 bits argument to set the VCLK DPM frequency for SMU v13.0.4. Signed-off-by:
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Yang Wang authored
skip to resume rlcg, because rlcg is already enabled in pf side. Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
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Yang Wang authored
virtual display is not support on APP device. Signed-off-by:
Gavin Wan <gavin.wan@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Lang Yu authored
Root PD BO should be reserved before unmap and remove a bo_va from VM otherwise lockdep will complain. v2: check fpriv->csa_va is not NULL instead of amdgpu_mcbp (christian) [14616.936827] WARNING: CPU: 6 PID: 1711 at drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c:1762 amdgpu_vm_bo_del+0x399/0x3f0 [amdgpu] [14616.937096] Call Trace: [14616.937097] <TASK> [14616.937102] amdgpu_driver_postclose_kms+0x249/0x2f0 [amdgpu] [14616.937187] drm_file_free+0x1d6/0x300 [drm] [14616.937207] drm_close_helper.isra.0+0x62/0x70 [drm] [14616.937220] drm_release+0x5e/0x100 [drm] [14616.937234] __fput+0x9f/0x280 [14616.937239] ____fput+0xe/0x20 [14616.937241] task_work_run+0x61/0x90 [14616.937246] exit_to_user_mode_prepare+0x215/0x220 [14616.937251] syscall_exit_to_user_mode+0x2a/0x60 [14616.937254] do_syscall_64+0x48/0x90 [14616.937257] entry_SYSCALL_64_after_hwframe+0x63/0xcd Signed-off-by:
Lang Yu <Lang.Yu@amd.com> Acked-by:
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Joshua Ashton authored
Replace the messy two if-else chains here that were on the same value with a switch on the enum. Signed-off-by:
Joshua Ashton <joshua@froggi.es> Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
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Harry Wentland authored
In order to IGT test colorspace we'll want to print the currently enabled colorspace on a stream. We add a new debugfs to do so, using the same scheme as current bpc reporting. This might also come in handy when debugging display issues. v4: - Fix function doc comment - Fix sRGB debug print Signed-off-by:
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Joshua Ashton authored
Given that we always pass dm_state into here now, this won't ever trigger anymore. This is needed for we will always fail mode validation with invalid clocks or link bandwidth errors. Signed-off-by:
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Harry Wentland authored
Look at connector->colorimetry to determine output colorspace. We don't want to impact current SDR behavior, so DRM_MODE_COLORIMETRY_DEFAULT preserves current behavior. Also add support to explicitly set BT601 and BT709. v4: - Roll support for BT709 and BT601 into this patch - Add default case to avoid warnings for unhandled enum values Signed-off-by:
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Harry Wentland authored
We need to signal mode_changed to make sure we update the output colorspace. v2: No need to call drm_hdmi_avi_infoframe_colorimetry as DC does its own infoframe packing. Signed-off-by:Leo Li <sunpeng.li@amd.com> Reviewed-by:
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Harry Wentland authored
We want compositors to be able to set the output colorspace on DP and HDMI outputs, based on the caps reported from the receiver via EDID. Signed-off-by:
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Harry Wentland authored
We need the connector_state for colorspace and scaling information and can get it from connector->state. Signed-off-by:
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Harry Wentland authored
Drivers might not support all colorspaces defined in dp_colorspaces and hdmi_colorspaces. This results in undefined behavior when userspace is setting an unsupported colorspace. Allow drivers to pass the list of supported colorspaces when creating the colorspace property. v2: - Use 0 to indicate support for all colorspaces (Jani) - Print drm_dbg_kms message when drivers pass 0 to signal that drivers should specify supported colorspaecs explicity (Jani) v3: - Move changes to create a common colorspace_names array to separate patch v6: - Avoid magic when passing 0 for supported_colorspaces; be explicit in treating it as "all DP/HDMI" Signed-off-by:
Sebastian Wick <sebastian.wick@redhat.com> Reviewed-by:
Simon Ser <contact@emersion.fr> Cc: Pekka Paalanen <ppaalanen@gmail.com> Cc: Sebastian Wick <sebastian.wick@redhat.com> Cc: Vitaly.Prosyak@amd.com Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Joshua Ashton <joshua@froggi.es> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Simon Ser <contact@emersion.fr> Cc: Melissa Wen <mwen@igalia.com> Cc: dri-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Signed-off-by:
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Harry Wentland authored
v3: Fix kerneldocs (kernel test robot) v4: Avoid returning NULL from drm_get_colorspace_name Signed-off-by:
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Harry Wentland authored
We an use bitfields to track the support ones for HDMI and DP. This allows us to print colorspaces in a consistent manner without needing to know whether we're dealing with DP or HDMI. v4: - Rename _MAX to _COUNT and leave comment to indicate it's not a valid value - Fix misplaced function doc v6: - Drop magic in drm_mode_create_colorspace_property for dealing with "0" supported_colorspaces. Expect the caller to always provide a non-zero supported_colorspaces. - Improve error checking and logging Signed-off-by:
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Harry Wentland authored
Signed-off-by:
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Joshua Ashton authored
To match the other enums, and add more information about these values. v2: - Specify where an enum entry comes from - Clarify DEFAULT and NO_DATA behavior - BT.2020 CYCC is "constant luminance" - correct type for BT.601 v4: - drop DP/HDMI clarifications that might create more questions than answers v5: - Add note on YCC and RGB variants Signed-off-by:
Pekka Paalanen <pekka.paalanen@collabora.com> Reviewed-by:
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Harry Wentland authored
This allows us to use strongly typed arguments. v2: - Bring NO_DATA back - Provide explicit enum values v3: - Drop unnecessary '&' from kerneldoc (emersion) v4: - Fix Normal Colorimetry comment Signed-off-by:
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Mukul Joshi authored
This patch fixes a regression caused by a bad merge where the handling of reserved SDMA queues was accidentally removed. With the fix, the reserved SDMA queues are again correctly marked as unavailable for allocation. Fixes: a805889a ("drm/amdkfd: Update SDMA queue management for GFX9.4.3") Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
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Alex Deucher authored
0x5b70 is a missing RV370 secondary id. Add it so we don't try and probe it with amdgpu. Cc: michel@daenzer.net Reviewed-by:
Michel Dänzer <mdaenzer@redhat.com> Tested-by:
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Mario Limonciello authored
It's pointless on laptops to look for the SRAT table as these are not NUMA. Check the number of possible nodes is > 1 to decide whether to look for SRAT. Suggested-by:
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Jonathan Kim authored
Exception handling for vmfaults should be raised with additional data. Reported-by:
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Stanley.Yang authored
Set EEPROM ras info: rma status, health percent and bad page threshold. Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
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Stanley.Yang authored
It's more reasonable to check EEPROM table ras info bytes. Signed-off-by:
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Stanley.Yang authored
Add ras info to EEPROM table, app can analyse device ECC status without GPU driver through EEPROM table ras info. Signed-off-by:
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Stanley.Yang authored
Add setting EEPROM table version interface for umcv8.10, Add EEPROM table v2.1 to UMC v8.10. Signed-off-by:
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