- 15 Aug, 2023 40 commits
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Zheng Zengkai authored
PCI core API pci_dev_id() can be used to get the BDF number for a pci device. We don't need to compose it mannually. Use pci_dev_id() to simplify the code a little bit. Signed-off-by:
Zheng Zengkai <zhengzengkai@huawei.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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GUO Zihua authored
Remove duplicated includes in amdgpu_amdkfd_gpuvm.c and amdgpu_ttm.c. Resolves checkincludes message. Signed-off-by:
GUO Zihua <guozihua@huawei.com> Signed-off-by:
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Ran Sun authored
Fix the following errors reported by checkpatch: ERROR: open brace '{' following enum go on the same line ERROR: open brace '{' following struct go on the same line Signed-off-by:Ran Sun <sunran001@208suo.com> Signed-off-by:
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Aurabindo Pillai authored
[Why] When unused, all memory blocks should be put in a low power state [How] Check the value of enable_mem_low_power.bits.vga and set corresponding bit in the hardware register Acked-by:
Stylon Wang <stylon.wang@amd.com> Signed-off-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Ran Sun authored
Fix the following errors reported by checkpatch: ERROR: trailing whitespace ERROR: open brace '{' following struct go on the same line ERROR: code indent should use tabs where possible Signed-off-by: -
Alex Deucher authored
Allow the user to specify -2 as auto enabled with displays. By default we don't enter runtime suspend when there are displays attached because it does not work well in some desktop environments due to the driver sending hotplug events on resume in case any new displays were attached while the GPU was powered down. Some users still want this functionality though, so this lets you enable it. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2428Reviewed-by:
Guchun Chen <guchun.chen@amd.com> Signed-off-by:
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Mario Limonciello authored
Some GPUs have been overloading average power values and input power values. To disambiguate these, introduce a new `AMDGPU_PP_SENSOR_GPU_INPUT_POWER` and the GPUs that share input power update to use this instead of average power. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2746Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
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Aurabindo Pillai authored
[Why&How] Freesync Video mode was enabled by default. Hence no need for the module parameter, so remove it completely Acked-by:
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Mario Limonciello authored
Some GPUs provide support for current power, some average power, and some both. To be able to support all these combinations, introduce a new attribute. Signed-off-by:
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Samir Dhume authored
initialization table handshake with mmsch Signed-off-by:
Samir Dhume <samir.dhume@amd.com> Acked-by:
Leo Liu <leo.liu@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fixes the following coccicheck: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:2427:16-17: WARNING opportunity for min() min() macro is defined in include/linux/minmax.h. It avoids multiple evaluations of the arguments when non-constant and performs strict type-checking. Cc: Guchun Chen <guchun.chen@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Signed-off-by:
Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] Add some missing register definitions and rearrange some others to maintain consistency with related definitions. Acked-by:
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Charlene Liu authored
[why] add dml1 used calculate_wm_and_dlg function pointer check to prevent crash. add z8 watermarks to struct for later asic use Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Acked-by:
Charlene Liu <charlene.liu@amd.com> Tested-by:
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Wenjing Liu authored
[why] There is a lack of encapsulation of pipe connection representation in pipe context. This has caused many challenging bugs and coding errors with repeated logic to identify the same pipe type. [how] Formally define pipe types and provide getters to identify a pipe type and find a pipe based on specific requirements. Update existing logic in non dcn specific files and dcn32 and future versions to use the new accessors. Reviewed-by:
Jun Lei <jun.lei@amd.com> Acked-by:
Wenjing Liu <wenjing.liu@amd.com> Tested-by:
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Nicholas Susanto authored
[Why] 8k60hz compliace test failing because we restrict it single memory channels. Workaround by not restricting it on single displays. [How] Adding an additional check to DCN314 to restrict 8k60hz mode if it has more than 1 display connected. Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by:
Nicholas Susanto <nicholas.susanto@amd.com> Signed-off-by:
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Wenjing Liu authored
[why] There is a recent work for developing a new pipe resource allocation policy used for new ASIC. The new code change needs to modify asic independent pipe resource allocation flow and hook up the new allocation policy in asic dependent layer. Unfortunately this change revealed a hidden bug in the old pipe resource allocation sequence used for older asics. In the older version of acquiring pipe for layer, we are always assigning otg master's opp and tg to the newly allocated secondary dpp pipe. This logic is incorrect when the secodnary dpp pipe is connected to a secondary opp head pipe in ODM combine configuration. Before the recent change, we will overwrite this wrong assignement in asic independent layer again. This covers up the issue. With the recent change, we will no longer cover up this in upper layer and therefore causes wrong tg and opp assignement to the secondary dpp pipe connected to a secondary opp head. [how] Always assign tg and opp from its own opp head instead of otg master. Reviewed-by:
Martin Leung <martin.leung@amd.com> Acked-by:
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Krunoslav Kovac authored
[WHY&HOW] If surface format is dynamically changed within app without changing timing / whole plane, we don't reprogram gamut remap matrix. Issue example: Linear FP16 scRGB going to PQ+BT.2020 monitor. Remap = scRGB->BT.2020 App switches swapchain format to 10-bit PQ+BT.2020. SW calculates correctly that new Remap = bypass (in=-out=BT.2020). But update not applied in HW. Reviewed-by:
Krunoslav Kovac <krunoslav.kovac@amd.com> Tested-by:
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Alvin Lee authored
[Description] We want PMFW to wait for DMCUB to ACK the MCLK end message for FPO cases as well. Reviewed-by:
Samson Tam <samson.tam@amd.com> Acked-by:
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Alvin Lee authored
[Description] Expand the SubVP policy to include up to 175hz displays for better power saving on more display configs. Reviewed-by:
Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by:
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Samir Dhume authored
For sriov, doorbell index for vcn0 for AID needs to be on 32 byte boundary so we need to move the vcn end doorbell Signed-off-by:
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Eric Huang authored
KFD currently relies on MEC FW to clear tcp watch control register on UNMAP_PROCESS, but FW doesn't work on it, which is a bug. So the solution is to clear the register as gfx v9 in KFD. Signed-off-by:
Eric Huang <jinhuieric.huang@amd.com> Reviewed-by:
Jonathan Kim <jonathan.kim@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Muhammad Ahmed authored
[Why] disable clock gating logic reversed bug fix Reviewed-by:
Muhammad Ahmed <ahmed.ahmed@amd.com> Tested-by:
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Michael Strauss authored
[WHY] Certain retimer requires workarounds in order to correctly output test patterns. [HOW] Add vendor-specific aux sequences to program retimer's TX and pattern generator when specific compliance test patterns are requested by sink. Note: SQ128 w/a in DPMF mode only works in one flip orientation currently Reviewed-by:
Hansen Dsouza <hansen.dsouza@amd.com> Reviewed-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Samir Dhume authored
BASE: VCN0 unified (32 byte boundary) BASE+4: MJPEG0 BASE+5: MJPEG1 BASE+6: MJPEG2 BASE+7: MJPEG3 BASE+12: MJPEG4 BASE+13: MJPEG5 BASE+14: MJPEG6 BASE+15: MJPEG7 Signed-off-by:
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Ruan Jinjie authored
The NULL initialization of the pointers assigned by kzalloc() first is not necessary, because if the kzalloc() failed, the pointers will be assigned NULL, otherwise it works as usual. so remove it. Reviewed-by:
Ruan Jinjie <ruanjinjie@huawei.com> Signed-off-by:
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Ruan Jinjie authored
The NULL initialization of the pointers assigned by kzalloc() first is not necessary, because if the kzalloc() failed, the pointers will be assigned NULL, otherwise it works as usual. so remove it. Reviewed-by:
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Samir Dhume authored
Align on 32 byte boundary. Signed-off-by:
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Ruan Jinjie authored
The NULL initialization of the pointers assigned by kzalloc() first is not necessary, because if the kzalloc() failed, the pointers will be assigned NULL, otherwise it works as usual. so remove it. Reviewed-by:
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Randy Dunlap authored
These functions don't use kernel-doc notation for comments so don't begin each comment block with the "/**" kernel-doc marker. This prevents a bunch of kernel-doc warnings: dmub_replay.c:37: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst dmub_replay.c:37: warning: missing initial short description on line: * Get Replay state from firmware. dmub_replay.c:66: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst dmub_replay.c:66: warning: missing initial short description on line: * Enable/Disable Replay. dmub_replay.c:116: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst dmub_replay.c:116: warning: missing initial short description on line: * Set REPLAY power optimization flags. dmub_replay.c:134: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst dmub_replay.c:134: warning: missing initial short description on line: * Setup Replay by programming phy registers and sending replay hw context values to firmware. and 10 more similar warnings. Fixes: c7ddc0a8 ("drm/amd/display: Add Functions to enable Freesync Panel Replay") Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Reported-by:
kernel test robot <lkp@intel.com> Link: lore.kernel.org/r/202308081459.US5rLYAY-lkp@intel.com Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: Christian König <christian.koenig@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Cc: dri-devel@lists.freedesktop.org Signed-off-by:
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Mario Limonciello authored
Many sensor function have a lot of boilerplate checks. Move these into a generic amdgpu_hwmon_get_sensor_generic() instead. No intended functional changes. Signed-off-by:
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Samir Dhume authored
The structures are the same as v4_0 except for the init header Signed-off-by:
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Candice Li authored
Support I2C EEPROM on smu v13_0_6. v2: Move IP_VERSION(13, 0, 6) ahead of IP_VERSION(13, 0, 10). Signed-off-by:
Candice Li <candice.li@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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Tim Huang authored
Align the SMU driver interface version with PMFW to suppress the version mismatch message on driver loading. Signed-off-by:
Tim Huang <Tim.Huang@amd.com> Reviewed-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Evan Quan authored
To better meet the growing demainds for more OD features. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
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Evan Quan authored
`FeatureCtrlMask` should not be included in those settings interested. Signed-off-by:
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Lijo Lazar authored
Temperature needs to be reported in millidegree Celsius. Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Reviewed-by:
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Xiongfeng Wang authored
PCI core API pci_dev_id() can be used to get the BDF number for a pci device. We don't need to compose it mannually. Use pci_dev_id() to simplify the code a little bit. Signed-off-by:
Xiongfeng Wang <wangxiongfeng2@huawei.com> Signed-off-by:
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Jonathan Kim authored
Remove redundant assignment when skipping process ctx clear. Signed-off-by:
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Bhawanpreet Lakha authored
Add Replay calls to clk_mgr updates (just like PSR) Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fixes the following: WARNING: function definition argument 'struct card_info *' should also have an identifier name WARNING: function definition argument 'uint32_t' should also have an identifier name WARNING: function definition argument 'void *' should also have an identifier name WARNING: function definition argument 'struct atom_context *' should also have an identifier name WARNING: function definition argument 'int' should also have an identifier name WARNING: function definition argument 'uint32_t *' should also have an identifier name WARNING: Unnecessary space before function pointer name ERROR: space prohibited after that '*' (ctx:BxW) CHECK: Prefer kernel type 'u32' over 'uint32_t' Cc: Guchun Chen <guchun.chen@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com> Signed-off-by:
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