- 03 Nov, 2023 5 commits
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Alex Deucher authored
The ATRM ACPI method is for fetching the dGPU vbios rom image on laptops and all-in-one systems. It should not be used for external add in cards. If the dGPU is thunderbolt connected, don't try ATRM. v2: pci_is_thunderbolt_attached only works for Intel. Use pdev->external_facing instead. v3: dev_is_removable() seems to be what we want Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2925Reviewed-by:Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
Since they were moved to VRAM, we need to use the IO variants of memcpy. Fixes: 1cfb4d61 ("drm/amdgpu: put MQDs in VRAM") Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Tao Zhou authored
Switch from mode-1 reset to mode-2 for poison consumption. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Stanley.Yang <Stanley.Yang@amd.com> Signed-off-by:
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Lin.Cao authored
GFX doorbell range should be set after flr otherwise the gfx doorbell range will be overlap with MEC. v2: remove "amdgpu_sriov_vf" and "amdgpu_in_reset" check, and add grbm select for the case of 2 gfx rings. Signed-off-by:
Lin.Cao <lincao12@amd.com> Acked-by:
ZhenGuo Yin <zhenguo.yin@amd.com> Signed-off-by:
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Ma Jun authored
Return 0 as the default min power limit for the asics use powerplay. Signed-off-by:
Ma Jun <Jun.Ma2@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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- 31 Oct, 2023 12 commits
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Yang Wang authored
remove unused macro HW_REV Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Ma Jun authored
MACO only works if BACO is supported Signed-off-by:
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Arunpravin Paneer Selvam authored
If the size returned by drm buddy allocator is higher than the required size, we take the higher size to calculate the buffer start address. This is required if we couldn't trim the buffer to the requested size. This will fix the display corruption issue on APU's which has limited VRAM size. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2859 Fixes: 0a1844bf ("drm/buddy: Improve contiguous memory allocation") Signed-off-by:
Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Acked-by:
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Tao Zhou authored
The version can't be queried from discovery table. Signed-off-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Tong Liu01 authored
[why] If driver does not set unmap latency for KIQ, the default value of KIQ unmap latency is zero. When do unmap queue, KIQ will return that almost immediately after receiving unmap command. So, the queue status will be saved to MQD incorrectly or lost in some chance. [how] Set unmap latency when do kiq set resources. The unmap latency is set to be 1 second that is synchronized with Windows driver. Acked-by:
Tong Liu01 <Tong.Liu01@amd.com> Signed-off-by:
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Kenneth Feng authored
fix the high voltage and temperature issue after the driver is unloaded on smu 13.0.0, smu 13.0.7 and smu 13.0.10 v2 - fix the code format and make sure it is used on the unload case only. Signed-off-by:
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Yifan Zhang authored
gpu tlb flush is skipped if reset sem is held, it makes mes_self_test fail since it involves add_hw_queue/remove_hw_queue which needs tlb flush functional. Remove mes_self_test in gpu recover sequence. This patch is to fix the recover failure in gfx11. [ 1831.768292] [drm] ring sdma_32769.3.3 was added [ 1831.768313] [drm] ring gfx_32769.1.1 ib test pass [ 1831.768337] [drm] ring compute_32769.2.2 ib test pass [ 1831.768399] amdgpu 0000:c2:00.0: amdgpu: [gfxhub] page fault (src_id:0 ring:24 vmid:8 pasid:32769, for process pid 0 thread pid 0) [ 1831.768434] amdgpu 0000:c2:00.0: amdgpu: in page starting at address 0x0000aec200000000 from client 10 [ 1831.768456] amdgpu 0000:c2:00.0: amdgpu: GCVM_L2_PROTECTION_FAULT_STATUS:0x00800A30 [ 1831.768473] amdgpu 0000:c2:00.0: amdgpu: Faulty UTCL2 client ID: CPC (0x5) [ 1831.768489] amdgpu 0000:c2:00.0: amdgpu: MORE_FAULTS: 0x0 [ 1831.768501] amdgpu 0000:c2:00.0: amdgpu: WALKER_ERROR: 0x0 [ 1831.768513] amdgpu 0000:c2:00.0: amdgpu: PERMISSION_FAULTS: 0x3 [ 1831.768521] amdgpu 0000:c2:00.0: amdgpu: MAPPING_ERROR: 0x0 [ 1831.768529] amdgpu 0000:c2:00.0: amdgpu: RW: 0x0 [ 1831.931229] amdgpu 0000:c2:00.0: [drm:amdgpu_ring_test_helper [amdgpu]] *ERROR* ring sdma_32769.3.3 test failed (-110) [ 1832.062917] [drm:mes_v11_0_submit_pkt_and_poll_completion.constprop.0 [amdgpu]] *ERROR* MES failed to response msg=3 [ 1832.063107] [drm:amdgpu_mes_remove_hw_queue [amdgpu]] *ERROR* failed to remove hardware queue, queue id = 3 Fixes: e2e37888 ("drm/amdgpu: rework lock handling for flush_tlb v2") Reported-by:
Li Ma <li.ma@amd.com> Reviewed-by:
Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by:
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Candice Li authored
Drop checking deferred error which can be handled by poison consumption. Signed-off-by:
Candice Li <candice.li@amd.com> Reviewed-by:
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Lijo Lazar authored
Fixes warnings: drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.c:286:45: warning: '%s' directive output may be truncated writing up to 29 bytes into a region of size 23 [-Wformat-truncation=] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.c:286:52: warning: '%s' directive output may be truncated writing up to 29 bytes into a region of size 23 [-Wformat-truncation=] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu14/smu_v14_0.c:72:45: warning: '%s' directive output may be truncated writing up to 29 bytes into a region of size 23 [-Wformat-truncation=] drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu14/smu_v14_0.c:72:52: warning: '%s' directive output may be truncated writing up to 29 bytes into a region of size 23 [-Wformat-truncation=] Signed-off-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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Tao Zhou authored
Not all platforms support RAS. Fixes: 73582be1 ("drm/amdgpu: bypass RAS error reset in some conditions") Signed-off-by:
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https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.7-2023-10-27: amdgpu: - RAS fixes - Seamless boot fixes - NBIO 7.7 fix - SMU 14.0 fixes - GC 11.5 fixes - DML2 fixes - ASPM fixes - VPE fixes - Misc code cleanups - SRIOV fixes - Add some missing copyright notices - DCN 3.5 fixes - FAMS fixes - Backlight fix - S/G display fix - fdinfo cleanups - EXT_COHERENT fixes for APU and NUMA systems amdkfd: - Misc fixes - Misc code cleanups - SVM fixes Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231027200343.57132-1-alexander.deucher@amd.com
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for v6.7-rc1: drm-misc-next-2023-10-19 + following: UAPI Changes: Cross-subsystem Changes: - Convert fbdev drivers to use fbdev i/o mem helpers. Core Changes: - Use cross-references for macros in docs. - Make drm_client_buffer_addb use addfb2. - Add NV20 and NV30 YUV formats. - Documentation updates for create_dumb ioctl. - CI fixes. - Allow variable number of run-queues in scheduler. Driver Changes: - Rename drm/ast constants. - Make ili9882t its own driver. - Assorted fixes in ivpu, vc4, bridge/synopsis, amdgpu. - Add planar formats to rockchip. Signed-off-by:
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- 27 Oct, 2023 8 commits
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Umio Yasuno authored
Remove unused variables from amdgpu_show_fdinfo Reviewed-by:
Umio Yasuno <coelacanth_dream@protonmail.com> Signed-off-by:
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Rob Clark authored
Some of the fields that are handled by drm_show_fdinfo() crept back in when rebasing the patch. Remove them again. Fixes: 376c25f8 ("drm/amdgpu: Switch to fdinfo helper") Reviewed-by:
Rob Clark <robdclark@chromium.org> Reviewed-by: <alexander.deucher@amd.com> Co-developed-by:
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Kenneth Feng authored
avoid to disable gfxhub interrupt when driver is unloaded on gmc 11 Signed-off-by:
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David Francis authored
On gfx943 APU, EXT_COHERENT should give MTYPE_CC for local and MTYPE_UC for nonlocal memory. On NUMA systems, local memory gets the local mtype, set by an override callback. If EXT_COHERENT is set, memory will be set as MTYPE_UC by default, with local memory MTYPE_CC. Add an option in the override function for this case, and add a check to ensure it is not used on UNCACHED memory. V2: Combined APU and NUMA code into one patch V3: Fixed a potential nullptr in amdgpu_vm_bo_update Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Candice Li authored
Retrieve correctable error count from ce_count_lo_chip instead of mca_umc_status. Signed-off-by:
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Candice Li authored
Use ErrorCodeExt field to identify data parity error in replay mode. Signed-off-by:
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Mukul Joshi authored
Fix a typo in parsing of the GC info table header when reading the IP discovery table. Fixes: 0e64c9aa ("drm/amdgpu: add type conversion for gc info") Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
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Hamza Mahfooz authored
An assignment statement was reversed during a refactor which effectively disabled S/G display outright. Since, we use adev->mode_info.gpu_vm_support to indicate to the rest of the driver that S/G display should be enabled and currently it is always set to false. So, to fix this set adev->mode_info.gpu_vm_support's value to that of init_data.flags.gpu_vm_support (and not vice versa). Fixes: 098c1307 ("drm/amd/display: enable S/G display for for recent APUs by default") Reported-by:
Mark Broadworth <mark.broadworth@amd.com> Tested-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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- 26 Oct, 2023 15 commits
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James Zhu authored
amdxcp unloads incompletely, and below error will be seen during load/unload, sysfs: cannot create duplicate filename '/devices/platform/amdgpu_xcp.0' devres_release_group will free xcp device at first, platform device will be unregistered later in platform_device_unregister. Signed-off-by:
James Zhu <James.Zhu@amd.com> Acked-by:
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Li Ma authored
Modify the print format of the fractional part to avoid display error. Signed-off-by:
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Lijo Lazar authored
PCI domain/segment information of xccs is available through ACPI DSM methods. Consider that also while looking for devices. Signed-off-by:
Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com> Acked-by:
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Lin.Cao authored
In SR-IOV environment, the value of pcie_table->num_of_link_levels will be 0, and num_of_levels - 1 will cause array index out of bounds Signed-off-by:
Jingwen Chen <Jingwen.Chen2@amd.com> Signed-off-by:
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Lijo Lazar authored
Issue a read to confirm the register write before ringing doorbell. With multiple XCCs there is chance for race condition. Signed-off-by:
Asad Kamal <asad.kamal@amd.com> Signed-off-by:
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Yifan Zhang authored
is_mode1_reset_supported may be called before smu init, when smu_context is unitialized in driver load/unload test. Call smu_cmn_get_smc_version explicitly in is_mode1_reset_supported. v2: apply to aldebaran in case is_mode1_reset_supported will be uncommented (Candice Li) Fixes: 710d9cae ("drm/amd/pm: drop most smu_cmn_get_smc_version in smu") Signed-off-by:
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Tao Zhou authored
Add DF block and RAS poison mode query for DF v4_6_2. Signed-off-by:
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Lijo Lazar authored
Use subrevision of IP version in discovery table to identify SOC revision id for NBIO v7.9 SOCs. Only newer bootloaders update subrevision field. Signed-off-by:
Le Ma <le.ma@amd.com> Signed-off-by:
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Aric Cyr authored
DC v3.2.256 Summary: * Fixes null-deref regression after "drm/amd/display: Update OPP counter from new interface" * Fixes display flashing when VSR and HDR enabled on dcn32 * Fixes dcn3x intermittent hangs due to FPO * Fixes MST Multi-Stream light up on dcn35 * Fixes green screen on DCN31x when DVI and HDMI monitors attached * Adds DML2 improvements * Adds idle power optimization improvements * Accommodates panels with lower nit backlight * Updates SDP VSC colorimetry from DP test automation request * Reverts "drm/amd/display: allow edp updates for virtual signal" Acked-by:
Roman Li <roman.li@amd.com> Signed-off-by:
Aric Cyr <aric.cyr@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
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Aurabindo Pillai authored
[Why&How] To enable automated testing through IGT, expose an API that is accessible through debugfs to query current status of SubVP feature. Reviewed-by:
Alvin Lee <alvin.lee2@amd.com> Acked-by:
Aurabindo Pillai <aurabindo.pillai@amd.com> Tested-by:
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Iswara Nagulendran authored
[HOW&WHY] Reading the value from DP_EDP_BACKLIGHT_MODE_SET_REGISTER, DPCD 0x721 before setting the BP_EDP_PANEL_LUMINANC_CONTROL_ENABLE bit to ensure there are no accidental overwrites. Reviewed-by:
Sreeja Golui <sreeja.golui@amd.com> Reviewed-by:
Harry Vanzylldejong <harry.vanzylldejong@amd.com> Acked-by:
Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by:
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Michael Strauss authored
[WHY] Currently causes some DP link layer failures, backing out until the failures are root caused. Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Ilya Bakoulin authored
[Why] LUT params are not cleared after setting blend TF, which can lead to same params being used for the shaper, if the shaper func is bypassed. [How] Set lut_params to NULL after program_1dlut. Reviewed-by:
Krunoslav Kovac <krunoslav.kovac@amd.com> Acked-by:
Ilya Bakoulin <ilya.bakoulin@amd.com> Tested-by:
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Samson Tam authored
[Why] In cases where number of pipes available is less than num_opp, there will opp instances that are null [How] Add null check to skip over these opp instances Fixes: 40de8403 ("drm/amd/display: Update OPP counter from new interface") Reviewed-by:
Samson Tam <samson.tam@amd.com> Tested-by:
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Alvin Lee authored
Provide DCN32 specific sequence and update DCN30 sequence Reviewed-by:
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