- 02 Nov, 2017 5 commits
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Corentin Labbe authored
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted. This patch restore arm64 DT about dwmac-sun8i for H5 This reverts a part of commit 87e1f5e8 ("arm64: dts: allwinner: Revert EMAC changes") Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Corentin Labbe authored
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted. This patch restore all boards DT about dwmac-sun8i This reverts partially commit fe45174b ("arm: dts: sunxi: Revert EMAC changes") Signed-off-by:
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Corentin Labbe authored
Since dwmac-sun8i could use either an integrated PHY or an external PHY (which could be at same MDIO address), we need to represent this selection by a MDIO switch. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Corentin Labbe authored
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted. This patch restore sunxi-h3-h5.dtsi This reverts partially commit fe45174b ("arm: dts: sunxi: Revert EMAC changes") Signed-off-by:
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Corentin Labbe authored
This patch add documentation about the MDIO switch used on sun8i-h3-emac for integrated PHY. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
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- 31 Oct, 2017 1 commit
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Corentin Labbe authored
The original dwmac-sun8i DT bindings have some issue on how to handle integrated PHY and was reverted in last RC of 4.13. But now we have a solution so we need to get back that was reverted. This patch restore dt-bindings documentation about dwmac-sun8i This reverts commit 8aa33ec2 ("dt-bindings: net: Revert sun8i dwmac binding") Signed-off-by:
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- 20 Oct, 2017 4 commits
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Icenowy Zheng authored
Banana Pi M2 Ultra board features two USB host ports, connected to the two USB host ports on the SoC. Add support for them. Signed-off-by:
Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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Icenowy Zheng authored
On the Banana Pi M2 Berry board, the 5V power output (used by HDMI, SATA and USB) is controlled via a GPIO. Add regulator node for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
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Icenowy Zheng authored
On newer revisions of the Banana Pi M2 Ultra boards, the 5V power output (used by HDMI, SATA and USB) is controller via a GPIO. Add the regulator node for it. Older revisions just have the 5V power output always on, and the GPIO is reserved on these boards. So it won't affect the older revisions. Signed-off-by:
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Icenowy Zheng authored
Allwinner R40 SoC features a USB OTG port and two USB HOST ports. Add support for the host ports in the DTSI file. The OTG controller still cannot work with existing compatibles, and needs more investigation. So it's not added yet. Signed-off-by:
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- 18 Oct, 2017 5 commits
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Chen-Yu Tsai authored
Various A10-based development boards have standard HDMI connectors wired to the dedicated HDMI pins on the SoC. Enable the display pipeline and HDMI output on boards I have or have access to schematics: - Cubieboard - Olimex A10-OLinuXino-LIME Signed-off-by:
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Chen-Yu Tsai authored
All the A20 devices I own have standard HDMI connectors wired to the dedicated HDMI pins on the SoC: - Bananapi M1+ - Cubieboard 2 - Cubietruck - Lamobo R1 (or Bananapi R1) Development boards from Olimex also have standard HDMI connectors. Schematics for them are publicly available. Enable HDMI on them as well. - Olimex A20-OLinuXino-LIME - Olimex A20-OLinuXino-LIME2 - Olimex A20-OLinuXino-MICRO Enable the display pipeline and HDMI output for them. Signed-off-by:
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Jonathan Liu authored
The A20 has two interconnected display pipelines, mirroring the A10. Add all the device nodes for them, including the downstream HDMI controller that we already support. Signed-off-by:
Jonathan Liu <net147@gmail.com> [wens@csie.org: Squashed in HDMI and provided commit message] Signed-off-by:
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Chen-Yu Tsai authored
The A10 has two interconnected display pipelines, much like the A31, but without the DRCs between the backend and TCONs. Add all the device nodes for them, including the downstream HDMI controller that we already support. Signed-off-by:
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Icenowy Zheng authored
The R40 SoC has a watchdog like the one on A20, in the timer memory zone (which is also the same on A20). Add the device tree node for it. Signed-off-by:
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- 13 Oct, 2017 6 commits
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Chen-Yu Tsai authored
The reference design tablet has the DC jack wired to AXP209's ACIN. As a tablet, it also has an internal LiPo battery, wired to the PMIC's battery charger. Enable both. Signed-off-by:
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Maxime Ripard authored
Some boards have had node names with underscores. Remove them in favour of hyphens in order to reduce the DTC warnings. Signed-off-by: -
Maxime Ripard authored
Some node names in the A80 DTSI still have underscores in them. Remove them in favour of hyphens to remove DTC warnings. Signed-off-by: -
Maxime Ripard authored
Some GPIO pinctrl nodes cannot be easily removed, because they would also change the pin configuration, for example to add a pull resistor or change the current delivered by the pin. Those nodes still have underscores and unit-addresses in their node names in our DTs, so adjust their name to remove the warnings. Use that occasion to also fix some poorly chosen node-names. Acked-by:
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Maxime Ripard authored
The I2C's, MMC0 and EMAC controllers have only one muxing option in the SoC. In such a case, we can just move the muxing into the DTSI, and remove it from the DTS. Acked-by:
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Maxime Ripard authored
All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by:
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- 11 Oct, 2017 2 commits
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Chen-Yu Tsai authored
All the A31/A31s devices I own have some kind of HDMI connector wired to the dedicated HDMI pins on the SoC: - A31 Hummingbird (standard HDMI connector, display already enabled) - Sinlinx SinA31s (standard HDMI connector) - MSI Primo81 tablet (micro HDMI connector) Enable the display pipeline (if needed) and HDMI output for them. Signed-off-by:
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Chen-Yu Tsai authored
Now that we support the HDMI controller on the A31 SoC, we can add it to the device tree. This adds a device node for the HDMI controller, and the of_graph nodes connecting it to the 2 TCONs. Signed-off-by:
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- 09 Oct, 2017 3 commits
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Maxime Ripard authored
One of the usage of the LRADC is to implement buttons. The bindings define that we should have one subnode per button, with their associated voltage as a property. However, there was no reg property but we still used the voltage associated to the button as the unit-address, which eventually generated warnings in DTC. Rename the node names to avoid those warnings. Signed-off-by: -
Maxime Ripard authored
Using skeleton.dtsi will create a memory node that will generate a warning in DTC. However, that node will be created by the bootloader, so we can just remove it entirely in order to remove that warning. Acked-by:
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Maxime Ripard authored
Some gpio-keys definitions in our DTs were having buttons defined with a unit-address and that would generate a DTC warning. Change the buttons node names to remove the warnings. Acked-by:
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- 06 Oct, 2017 14 commits
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Maxime Ripard authored
The board has an external pull-up on the card-detect signal, so there's no need to add another one. This also removes a DTC warning. Acked-by:
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Maxime Ripard authored
The board has an external pull-up on the card-detect signal, so there's no need to add another one. This also removes a DTC warning. Acked-by:
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Maxime Ripard authored
Our pinctrl node names were containing unit-adresses without a reg property, resulting in a warning. Change the names for our new convention. Acked-by:
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Maxime Ripard authored
The A80 boards still define some GPIO pinctrl nodes that are not really useful, and redundant with the muxing already happening on gpio_request. Let's remove those nodes. This will also remove DTC warnings. Acked-by:
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Maxime Ripard authored
Using skeleton.dtsi will create a memory node that will generate a warning in DTC. However, that node will be created by the bootloader, so we can just remove it entirely in order to remove that warning. Acked-by:
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Maxime Ripard authored
The gpio pinctrl nodes are redundant and as such useless most of the times. Since they will also generate warnings in DTC, we can simply remove most of them. Acked-by:
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Maxime Ripard authored
The thermal-zone subnodes we defined for the A10 have underscores in them that will generate DTC warnings. Change those underscores for hyphens. Acked-by:
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Maxime Ripard authored
Our main node for all the in-SoC controllers used to have a unit name. The unit-name, in addition to being actually false, would not match any reg property, which generates a warning. Remove it in order to remove those warnings. Acked-by:
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Maxime Ripard authored
Our oscillators clock names have a unit address, but no reg property, which generates a warning in DTC. Change these names to remove those unit addresses. Acked-by:
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Maxime Ripard authored
The simple-framebuffer nodes have a unit address, but no reg property which generates a warning when compiling it with DTC. Change the simple-framebuffer node names so that there is no warnings on this anymore. Acked-by:
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Maxime Ripard authored
The USB power supply node in the AXP209 DTSI is using underscores in its node name, which is generating a warning. Change those underscores for hyphens. Acked-by:
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Maxime Ripard authored
Most of our device trees have had leading zeros for padding as part of the nodes unit-addresses. Remove all these useless zeros that generate warnings Acked-by:
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Icenowy Zheng authored
The Banana Pi M2 Ultra is an SBC based on the Allwinner V40 SoC (same as the R40 SoC). The form factor is similar to the Raspberry Pi series. It features: - X-Powers AXP221s PMIC connected to i2c0 - 1GiB DDR3 DRAM - microSD slot - MicroUSB Type-B port for power and connected to usb0 - HDMI output - MIPI DSI connector - 4 USB Type-A ports (connected to the usb1 controller via a hub) - gigabit ethernet with Realtek RTL8211E transceiver - WiFi/Bluetooth with AP6212 module, with external antenna connector - SATA and power connectors for native SATA support - camera sensor connector - audio out headphone jack - red and green LEDs - debug UART pins - Raspberry Pi B+ compatible GPIO header - power and reset buttons This patch adds a dts file that enables UART, MMC and PMIC support. Signed-off-by:
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Chen-Yu Tsai authored
The Banana Pi M2 Ultra is an SBC based on the Allwinner R40 SoC. The form factor and position of various connectors, leds and buttons is similar to the Banana Pi M1+, Banana Pi M3, and is exactly the same as the latest Banana Pi M64. It features: - X-Powers AXP221s PMIC connected to i2c0 - 2 GB DDR3 DRAM - 8 GB eMMC - micro SD card slot - DC power jack - HDMI output - MIPI DSI connector - 2x USB 2.0 hosts - 1x USB 2.0 OTG - gigabit ethernet with Realtek RTL8211E transceiver - WiFi/Bluetooth with AP6212 chip, with external antenna connector - SATA and power connectors for native SATA support - camera sensor connector - consumer IR receiver - audio out headphone jack - onboard microphone - red, green, and blue LEDs - debug UART pins - Li-Po battery connector - Raspberry Pi B+ compatible GPIO header - power, reset, and boot control buttons This patch adds a dts file that enables UART, MMC and PMIC support. Signed-off-by:
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