- 16 Aug, 2017 19 commits
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Takeshi Kihara authored
Signed-off-by:
Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Takeshi Kihara authored
Signed-off-by:
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Takeshi Kihara authored
Signed-off-by:
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Takeshi Kihara authored
This patch adds SCIF{0,1,2,3,4,5} pins, groups and functions to R8A77995 SoC. Signed-off-by: -
Takeshi Kihara authored
This patch adds initial pinctrl driver to support for the R8A77995 SoC. Signed-off-by:
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Yoshihiro Shimoda authored
This follows the style of existion PORT_GP_X macros and will be used by a follow-up patch for the r8a77995 SoC. Extracted from the initial r8a77995 patch in the BSP by Takeshi Kihara. Signed-off-by:
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Takeshi Kihara authored
This patch adds USB30 (USB3.0 host) pin, group and function to R8A7796 SoC. Signed-off-by:
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Takeshi Kihara authored
This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to R8A7796 SoC. Signed-off-by: -
Takeshi Kihara authored
This is a correction because MOD_SEL register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by:
Yoshihiro Kaneko <ykaneko0929@gmail.com> Signed-off-by:
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Takeshi Kihara authored
This patch renames the pin function macro definitions of the GPSR1 and IPSR4 registers value for the CS1# pin. This is a correction because GPSR and IPSR register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Signed-off-by:
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Takeshi Kihara authored
This patch fixes the macro definitions of FSCLKST pins function and IPSR7 bit[15:12] register deleted. This is a correction because IPSR register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E or later. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by:
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Takeshi Kihara authored
This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected for IPSR17 bit[27:24]. And renames MOD_SEL2 bit26 value definition name to SEL_TIMER_TMU1. This is a correction because MOD_SEL register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the implementation incorrect of IPSR register value definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: -
Takeshi Kihara authored
This patch fixes the implementation incorrect of IPSR register value definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: -
Takeshi Kihara authored
This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1 bit11 to MOD_SEL1 bit10. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.53E or later. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: -
Takeshi Kihara authored
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value when SCK5_A pin function is selected for IPSR16 bit[31:28]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7795 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: 0b0ffc96 ("pinctrl: sh-pfc: Initial R8A7795 PFC support") Signed-off-by:
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Yoshihiro Shimoda authored
Add pins, groups, and functions for USB 2.0 on R-Car H3 ES2.0. Signed-off-by:
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Yoshihiro Shimoda authored
Since the latest datasheet revises the names, this patch changes the definitions from USB3_{OVC,PWEN} to USB2_CH3_{OVC,PWEN}. Signed-off-by:
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- 17 Jul, 2017 18 commits
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Takeshi Kihara authored
This patch renames the pin function macro definitions of the GPSR1 and IPSR4 registers value for the CS1# pin. This is a correction because GPSR and IPSR register specification for R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes IPSR{12,17,18} and MOD_SEL0 pin assignment for FSO pins group. This is a correction because GPSR and IPSR register specification for R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Takeshi Kihara authored
This patch fixes the macro definitions of MOD_SEL0 bit2 register deleted. This is a correction because MOD_SEL register specification for R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the macro definitions of SATA_DEVSLP_B pins function deleted. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the macro definitions of FSCLKST pins function and IPSR7 bit[15:12] register deleted. This is a correction because IPSR register specification for R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes to set MOD_SEL2 bit19 when using TCLK2_A pin function is selected for IPSR16 bit[23:20] or using TCLK2_B pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the implementation incorrect of IPSR register value definitions for NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Takeshi Kihara authored
This patch fixes the implementation incorrect of IPSR register value definitions for FMCLK{_C,_D} and FMIN{_C,_D} pins function. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Takeshi Kihara authored
This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1 bit11 to MOD_SEL1 bit10. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Takeshi Kihara authored
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value when SCK5_A pin function is selected for IPSR16 bit[31:28]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24] value when STP_ISEN_1_D pin function is selected for IPSR17 bit[27:24]. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Geert Uytterhoeven authored
Pins D6 and D7 of the MMC interface can be muxed to two different sets of pins, but currently only one set is supported. Add a pin group for the alternative set to fix this. Signed-off-by:
Chris Paterson <chris.paterson2@renesas.com> Tested-by:
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Geert Uytterhoeven authored
Fix a copy-and-paste bug in the MSIOF3 SS2_E mux array. Fixes: 4753231c ("pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the IPSR register setting when the MSIOF3_SS1_E pin function is selected. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes the incorrect IPSR register value definitions for MSIOF3_{SS1,SS2}_E pin functions. This is a correction to the incorrect implementation of IPSR register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Geert Uytterhoeven authored
Add pins, groups, and functions for MSIOF on R-Car H3 ES2.0. Extracted from a big patch in the BSP by Takeshi Kihara, with corrections for MSIOF3 SS1_E/SS2_E pins and SS2_E mux. Signed-off-by: -
Takeshi Kihara authored
This patch fixes the incorrect IPSR register value definitions for MSIOF3_{SS1,SS2}_E pin functions. This is a correction to the incorrect implementation of IPSR register pin assignment of the specifications updated for R8A7795 ES2.0 SoC in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by: -
Wolfram Sang authored
On group configuration, bail out if setting one of the individual pins fails. We don't need to roll-back, the pinctrl core will do this for us. Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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- 15 Jul, 2017 3 commits
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Linus Torvalds authored
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git://git.lwn.net/linuxLinus Torvalds authored
Pull documentation format standardization from Jonathan Corbet: "This series converts a number of top-level documents to the RST format without incorporating them into the Sphinx tree. The hope is to bring some uniformity to kernel documentation and, perhaps more importantly, have our existing docs serve as an example of the desired formatting for those that will be added later. Mauro has gone through and fixed up a lot of top-level documentation files to make them conform to the RST format, but without moving or renaming them in any way. This will help when we incorporate the ones we want to keep into the Sphinx doctree, but the real purpose is to bring a bit of uniformity to our documentation and let the top-level docs serve as examples for those writing new ones" * tag 'standardize-docs' of git://git.lwn.net/linux: (84 commits) docs: kprobes.txt: Fix whitespacing tee.txt: standardize document format cgroup-v2.txt: standardize document format dell_rbu.txt: standardize document format zorro.txt: standardize document format xz.txt: standardize document format xillybus.txt: standardize document format vfio.txt: standardize document format vfio-mediated-device.txt: standardize document format unaligned-memory-access.txt: standardize document format this_cpu_ops.txt: standardize document format svga.txt: standardize document format static-keys.txt: standardize document format smsc_ece1099.txt: standardize document format SM501.txt: standardize document format siphash.txt: standardize document format sgi-ioc4.txt: standardize document format SAK.txt: standardize document format rpmsg.txt: standardize document format robust-futexes.txt: standardize document format ...
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git://git.kernel.org/pub/scm/linux/kernel/git/tytso/randomLinus Torvalds authored
Pull random updates from Ted Ts'o: "Add wait_for_random_bytes() and get_random_*_wait() functions so that callers can more safely get random bytes if they can block until the CRNG is initialized. Also print a warning if get_random_*() is called before the CRNG is initialized. By default, only one single-line warning will be printed per boot. If CONFIG_WARN_ALL_UNSEEDED_RANDOM is defined, then a warning will be printed for each function which tries to get random bytes before the CRNG is initialized. This can get spammy for certain architecture types, so it is not enabled by default" * tag 'random_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/random: random: reorder READ_ONCE() in get_random_uXX random: suppress spammy warnings about unseeded randomness random: warn when kernel uses unseeded randomness net/route: use get_random_int for random counter net/neighbor: use get_random_u32 for 32-bit hash random rhashtable: use get_random_u32 for hash_rnd ceph: ensure RNG is seeded before using iscsi: ensure RNG is seeded before use cifs: use get_random_u32 for 32-bit lock random random: add get_random_{bytes,u32,u64,int,long,once}_wait family random: add wait_for_random_bytes() API
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