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  1. 31 Jul, 2020 6 commits
    • Rob Clark's avatar
      drm/msm: ratelimit crtc event overflow error · 5e16372b
      Rob Clark authored 
      This can happen a lot when things go pear shaped.  Lets not flood dmesg
when this happens.
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      5e16372b
    • Sharat Masetty's avatar
      drm: msm: a6xx: send opp instead of a frequency · 1f60d114
      Sharat Masetty authored 
      This patch changes the plumbing to send the devfreq recommended opp rather
than the frequency. Also consolidate and rearrange the code in a6xx to set
the GPU frequency and the icc vote in preparation for the upcoming
changes for GPU->DDR scaling votes.
Signed-off-by: default avatarSharat Masetty <smasetty@codeaurora.org>
Signed-off-by: default avatarAkhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      1f60d114
    • Sharat Masetty's avatar
      dt-bindings: drm/msm/gpu: Document gpu opp table · 369c4ef4
      Sharat Masetty authored 
      Update documentation to list the gpu opp table bindings including the
newly added "opp-peak-kBps" needed for GPU-DDR bandwidth scaling.
Signed-off-by: default avatarSharat Masetty <smasetty@codeaurora.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarAkhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      369c4ef4
    • Akhil P Oommen's avatar
      drm/msm: Fix a null pointer access in msm_gem_shrinker_count() · 3cbdc8d8
      Akhil P Oommen authored 
      Adding an msm_gem_object object to the inactive_list before completing
its initialization is a bad idea because shrinker may pick it up from the
inactive_list. Fix this by making sure that the initialization is complete
before moving the msm_obj object to the inactive list.

This patch fixes the below error:
[10027.553044] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000068
[10027.573305] Mem abort info:
[10027.590160]   ESR = 0x96000006
[10027.597905]   EC = 0x25: DABT (current EL), IL = 32 bits
[10027.614430]   SET = 0, FnV = 0
[10027.624427]   EA = 0, S1PTW = 0
[10027.632722] Data abort info:
[10027.638039]   ISV = 0, ISS = 0x00000006
[10027.647459]   CM = 0, WnR = 0
[10027.654345] user pgtable: 4k pages, 39-bit VAs, pgdp=00000001e3a6a000
[10027.672681] [0000000000000068] pgd=0000000198c31003, pud=0000000198c31003, pmd=0000000000000000
[10027.693900] Internal error: Oops: 96000006 [#1] PREEMPT SMP
[10027.738261] CPU: 3 PID: 214 Comm: kswapd0 Tainted: G S                5.4.40 #1
[10027.745766] Hardware name: Qualcomm Technologies, Inc. SC7180 IDP (DT)
[10027.752472] pstate: 80c00009 (Nzcv daif +PAN +UAO)
[10027.757409] pc : mutex_is_locked+0x14/0x2c
[10027.761626] lr : msm_gem_shrinker_count+0x70/0xec
[10027.766454] sp : ffffffc011323ad0
[10027.769867] x29: ffffffc011323ad0 x28: ffffffe677e4b878
[10027.775324] x27: 0000000000000cc0 x26: 0000000000000000
[10027.780783] x25: ffffff817114a708 x24: 0000000000000008
[10027.786242] x23: ffffff8023ab7170 x22: 0000000000000001
[10027.791701] x21: ffffff817114a080 x20: 0000000000000119
[10027.797160] x19: 0000000000000068 x18: 00000000000003bc
[10027.802621] x17: 0000000004a34210 x16: 00000000000000c0
[10027.808083] x15: 0000000000000000 x14: 0000000000000000
[10027.813542] x13: ffffffe677e0a3c0 x12: 0000000000000000
[10027.819000] x11: 0000000000000000 x10: ffffff8174b94340
[10027.824461] x9 : 0000000000000000 x8 : 0000000000000000
[10027.829919] x7 : 00000000000001fc x6 : ffffffc011323c88
[10027.835373] x5 : 0000000000000001 x4 : ffffffc011323d80
[10027.840832] x3 : ffffffff0477b348 x2 : 0000000000000000
[10027.846290] x1 : ffffffc011323b68 x0 : 0000000000000068
[10027.851748] Call trace:
[10027.854264]  mutex_is_locked+0x14/0x2c
[10027.858121]  msm_gem_shrinker_count+0x70/0xec
[10027.862603]  shrink_slab+0xc0/0x4b4
[10027.866187]  shrink_node+0x4a8/0x818
[10027.869860]  kswapd+0x624/0x890
[10027.873097]  kthread+0x11c/0x12c
[10027.876424]  ret_from_fork+0x10/0x18
[10027.880102] Code: f9000bf3 910003fd aa0003f3 d503201f (f9400268)
[10027.886362] ---[ end trace df5849a1a3543251 ]---
[10027.891518] Kernel panic - not syncing: Fatal exception
Signed-off-by: default avatarAkhil P Oommen <akhilpo@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      3cbdc8d8
    • Kalyan Thota's avatar
      drm/msm/dpu: add support for dither block in display · 3c128638
      Kalyan Thota authored 
      This change enables dither block for primary interface
in display.

Enabled for 6bpc in the current version.

Changes in v1:
 - Remove redundant error checks (Rob).
Signed-off-by: default avatarKalyan Thota <kalyan_t@codeaurora.org>
Tested-by: default avatarDouglas Anderson <dianders@chromium.org>
Tested-by: default avatarKristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      3c128638
    • Rob Clark's avatar
      drm/msm/adreno: fix gpu probe if no interconnect-names · 520c651f
      Rob Clark authored 
      If there is no interconnect-names, but there is an interconnects
property, then of_icc_get(dev, "gfx-mem"); would return an error
rather than NULL.

Also, if there is no interconnect-names property, there will never
be a ocmem path.  But of_icc_get(dev, "ocmem") would return -EINVAL
instead of -ENODATA.  Just don't bother trying in this case.

v2: explicity check for interconnect-names property

Fixes: 08af4769 ("drm/msm: handle for EPROBE_DEFER for of_icc_get")
Fixes: 00bb9243 ("drm/msm/gpu: add support for ocmem interconnect path")
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      520c651f
  3. 30 Jul, 2020 5 commits
    • Kalyan Thota's avatar
      drm/msm/dpu: enumerate second cursor pipe for external interface · 7b149f2b
      Kalyan Thota authored 
      Setup an RGB HW pipe as cursor which can be used on
secondary interface.

For SC7180 2 HW pipes are enumerated as cursors
1 - primary interface
2 - secondary interface
Signed-off-by: default avatarKalyan Thota <kalyan_t@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      7b149f2b
    • Kalyan Thota's avatar
      drm/msm/dpu: ensure device suspend happens during PM sleep · ca8199f1
      Kalyan Thota authored 
      "The PM core always increments the runtime usage counter
before calling the ->suspend() callback and decrements it
after calling the ->resume() callback"

DPU and DSI are managed as runtime devices. When
suspend is triggered, PM core adds a refcount on all the
devices and calls device suspend, since usage count is
already incremented, runtime suspend was not getting called
and it kept the clocks on which resulted in target not
entering into XO shutdown.

Add changes to force suspend on runtime devices during pm sleep.

Changes in v1:
 - Remove unnecessary checks in the function
    _dpu_kms_disable_dpu (Rob Clark).

Changes in v2:
 - Avoid using suspend_late to reset the usagecount
   as suspend_late might not be called during suspend
   call failures (Doug).

Changes in v3:
 - Use force suspend instead of managing device usage_count
   via runtime put and get API's to trigger callbacks (Doug).

Changes in v4:
 - Check the return values of pm_runtime_force_suspend and
   pm_runtime_force_resume API's and pass appropriately (Doug).

Changes in v5:
 - With v4 patch, test cycle has uncovered issues in device resume.

   On bubs: cmd tx failures were seen as SW is sending panel off
   commands when the dsi resources are turned off.

   Upon suspend, DRM driver will issue a NULL composition to the
   dpu, followed by turning off all the HW blocks.

   v5 changes will serialize the NULL commit and resource unwinding
   by handling them under PM prepare and PM complete phases there by
   ensuring that clks are on when panel off commands are being
   processed.

Changes in v6:
- Use drm_mode_config_helper_suspend/resume() instead of legacy API
  drm_atomic_helper_suspend/resume() (Doug).

  Trigger runtime callbacks from the suspend/resume call to turn
  off the resources.

Changes in v7:
- Add "__maybe_unused" to the functions to avoid compilation
  failures. Cleanup unnecessary configs (Doug).
Signed-off-by: default avatarKalyan Thota <kalyan_t@codeaurora.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      ca8199f1
    • Jonathan Marek's avatar
      drm/msm: handle for EPROBE_DEFER for of_icc_get · 08af4769
      Jonathan Marek authored 
      Check for errors instead of silently not using icc if the msm driver
probes before the interconnect driver.

Allow ENODATA for ocmem path, as it is optional and this error
is returned when "gfx-mem" path is provided but not "ocmem".

Because msm_gpu_cleanup assumes msm_gpu_init has been called, the icc path
init needs to be after msm_gpu_init for the error path to work.
Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      08af4769
    • Jonathan Marek's avatar
      drm/msm: reset devfreq freq_table/max_state before devfreq_add_device · 0ded520b
      Jonathan Marek authored 
      These never get set back to 0 when probing fails, so an attempt to probe
again results in broken behavior. Fix the problem by setting thse to zero
before they are used.
Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      0ded520b
    • Jonathan Marek's avatar
      drm/msm: fix unbalanced pm_runtime_enable in adreno_gpu_{init, cleanup} · 17e822f7
      Jonathan Marek authored 
      adreno_gpu_init calls pm_runtime_enable, so adreno_gpu_cleanup needs to
call pm_runtime_disable.
Signed-off-by: default avatarJonathan Marek <jonathan@marek.ca>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
      17e822f7
  5. 29 Jul, 2020 2 commits
  7. 28 Jul, 2020 2 commits
  9. 27 Jul, 2020 2 commits
  11. 24 Jul, 2020 23 commits
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