- 02 Apr, 2015 17 commits
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
So let's remove everythig that only make sense for a kernel module and build the thing unconditionally. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
So let's remove everything that only makes sense for kernel modules. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
So let's remove everything that only makes sense for kernel modules. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
This simplifies code a lot by dropping many per-revision-group functions. There are still some paths left that use uncommon NVRAM read helpers or fill arrays. They will need to be handled in separated patch. I've tested this (by printing SPROM content) for regressions on: 1) BCM4704 (SPROM revision 2) 2) BCM4706 (SPROM revision 8 plus 11 & 9 on extra WiFi cards) The only difference is not reading board_type from SPROM rev 11 which is unsupported and treated as rev 1. This change for rev 1 is expected. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9660/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
Handling many SPROM revisions became messy, we have tons of functions specific to various revision groups which are quite hard to track. For years there is yet another revision 11 asking for support, but adding it in current the form would make things even worse. To resolve this problem let's add new function with table-like entries that will contain revision bitmask for every SPROM variable. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9659/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Wu Zhangjin authored
!CONFIG_DEBUG_ZBOOT doesn't need puts() and puthex(), remove them and the corrospindig strings for !CONFIG_DEBUG_ZBOOT, as a result, it saves about 1280 bytes. [ralf@linux-mips.org: Resolved reject.] Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/1898/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/9656/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/9655/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Daniel Walter authored
Replace sscanf() with mac_pton(). [ralf@linux-mips.org: Resolved conflict.] Signed-off-by: Daniel Walter <dwalter@google.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7151/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rickard Strandqvist authored
Remove the function proc_dolasatint() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8868/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
When dealing with whole flash content (bcm47xx_nvram_init_from_mem) we need to find NVRAM start trying various partition sizes (nvram_sizes). This is not needed when using MTD as we have direct partition access. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/9652/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
For years Broadcom devices use 64 KiB NVRAM partition size and some of them indeed have it filled in more than 50%. This change allows reading whole NVRAM e.g. on Netgear WNDR4500 and Netgear R8000. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/9651/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
We use IO functions like readl & ioremap_nocache, so include linux/io.h Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: https://patchwork.linux-mips.org/patch/9650/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Fix the 74K D-cache alias erratum workaround so that it actually works. Our current code sets MIPS_CACHE_VTAG for the D-cache, but that flag only has any effect for the I-cache. Additionally MIPS_CACHE_PINDEX is set for the D-cache if CP0.Config7.AR is also set for an affected processor, leading to confusing information in the bootstrap log (the flag isn't used beyond that). So delete the setting of MIPS_CACHE_VTAG and rely on MIPS_CACHE_ALIASES, set in a common place, removing I-cache coherency issues seen in GDB testing with software breakpoints, gdbserver and ptrace(2), on affected systems. While at it add a little piece of explanation of what CP0.Config6.SYND is so that people do not have to chase documentation. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8507/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Guenter Roeck authored
MIPS architecture code does not provide copy_user_page, so it should not provide a prototype for it either. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9266/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- 01 Apr, 2015 23 commits
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Huacai Chen authored
This add south-bridge (SB700/SB710/SB800 chipset) ACPI platform driver for Loongson-3. This will be used by EC (Embedded Controller, used by laptops) driver and STR (Suspend To RAM). [ralf@linux-mips.org: Fix build error if !CONFIG_CPU_LOONGSON3. Build doesn't like it if no obj-* variable is defined at all in a Makefile. Obviously this has not been tested on other platforms.] Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9619/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Huacai Chen authored
This add CPU Hwmon (temperature sensor) platform driver for Loongson-3. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9617/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Huacai Chen authored
This patch enable hardware performance counter support for Loongson-3's perf events. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9618/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Joshua Kinard authored
On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI buses attached to the Xtalk bus. The current code will stop counting PCI buses after it finds the first one. If one installs the optional PCI cardcage ("shoebox") into these systems, because of the order of the Xtalk widgets, the current PCI code will find the cardcage first, and fail to detect the BaseIO PCI devices, which are on a higher Xtalk widget ID. This patch adds the hooks needed for resolving this issue in the IP27 PCI code (in a later patch). Verified on both an SGI Onyx2 and an SGI Octane. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9074/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Joe Perches authored
Use the normal return values for bool functions Signed-off-by: Joe Perches <joe@perches.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9640/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
When hardware checksum generation is switched on the checksum generation was only being signalled to the hardware correctly in Big Endian mode. Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9634/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
The octeon crypto co-processor expects values to be big endian. Wrap the data transfers with cpu_to_be64() and be64_to_cpu() transformations. This passes for all the MD5 test vectors in crypto/testmgr.h Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9631/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9635/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
64 bit access is unaffected but for 32 bit access, swap high and low words. Similarly for 16 bit access, reverse the order of the four possible words, and for 8 bit access reverse the order of byte accesses. Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9630/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9629/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Paul Martin authored
Although the proper way to do this for bitfields would be to use the macro that Ralf has provided, this is a little easier to understand as a diff. Signed-off-by: Paul Martin <paul.martin@codethink.co.uk> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9628/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
So let's remove everything that only makes sense for kernel modules. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Joshua Kinard authored
This allows the kernel to correctly detect an R16000 MIPS CPU on systems that have those. Otherwise, such systems will detect the CPU as an R14000, due to similarities in the CPU PRId value. Signed-off-by: Joshua Kinard <kumba@gentoo.org> Cc: Linux MIPS List <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9092/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Andrew Bresticker authored
As an alternative to the "clock-frequency" property, allow the GIC timer operating clock to be specified in the device-tree instead. This is useful on systems which use common clock or where the GIC is not fixed to a particular frequency and is instead, for example, derived from the CPU clock. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9309/
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Chen Jie authored
Computing sum introduces true data dependency. This patch removes some true data depdendencies, hence increases instruction level parallelism. This patch brings up to 50% csum performance gain on Loongson 3a. One example about how this patch works is in CSUM_BIGCHUNK1: // ** original ** vs ** patch applied ** ADDC(sum, t0) ADDC(t0, t1) ADDC(sum, t1) ADDC(t2, t3) ADDC(sum, t2) ADDC(sum, t0) ADDC(sum, t3) ADDC(sum, t2) In the original implementation, each ADDC(sum, ...) depends on the sum value updated by previous ADDC(as source operand). With this patch applied, the first two ADDC operations are independent, hence can be executed simultaneously if possible. Another example is in the "copy and sum calculating chunk": // ** original ** vs ** patch applied ** STORE(t0, UNIT(0) ... STORE(t0, UNIT(0) ... ADDC(sum, t0) ADDC(t0, t1) STORE(t1, UNIT(1) ... STORE(t1, UNIT(1) ... ADDC(sum, t1) ADDC(sum, t0) STORE(t2, UNIT(2) ... STORE(t2, UNIT(2) ... ADDC(sum, t2) ADDC(t2, t3) STORE(t3, UNIT(3) ... STORE(t3, UNIT(3) ... ADDC(sum, t3) ADDC(sum, t2) With this patch applied, ADDC and the **next next** ADDC are independent. Signed-off-by: chenj <chenj@lemote.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9608/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Rafał Miłecki authored
[ralf@linux-mips.org: Fixed conflicts.] Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Cc: Paul Walmsley <paul@pwsan.com> Patchwork: https://patchwork.linux-mips.org/patch/8665/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Aaro Koskinen authored
DSR-1000N board has two GPIO LEDs next to USB ports. Add support for them. [ralf@linux-mips.org: Resolved conflict due to the moving of the DTS files into vendor subdirectories.] Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9624/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Huacai Chen authored
This patch has no functional changes, it just to keep the assembler code to a minimum. Files and functions naming is borrowed from X86. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/9616/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Huacai Chen authored
We found that TLB mismatch not only happens after kernel resume, but also happens during snapshot restore. So move it to the beginning of swsusp_arch_suspend(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: <stable@vger.kernel.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9621/Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
With no I2C driver available, keeping the platform device registration makes no sense just as keeping the code to instantiage the I2C devices. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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