- 13 Apr, 2015 1 commit
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Arnd Bergmann authored
Merge tag 'omap-for-v4.1/prcm-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/late Pull "Clean-up for omap PRCM (Power Reset Clock Management) and interconnects" from Tony Lindgren Patches originally from Tero Kristo <t-kristo@ti.com>. This sets gets us into a better position for further clean-up: - Gets PRCM code closer to being device drivers - Allows to move the remainig clock code to drivers/clk for v4.2 - Starts enforcing interconnect hierarchy in the SoC specific .dts files to enforce device drivers are only accesing registers in the related hardware module This patchset has seen quite a few revisions but did not come into mergeable shape until recently. As other patchsets for clock specific device drivers depend on this, it would be good to get this merged although it's a bit late for the v4.1 merge window. Note that as the device entries in the .dts files are moved around, this is based on earlier non-urgent fixes to avoid a non-trivial merge conflict. * tag 'omap-for-v4.1/prcm-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (44 commits) ARM: OMAP4+: control: add support for initializing control module via DT ARM: dts: dra7: add minimal l4 bus layout with control module support ARM: dts: omap5: add minimal l4 bus layout with control module support ARM: OMAP4+: control: remove support for legacy pad read/write ARM: OMAP4: display: convert display to use syscon for dsi muxing ARM: dts: omap4: add minimal l4 bus layout with control module support ARM: dts: am4372: add minimal l4 bus layout with control module support ARM: dts: am43xx-epos-evm: fix pinmux node layout ARM: dts: am33xx: add minimal l4 bus layout with control module support ARM: dts: omap3: add minimal l4 bus layout with control module support ARM: dts: omap24xx: add minimal l4 bus layout with control module support ARM: OMAP2+: control: add syscon support for register accesses ARM: OMAP2+: id: cache omap_type value ARM: OMAP2+: control: remove API for getting control module base address ARM: OMAP2+: clock: add low-level support for regmap ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags ARM: OMAP2+: CM: move SoC specific init calls within a generic API ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility ARM: OMAP2+: PRM: move SoC specific init calls within a generic API ...
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- 01 Apr, 2015 1 commit
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https://github.com/t-kristo/linux-pmTony Lindgren authored
Merge branch '4.0-rc1-prcm-cleanup-v6' of https://github.com/t-kristo/linux-pm into omap-for-v4.1/prcm-cleanup Conflicts: arch/arm/boot/dts/dra7.dtsi
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- 31 Mar, 2015 20 commits
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Tero Kristo authored
OMAP4, OMAP5 and DRA7 now parse DT entries for control module address spaces, and set up syscon mappings appropriately. Low level IO init is updated to remove the legacy control module mappings for these devices also. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This patch creates the l4_cfg and l4_wkup interconnects for DRA7, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This patch creates the l4_cfg and l4_wkup interconnects for OMAP5, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
omap4_ctrl_pad_readl/writel are no longer used by anybody, so remove these. Syscon / pinctrl should be used to access the padconf area instead. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
The legacy control module APIs will be gone, thus convert the display driver to use syscon. This change should eventually be moved to display driver from the board directory. Signed-off-by: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
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Tero Kristo authored
This patch creates the l4_cfg and l4_wkup interconnects for OMAP4, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
This patch creates an l4_wkup interconnect for AM43xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM nodea as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Pinmux node should be a reference to the base one, not a complete re-write of it. Having the node like this also prevents modifying the node layout in the base am4372.dtsi file, which is needed for control module changes. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This patch creates an l4_wkup interconnect for AM33xx, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This patch creates an l4_core interconnect for OMAP3, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
This patch creates an l4 / l4-wkup interconnects for omap2420 / omap2430 SoCs, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the new SCM node as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Control module driver needs to support syscon for register accesses, as the DT hierarchy for control module driver is going to be changed. All the control module related features will be moved under control module node, including clocks, pinctrl, and generic configuration register access. Temporary iomap is still provided very early in the boot for access while syscon is not yet ready. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
There is no need to read the register with every invocation of the function, as the value is constant. Thus, cache the value in a static variable. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This shall not be used anymore, as control module driver is converted into using regmap. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Some of the TI clock providers will be converted to use syscon, thus low-level regmap support is needed for the clock drivers also. This patch adds this support, which can be enabled for individual drivers in later patches. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
The compatible DT node is now passed with the prm init, so there is no need to do node matching here again. Added a new flag to the init data also, to detect default IRQ support for OMAP4. Also, any booting omap4 DT setup always has a PRM node, so there is no need to check against the special case where it would be missing. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Currently some cpu_is_X checks are used to setup prm_features, however the same can be accomplished by just passing these flags from the PRM init data. This is done in preparation to make PRM a separate driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This gets rid of need for some exported driver APIs, and simplifies the initialization of the CM driver. Done in preparation to make CM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
PRM device instance offset is now provided through the prm_init_data. This gets rid of some cpu_is_X / soc_is_X calls from PRM core code, preparing for PRM to be its own separate driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This gets rid of need for some exported driver APIs, and simplifies the initialization of the PRM driver. Done in preparation to make PRM a separate driver. The init data is now also passed to the SoC specific implementations, allowing future expansion to add feature flags etc. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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- 27 Mar, 2015 6 commits
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Praneeth Bajjuri authored
ARM errata 798181 is applicable for OMAP5/DRA7 based devices. So enable the same in the build. DRA7xx is based on Cortex-A15 r2p2 revision. ARM Errata extract and workaround information is as below. On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not adequately shooting down all use of the old entries. The ARM_ERRATA_798181 option enables the Linux kernel workaround for this erratum which sends an IPI to the CPUs that are running the same ASID as the one being invalidated. Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
There is no need to provide the control module base address through a low-level API from the low-level IO init, as this information is available through DT. This patch adds a new API to initialize the control module though, but mostly makes the old API obsolete. The old API can be completely removed once OMAP3 is made DT only. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
There is no need to provide the PRM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the PRM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
There is no need to provide the CM base address through a low-level API from the low-level IO init, as this information is available through DT. Re-routed the parsing function to be called from the CM drivers also to simplify the implementation under io.c. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Splits the clock related provider module inits under their own driver files. Previously this was done for all modules under the common PRM driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Splits the clock provider init out of the PRM driver and moves it to clock driver. This is needed so that once the PRCM drivers are separated, they can logically just access the clock driver not needing to go through common PRM code. This would be wrong in the case of control module for example. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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- 26 Mar, 2015 6 commits
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Nishanth Menon authored
BeagleBoard-X15 has capability for a fan and has an onboard TMP102 temperature sensor as well. This allows us to create a new thermal zone (called, un-imaginatively "board"), and allows us to use some active cooling as temperatures start edge upward in the system by creating a new alert temperature (emperically 50C) for cpu. NOTE: Fan is NOT mounted by default on the platform, in such a case, all we end up doing is switch on a regulator and leak very minimal current. Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Add bandgap and related thermal nodes. The patch adds 5 thermal sensors. Only one cooling device for mpu as of now. The sensors are the exact same on both dra72 and dra7. Introduce CPU, GPU, core nodes for the moment as they are direct reuse of OMAP5 entities. NOTE: OMAP4 has a finer counter granularity, which allows for a delay of 1000ms in the thermal zone polling intervals. DRA7 have different counter mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal zone accordingly for DRA7. Signed-off-by: Keerthy <j-keerthy@ti.com> [t-kristo@ti.com: few reuse from OMAP5 entities] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
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Kishon Vijay Abraham I authored
As per the TRMs of AM572x, OMAP4430, OMAP4460, OMAP543x, the value of SYNC2 must be set to 0x6 in order to ensure correct operation. So modified the SYNC2 value of OCP2SCP TIMING register to 0x6 in all the platforms that use OCP2SCP driver except AM437x. Also introduced a new compatible property since we don't want to modify the OCP2SCP TIMING register for AM437x. The sections in TRM where the above caution can be found is mentioned below. AM572x TRM SPRUHZ6 (http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf) under section 26.3.2.2, table 26-26. OMAP4430 TRM SWPU231AP (http://www.ti.com/lit/ug/swpu231ap/swpu231ap.pdf) under section 23.12.6.2.2 , Table 23-1213. OMAP4460 TRM SWPU235AB (http://www.ti.com/lit/ug/swpu235ab/swpu235ab.pdf) under section 23.12.6.2.2, Table 23-1213. OMAP543x TRM SWPU249 (http://www.ti.com/lit/pdf/swpu249) under section 27.3.2.2, Table 27-27. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Kishon Vijay Abraham I authored
Added a new compatible string "ti,am437x-ocp2scp" for OCP2SCP module. This is needed since except for the OCP2SCP used in AM437x, SYNC2 value in OCP2SCP TIMING should be changed whereas the default value is sufficient in AM437x. Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Stefan Agner authored
The NULL pointer check for superset->muxnames will always evaluate true since muxnames is an array within struct omap_mux. Remove the superfluous check to avoid warnings when using LLVM/clang. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 25 Mar, 2015 6 commits
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Tero Kristo authored
All clock provider related drivers will now register their iomaps with a static index. This makes it easier to split up the individual drivers to their own files in subsequent patches. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
These PRCM nodes were earlier added in patch 7800064b ("ARM: dts: Add basic dm816x device tree configuration"), but the documentation for the same wasn't added. Fix this by adding the missing compatible strings under the generic prcm.txt document. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
OMAP4 has different ordering of PRM and CM init calls in the early init. Re-oder these accordingly for OMAP4 also. This is needed so that we can do some optimizations in the following patches for the PRCM init. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
There is no need to call this separately from io.c, rather this can be done commonly under the CM driver. Also, this patch makes the API static, as it is no longer used outside the driver file. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
There is no need to call this separately from io.c, rather this can be done commonly under the PRM driver. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
PRM driver now only exports a generic API for clearing / checking VP txdone status. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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