MFD support for DA9061 is provided as part of the DA9062 device driver.

The registers header file adds two new chip variant IDs defined in DA9061
and DA9062 hardware. The core header file adds new software enumerations
for listing the valid DA9061 IRQs and a da9062_compatible_types enumeration
for distinguishing between DA9061/62 devices in software.

The core source code adds a new .compatible of_device_id entry. This is
extended from DA9062 to support both "dlg,da9061" and "dlg,da9062". The
.data entry now holds a reference to the enumerated device type.

A new regmap_irq_chip model is added for DA9061 and this supports the new
list of regmap_irq entries. A new mfd_cell da9061_devs[] array lists the
new sub system components for DA9061. Support is added for a new DA9061
regmap_config which lists the correct readable, writable and volatile
ranges for this chip.

The probe function uses the device tree compatible string to switch on the
da9062_compatible_types and configure the correct mfd cells, irq chip and
regmap config.

Kconfig is updated to reflect support for DA9061 and DA9062 PMICs.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Extend existing DA9062 binding information to include the DA9061 PMIC for
MFD core and regulators.

Add a da9062-onkey link to the existing onkey binding file.

Add a da9062-thermal link to the new temperature monitoring binding file.

Delete the da9062-watchdog section and replace it with a link to the new
DA9061/62 binding information file.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

GPIO bits clearing on pins assigned to STMPE1600
had no effects due to missing "clear registers"
settings within stmpe1600_regs[].
STMPE1600 does not have dedicated "clear registers",
but single "set/clear registers", hence stmpe1600_regs[]
"clear registers" (STMPE_IDX_GPCR_XXX) must be set to
same value as "set registers" (STMPE_IDX_GPSR_XXX), ie
STMPE1600_REG_GPSR_XXX.
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

In the following code block, BXTWC_DEVICE1_ADDR value is
already fixed and hence there no need to check for
if (!i2c_addr) in every ipc read/write calls. Even if this
check is required it can be moved to probe function.

i2c_addr = BXTWC_DEVICE1_ADDR;
if (!i2c_addr) {
	dev_err(pmic->dev, "I2C address not set\n");
	return -EINVAL;
}

This patch remove this extra check and adds some NULL
parameter checks.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Add a ->resume() hook to make sure the EBI dev configs are correctly
restored when resuming the platform.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

ebid->numcs is never assigned, set it to numcs after allocating the
EBI dev object.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The EBI block is not only available on at91 SoCs, but also on avr32 ones.
Change the structure and function prefixes from at91_ebi to atmel_ebi to
match this fact and make the prefix and driver name consistent.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

All macros prefixed with AT91[SAM9]_SMC have been replaced by equivalent
definitions prefixed with ATMEL_SMC, and the at91sam9_smc_xxxx() helpers
are no longer used.
Drop these definitions before someone starts using them again.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Turn the ->ebi_csa reg field into a simple offset that can be used with
with the matrix regmap. Using reg fields was overkill for this use case.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

New helpers/macros have been to atmel-smc.h introduced to simplify SMC
regs manipulation. Rework the code to use those helpers, and simplify
the ->xlate_config(), ->get_config() and ->apply_config() implementations.

SMC configs are now stored in a struct atmel_smc_cs_conf object that
directly contains registers values, which should help implementing
->suspend()/->resume() hooks.

We can also get rid of those regmap fields (and the associated ->init()
hook) which are not longer needed thanks to the
atmel_[h]smc_cs_conf_{apply,get}() helpers.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

These new helpers + macro definitions are meant to replace the old ones
which are unpractical to use.

Note that the macros and function prefixes have been intentionally
changed to ATMEL_[H]SMC_XX and atmel_[h]smc_ to reflect the fact that
this IP is also embedded in avr32 SoCs (and not only in at91 ones).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

devm_ioremap_resource does checks on the resource. No need to
duplicate this in the driver.
Signed-off-by: Belén Sarabia <belensarabia@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

POWERHOLD signal has higher priority  over the DEV_ON bit.
So power off will not happen if the POWERHOLD is held high.
Hence reset the MUX to GPIO_7 mode to release the POWERHOLD
and the DEV_ON bit to take effect to power off the PMIC.

PMIC Power off happens in dire situations like thermal shutdown
so irrespective of the POWERHOLD setting go ahead and turn off
the powerhold.  Currently poweroff is broken on boards that have
powerhold enabled. This fixes poweroff on those boards.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The tc6393xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The t7l66xb mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The asic3 mfd driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.
Signed-off-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

For better understanding of relationship between headers and modules
rename:
	intel_bxtwc.h -> intel_soc_pmic_bxtwc.h

While here, remove file name from the file itself.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

There is no need to include intel_soc_pmic.h into header which doesn't
require it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Currently, we specify the timeout in terms of the number of polls but it
is more clear from a user of the functions perspective to specify the
timeout directly in milliseconds, as such update the function to these new
semantics.

Additionally, arizona_poll_reg essentially hard-codes
regmap_read_poll_timeout, update the implementation to use
regmap_read_poll_timeout. We still keep arizona_poll_reg around as
regmap_read_poll_timeout is a macro so rather than expand this for each
caller keep it wrapped in arizona_poll_reg.

Whilst we are doing this make the timeouts a little more generous as
the previous system had a bit more slack as it was done as a delay per
iteration of the loop whereas regmap_read_poll_timeout compares ktime's.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Register addresses are normally displayed in hex throughout the Arizona
driver. Update the arizona_poll_reg function to follow this convention.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

arizona_poll_reg already returns ETIMEDOUT if we don't see the expected
register changes before the time out, so remove pointless local setting of
ETIMEDOUT.
Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

To enable eventual removal of pr_warning

This makes pr_warn use consistent for drivers/mfd

Prior to this patch, there were 4 uses of pr_warning and
9 uses of pr_warn in drivers/mfd
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Align the placement as which the mfd_cell of LED is defined as the other
members done on the structure.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

This patch adds description for LED as the sub-module on MT6397/MT6323
multifunction device.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The CHRG_CTRL1 and CHRG_CTRL2 registers are made for controlling
different battery charging settings such as the constant current charge
value.

The AXP22X also have a third register CHRG_CTRL3 which has settings for
battery charging too.

This adds the CHRG_CTRL1, CHRG_CTRL2 and CHRG_CTRL3 registers to the
list of writeable registers for AXP20X and AXP22X PMICs.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The X-Powers AXP20X and AXP22X PMICs expose the status of AC power
supply.

This adds the AC power supply driver to the MFD cells of the AXP22X
PMICs.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-By: Sebastian Reichel <sre@kernel.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

This adds the AXP20X/AXP22x ADCs driver to the mfd cells of the AXP209,
AXP221 and AXP223 MFD.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The registers 0x56 and 0x57 of AXP22X PMIC store the value of the
internal temperature of the PMIC.

This patch modifies the name of these registers from AXP22X_PMIC_ADC_H/L
to AXP22X_PMIC_TEMP_H/L so their purpose is clearer.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

The SPI interface is mostly a copy/paste from the I2C interface with some
minor renaming for consistency. "Client" is an I2C specific term that
was left in the SPI remove path, rename this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

This patch adds documentation for the Altera A10-SR Reset
Controller DT bindings.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Add Peripheral PHY Reset Controller to the Arria10
Development Kit System Resource Chip's MFD.
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

After commit 028af594 ("mfd: intel-lpss: Pass SDA hold time to
I2C host controller driver") the driver still has a non-used variable.

Remove it here.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

This is a sucky change to bump up the time we'll wait for the EC.  Why
is it sucky?  If 200ms for a transfer is a common thing it will have a
massively bad impact on keyboard responsiveness.

It still seems like a good idea to do this, though, because we have a
gas gauge that claims that in an extreme case it could stretch the i2c
clock for 144ms.  It's not a common case so it shouldn't affect
responsiveness, but it can happen.  It's much better to have a single
slow keyboard response than to start returning errors when we don't
have to.

In newer EC designs we should probably implement a virtual battery to
respond to the kernel to insulate the kernel from these types of
issues.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

TI LMU (Lighting Management Unit) driver supports lighting devices below.

  LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697.

LMU devices have common features.
  - I2C interface for accessing device registers
  - Hardware enable pin control
  - Backlight brightness control
  - Notifier for hardware fault monitoring
  - Regulators for LCD display bias

It contains fault monitor, backlight, LED and regulator driver.

LMU fault monitor
-----------------
  LM3633 and LM3697 provide hardware monitoring feature.
  It enables open or short circuit detection.
  After monitoring is done, each device should be re-initialized.
  Notifier is used for this case.
  Separate patch for 'ti-lmu-fault-monitor' will be sent later.

Backlight
---------
  It's handled by TI LMU backlight consolidated driver and
  chip dependent data. Separate patchset will be sent later.

LED indicator
-------------
  LM3633 has 6 indicator LEDs. Programmable dimming pattern is also
  supported. Separate patch for 'leds-lm3633' will be sent later.

Regulator
---------
  LM3631 has 5 regulators for the display bias.
  LM3632 supports 3 regulators. One consolidated driver enables it.
  The lm363x regulator driver is already upstreamed.
Signed-off-by: Milo Kim <milo.kim@ti.com>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

This patch describes overall binding for TI LMU MFD devices.
Signed-off-by: Milo Kim <milo.kim@ti.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

commit b101829a029a ("mfd: axp20x: Fix AXP806 access errors on cold boot")
was intended to fix the case where a board uses an AXP806 in slave mode,
but the boot loader leaves it in master mode for lack of AXP806 support.
But now the driver breaks on boards where the PMIC is operating in master
mode. This patch lets the driver use the new device tree property
"xpowers,master-mode" to set the correct operating mode for the board.

Fixes: 8824ee85 ("mfd: axp20x: Add support for AXP806 PMIC")
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

commit b101829a029a ("mfd: axp20x: Fix AXP806 access errors on cold boot")
was intended to fix the case where a board uses an AXP806 in slave mode,
but the boot loader leaves it in master mode for lack of AXP806 support.
But now the driver breaks on boards where the PMIC is operating in master
mode. To let the device tree describe which mode of operation is needed,
this patch introduces a new property "xpowers,master-mode".

Fixes: 204ae296 ("mfd: axp20x: Add bindings for AXP806 PMIC")
Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Since commit 845c8770 ("i2c / ACPI: Assign IRQ for devices that have
GpioInt automatically") I2C core assigns interrupt line to I2C slave
devices with regarding to GpioInt() resources.

There is no need to repeat this in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

STM32 timers register bank size is 0x400. Fix regmap max_register.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

It is a debugging statement so make it be issued only then.

No functionality change.
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Lee Jones <lee.jones@linaro.org>