1. 14 Jul, 2020 40 commits
    • Ido Schimmel's avatar
      mlxsw: core: Use mirror reason during Rx listener lookup · 6a8c101e
      Ido Schimmel authored
      The Rx listener abstraction allows the switch driver (e.g.,
      mlxsw_spectrum) to register a function that is called when a packet is
      received (trapped) for a specific reason.
      
      Up until now, the Rx listener lookup was solely based on the trap
      identifier. However, when a packet is mirrored to the CPU the trap
      identifier merely indicates that the packet was mirrored, but not why it
      was mirrored. This makes it impossible for the switch driver to register
      different Rx listeners for different mirror reasons.
      
      Solve this by allowing the switch driver to register a Rx listener with
      a mirror reason and by extending the Rx listener lookup to take the
      mirror reason into account.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6a8c101e
    • Ido Schimmel's avatar
      mlxsw: pci: Retrieve mirror reason from CQE during receive · eacc86ec
      Ido Schimmel authored
      In case the mirror reason is valid, retrieve it into the Rx information
      so that it could be used during listener lookup in a later patch.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      eacc86ec
    • Ido Schimmel's avatar
      mlxsw: pci: Add mirror reason field to CQEv2 · a76423a1
      Ido Schimmel authored
      The Completion Queue Element version 2 (CQEv2) includes a field called
      'mirror_reason' which indicates why the packet was mirrored to the CPU.
      
      Add the field so that it can be used by a later patch.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a76423a1
    • Ido Schimmel's avatar
      mlxsw: trap: Add trap identifiers for mirrored packets · 0cc32c5b
      Ido Schimmel authored
      Packets that are mirrored to the CPU port are trapped with one of eight
      trap identifiers. Add them.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      0cc32c5b
    • Amit Cohen's avatar
      mlxsw: reg: Increase trap identifier to 10 bits · 47e4b162
      Amit Cohen authored
      The trap identifier was increased to 10 bits in new versions of the
      Programmer's Reference Manual (PRM).
      
      Increase it accordingly in the Host PacKet Trap (HPKT) register and in
      the Completion Queue Element (CQE).
      
      This is significant for subsequent patches that will introduce trap
      identifiers which utilize the extended range.
      Signed-off-by: default avatarAmit Cohen <amitc@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      47e4b162
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Allow setting policer on a SPAN agent · 4039504e
      Ido Schimmel authored
      When mirroring packets to the CPU port the mirrored packets are trapped
      to the CPU. However, unlike other traps, it is not possible to set a
      policer on the associated trap group. Instead, the policer needs to be
      set on the SPAN agent.
      
      Moreover, the policer ID must be within a specified range: From a
      configurable (even) base ID to this base plus the maximum number of SPAN
      agents.
      
      While the immediate use case is to set the policer on a SPAN agent that
      mirrors to the CPU port, a policer can be set on any SPAN agent.
      Therefore, the operation is implemented for all SPAN agent types.
      
      Extend the SPAN agent request API to allow passing the desired policer
      ID that should be bound to the SPAN agent. Return an error for
      Spectrum-1, as it does not support policer setting on a SPAN agent.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4039504e
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Allow passing parameters to SPAN agents · a120ecc3
      Ido Schimmel authored
      Currently, the only parameter of a SPAN agent is the netdev which
      the SPAN agent should mirror to.
      
      The next patch will add the ability to request a SPAN agent that mirrors
      to a specific netdev and has a specific policer ID bound to it. This is
      required when mirroring packets to the CPU port.
      
      Therefore, encapsulate the sole parameter to mlxsw_sp_span_agent_get()
      in a structure, so that it could later be extended with policer
      information.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a120ecc3
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Add support for mirroring towards CPU port · fa8c08b8
      Ido Schimmel authored
      The Spectrum-2 and Spectrum-3 ASICs are able to mirror packets towards
      the CPU. These packets are then trapped like any other packet, but with
      a special packet trap and additional metadata such as why the packet was
      mirrored.
      
      The ability to mirror packets towards the CPU will be utilized by a
      subsequent patch set that will mirror packets that were dropped by the
      ASIC for various buffer-related reasons, such as tail-drop and
      early-drop.
      
      Add mirroring towards the CPU as a new SPAN agent type and re-use the
      functions that mirror to a physical port where possible.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fa8c08b8
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Do not dereference destination netdev · 6edc8bea
      Ido Schimmel authored
      Currently, the destination netdev to which we mirror must be a valid
      netdev. However, this is going to change with the introduction of
      mirroring towards the CPU port, as the CPU port does not have a backing
      netdev.
      
      Avoid dereferencing the destination netdev when it is not clear if it is
      valid or not.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6edc8bea
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Add driver private info to parms_set() callback · f4a626e2
      Ido Schimmel authored
      The parms_set() callback is supposed to fill in the parameters for the
      SPAN agent, such as the destination port and encapsulation info, if any.
      
      When mirroring to the CPU port we cannot resolve the destination port
      (the CPU port) without access to the driver private info.
      
      Pass the driver private info to parms_set() callback so that it could be
      used later on to resolve the CPU port.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f4a626e2
    • Ido Schimmel's avatar
      mlxsw: spectrum_span: Add per-ASIC SPAN agent operations · 34e4ace5
      Ido Schimmel authored
      The various SPAN agent types differ in their mirror targets (i.e.,
      physical port netdev vs. VLAN netdev) and the encapsulation headers that
      they need to encapsulate the mirrored packets with.
      
      The Spectrum-2 and Spectrum-3 ASICs support a SPAN agent type that is
      able to mirror towards the CPU, whereas the Spectrum-1 ASIC does not.
      
      Prepare for the addition of this new SPAN agent type by splitting the
      SPAN agent operations to be per-ASIC.
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      34e4ace5
    • Amit Cohen's avatar
      mlxsw: reg: add mirroring_pid_base to MOGCR register · 95c68833
      Amit Cohen authored
      Allow setting mirroring_pid_base using MOGCR register.
      Signed-off-by: default avatarAmit Cohen <amitc@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      95c68833
    • Amit Cohen's avatar
      mlxsw: reg: Add session_id and pid to MPAT register · ef8d57e6
      Amit Cohen authored
      Allow setting session_id and pid as part of port analyzer
      configurations.
      Signed-off-by: default avatarAmit Cohen <amitc@mellanox.com>
      Reviewed-by: default avatarJiri Pirko <jiri@mellanox.com>
      Signed-off-by: default avatarPetr Machata <petrm@mellanox.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ef8d57e6
    • Christophe JAILLET's avatar
      net: neterion: vxge: switch from 'pci_' to 'dma_' API · 8331bbe9
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below. No GFP_
      flag needs to be corrected.
      It has been compile tested.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      8331bbe9
    • Christophe JAILLET's avatar
      net: neterion: s2io: switch from 'pci_' to 'dma_' API · fb059b26
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'init_shared_mem()' GFP_KERNEL can be used
      because this flag is already used to allocate some memory in this function.
      
      While at it, update some debug message to match the new function names.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      fb059b26
    • Christophe JAILLET's avatar
      lan743x: switch from 'pci_' to 'dma_' API · a3b7b493
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'lan743x_tx_ring_cleanup()' and
      'lan743x_rx_ring_init()', GFP_KERNEL can be used because this flag is
      already used to allocate some memory in these functions.
      
      While at it, remove a useless (void *) casting in the first hunk in so that
      the code is more consistent.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a3b7b493
    • David S. Miller's avatar
      Merge branch 'bridge-mrp-Add-support-for-interconnect-ring' · 64ee24c7
      David S. Miller authored
      Horatiu Vultur says:
      
      ====================
      bridge: mrp: Add support for interconnect ring
      
      This patch series extends existing MRP to add support for interconnect ring.  An
      interconnect ring is a ring that connects 2 rings. In this way is possible to
      connect multiple rings. Each interconnect ring is form of 4 nodes, in which 3
      have the role MIC(Media Redundancy Interconnect Client) and one has the role
      MIM(Media Redundancy Interconnect Manager). All these nodes need to have the
      same ID and the ID needs to be unique between multiple interconnect rings. And 2
      nodes needs to be part of one ring and the other 2 nodes needs to be part of the
      other ring that is connected.
      
                       +---------+
                       |         |
            +----------|   MRM   |---------------+
            |          |         |               |
            |          +---------+               |
            |                                    |
            |                                    |
            |                                    |
      +--------------+                  +-----------------+
      |              |                  |                 |
      |  MRC/MIC     |------------------|    MRC/MIM      |
      |              |                  |                 |
      +--------------+                  +-----------------+
            |                                     |
            |Interconnect port                    |Interconnect port
            |                                     |
            |                                     |
      +--------------+                  +-----------------+
      |              |                  |                 |
      |  MRC/MIC     |----------------- |   MRC/MIC       |
      |              |                  |                 |
      +--------------+                  +-----------------+
            |                                     |
            |                                     |
            |          +---------+                |
            |          |         |                |
            +----------|  MRM    |----------------+
                       |         |
                       +---------+
      
      Each node in a ring needs to have one of the following ring roles, MRM or MRC.
      And it can also have an interconnect role like MIM or MIC if it is part of an
      interconnect ring. In the figure above the MRM doesn't have any interconnect
      role but the MRC from the top ring have the interconnect roles MIC respectively
      MIM. Therefore it is not possible for a node to have only an interconnect role.
      
      There are 2 ways for interconnect ring to detect when is open or closed:
      1. To use CCM frames on the interconnect port to detect when the interconnect
         link goes down/up. This mode is called LC-mode.
      2. To send InTest frames on all 3 ports(2 ring ports and 1 interconnect port)
         and detect when these frames are received back. This mode is called RC-mode.
      
      This patch series adds support only for RC-mode. Where MIM sends InTest frames
      on all 3 ports and detects when it receives back the InTest. When it receives
      the InTest it means that the ring is closed so it would set the interconnect
      port in blocking state. If it stops receiving the InTest frames then it would
      set the port in forwarding state and it would send InTopo frames. These InTopo
      frames will be received by MRM nodes and process them. And then the MRM will
      send Topo frames in the rings so each client will clear its FDB.
      
      v4:
        - always cancel delay work if the MRP instance is deleted or interconnect role
          is disabled but allow only to start to send InTest frames only if the role
          is MIM.
      
      v3:
        - update 'br_mrp_set_in_role' to stop sending test if the role is disabled
          and don't allow to set a different interconnect port if there is already
          one.
      
      v2:
        - rearrange structures not to contain holes
        - stop sending MRP_InTest frames when the MRP instance is deleted
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      64ee24c7
    • Horatiu Vultur's avatar
      net: bridge: Add port attribute IFLA_BRPORT_MRP_IN_OPEN · ffb3adba
      Horatiu Vultur authored
      This patch adds a new port attribute, IFLA_BRPORT_MRP_IN_OPEN, which
      allows to notify the userspace when the node lost the contiuity of
      MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ffb3adba
    • Horatiu Vultur's avatar
      bridge: mrp: Extend br_mrp_fill_info · 4fc4871f
      Horatiu Vultur authored
      This patch extends the function br_mrp_fill_info to return also the
      status for the interconnect ring.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4fc4871f
    • Horatiu Vultur's avatar
      bridge: uapi: mrp: Extend MRP_INFO attributes for interconnect status · 559139cb
      Horatiu Vultur authored
      Extend the existing MRP_INFO to return status of MRP interconnect. In
      case there is no MRP interconnect on the node then the role will be
      disabled so the other attributes can be ignored.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      559139cb
    • Horatiu Vultur's avatar
      bridge: mrp: Extend MRP netlink interface for configuring MRP interconnect · 7ab1748e
      Horatiu Vultur authored
      This patch extends the existing MRP netlink interface with the following
      attributes: IFLA_BRIDGE_MRP_IN_ROLE, IFLA_BRIDGE_MRP_IN_STATE and
      IFLA_BRIDGE_MRP_START_IN_TEST. These attributes are similar with their
      ring attributes but they apply to the interconnect port.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      7ab1748e
    • Horatiu Vultur's avatar
      bridge: mrp: Implement the MRP Interconnect API · 537ed567
      Horatiu Vultur authored
      Thie patch adds support for MRP Interconnect. Similar with the MRP ring,
      if the HW can't generate MRP_InTest frames, then the SW will try to
      generate them. And if also the SW fails to generate the frames then an
      error is return to userspace.
      
      The forwarding/termination of MRP_In frames is happening in the kernel
      and is done by MRP instances.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      537ed567
    • Horatiu Vultur's avatar
      bridge: switchdev: mrp: Extend MRP API for switchdev for MRP Interconnect · f23f0db3
      Horatiu Vultur authored
      Implement the MRP API for interconnect switchdev. Similar with the other
      br_mrp_switchdev function, these function will just eventually call the
      switchdev functions: switchdev_port_obj_add/del.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f23f0db3
    • Horatiu Vultur's avatar
      bridge: mrp: Add br_mrp_in_port_open function · 4139d4b5
      Horatiu Vultur authored
      This function notifies the userspace when the node lost the continuity
      of MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4139d4b5
    • Horatiu Vultur's avatar
      bridge: mrp: Rename br_mrp_port_open to br_mrp_ring_port_open · 4cc625c6
      Horatiu Vultur authored
      This patch renames the function br_mrp_port_open to
      br_mrp_ring_port_open. In this way is more clear that a ring port lost
      the continuity because there will be also a br_mrp_in_port_open.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      4cc625c6
    • Horatiu Vultur's avatar
      bridge: mrp: Extend br_mrp for MRP interconnect · 78c1b4fb
      Horatiu Vultur authored
      This patch extends the 'struct br_mrp' to contain information regarding
      the MRP interconnect. It contains the following:
      - the interconnect port 'i_port', which is NULL if the node doesn't have
        a interconnect role
      - the interconnect id, which is similar with the ring id, but this field
        is also part of the MRP_InTest frames.
      - the interconnect role, which can be MIM or MIC.
      - the interconnect state, which can be open or closed.
      - the interconnect delayed_work for sending MRP_InTest frames and check
        for lost of continuity.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      78c1b4fb
    • Horatiu Vultur's avatar
      bridge: mrp: Extend bridge interface · 43364ef1
      Horatiu Vultur authored
      This patch adds a new flag(BR_MRP_LOST_IN_CONT) to the net bridge
      ports. This bit will be set when the port lost the continuity of
      MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      43364ef1
    • Horatiu Vultur's avatar
      bridge: uapi: mrp: Extend MRP attributes for MRP interconnect · 28017583
      Horatiu Vultur authored
      Extend the existing MRP netlink attributes to allow to configure MRP
      Interconnect:
      
      IFLA_BRIDGE_MRP_IN_ROLE - the parameter type is br_mrp_in_role which
        contains the interconnect id, the ring id, the interconnect role(MIM
        or MIC) and the port ifindex that represents the interconnect port.
      
      IFLA_BRIDGE_MRP_IN_STATE - the parameter type is br_mrp_in_state which
        contains the interconnect id and the interconnect state.
      
      IFLA_BRIDGE_MRP_IN_TEST - the parameter type is br_mrp_start_in_test
        which contains the interconnect id, the interval at which to send
        MRP_InTest frames, how many test frames can be missed before declaring
        the interconnect ring open and the period which represents for how long
        to send MRP_InTest frames.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Acked-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      28017583
    • Horatiu Vultur's avatar
      switchdev: mrp: Extend switchdev API for MRP Interconnect · cf7c5274
      Horatiu Vultur authored
      Extend switchdev API to add support for MRP interconnect. The HW is
      notified in the following cases:
      
      SWITCHDEV_OBJ_ID_IN_ROLE_MRP: This is used when the interconnect role
        of the node changes. The supported roles are MIM and MIC.
      
      SWITCHDEV_OBJ_ID_IN_STATE_MRP: This is used when the interconnect ring
        changes it states to open or closed.
      
      SWITCHDEV_OBJ_ID_IN_TEST_MRP: This is used to start/stop sending
        MRP_InTest frames on all MRP ports. This is called only on nodes that
        have the interconnect role MIM.
      Signed-off-by: default avatarHoratiu Vultur <horatiu.vultur@microchip.com>
      Reviewed-by: default avatarNikolay Aleksandrov <nikolay@cumulusnetworks.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      cf7c5274
    • David S. Miller's avatar
      Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next · 07dd1b7e
      David S. Miller authored
      Alexei Starovoitov says:
      
      ====================
      pull-request: bpf-next 2020-07-13
      
      The following pull-request contains BPF updates for your *net-next* tree.
      
      We've added 36 non-merge commits during the last 7 day(s) which contain
      a total of 62 files changed, 2242 insertions(+), 468 deletions(-).
      
      The main changes are:
      
      1) Avoid trace_printk warning banner by switching bpf_trace_printk to use
         its own tracing event, from Alan.
      
      2) Better libbpf support on older kernels, from Andrii.
      
      3) Additional AF_XDP stats, from Ciara.
      
      4) build time resolution of BTF IDs, from Jiri.
      
      5) BPF_CGROUP_INET_SOCK_RELEASE hook, from Stanislav.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      07dd1b7e
    • Alexander A. Klimov's avatar
      wan: Replace HTTP links with HTTPS ones · bfe4c403
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      bfe4c403
    • Christophe JAILLET's avatar
      pcnet32: switch from 'pci_' to 'dma_' API · da6e8ace
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'pcnet32_realloc_tx_ring()' and
      'pcnet32_realloc_rx_ring()', GFP_ATOMIC must be used because a spin_lock is
      hold.
      The call chain is:
         pcnet32_set_ringparam
         ** spin_lock_irqsave(&lp->lock, flags);
         --> pcnet32_realloc_tx_ring
         --> pcnet32_realloc_rx_ring
         ** spin_unlock_irqrestore(&lp->lock, flags);
      
      When memory is in 'pcnet32_probe1()' and 'pcnet32_alloc_ring()', GFP_KERNEL
      can be used.
      
      While at it, update a few comments and pr_err messages to be more in line
      with the new function names.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      da6e8ace
    • Christophe JAILLET's avatar
      amd8111e: switch from 'pci_' to 'dma_' API · 428f09c2
      Christophe JAILLET authored
      The wrappers in include/linux/pci-dma-compat.h should go away.
      
      The patch has been generated with the coccinelle script below and has been
      hand modified to replace GPF_ with a correct flag.
      It has been compile tested.
      
      When memory is allocated in 'amd8111e_init_ring()', GFP_ATOMIC must be used
      because a spin_lock is hold.
      One of the call chains is:
         amd8111e_open
         ** spin_lock_irq(&lp->lock);
         --> amd8111e_restart
            --> amd8111e_init_ring
         ** spin_unlock_irq(&lp->lock);
      
      The rest of the patch is produced by coccinelle with a few adjustments to
      please checkpatch.pl.
      
      @@
      @@
      -    PCI_DMA_BIDIRECTIONAL
      +    DMA_BIDIRECTIONAL
      
      @@
      @@
      -    PCI_DMA_TODEVICE
      +    DMA_TO_DEVICE
      
      @@
      @@
      -    PCI_DMA_FROMDEVICE
      +    DMA_FROM_DEVICE
      
      @@
      @@
      -    PCI_DMA_NONE
      +    DMA_NONE
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_alloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3;
      @@
      -    pci_zalloc_consistent(e1, e2, e3)
      +    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_free_consistent(e1, e2, e3, e4)
      +    dma_free_coherent(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_single(e1, e2, e3, e4)
      +    dma_map_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_single(e1, e2, e3, e4)
      +    dma_unmap_single(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4, e5;
      @@
      -    pci_map_page(e1, e2, e3, e4, e5)
      +    dma_map_page(&e1->dev, e2, e3, e4, e5)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_page(e1, e2, e3, e4)
      +    dma_unmap_page(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_map_sg(e1, e2, e3, e4)
      +    dma_map_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_unmap_sg(e1, e2, e3, e4)
      +    dma_unmap_sg(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
      +    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_single_for_device(e1, e2, e3, e4)
      +    dma_sync_single_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
      +    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2, e3, e4;
      @@
      -    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
      +    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)
      
      @@
      expression e1, e2;
      @@
      -    pci_dma_mapping_error(e1, e2)
      +    dma_mapping_error(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_dma_mask(e1, e2)
      +    dma_set_mask(&e1->dev, e2)
      
      @@
      expression e1, e2;
      @@
      -    pci_set_consistent_dma_mask(e1, e2)
      +    dma_set_coherent_mask(&e1->dev, e2)
      Signed-off-by: default avatarChristophe JAILLET <christophe.jaillet@wanadoo.fr>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      428f09c2
    • Alexander A. Klimov's avatar
      net: wan: cosa: Replace HTTP links with HTTPS ones · 350d1931
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      350d1931
    • Alexander A. Klimov's avatar
      net: jme: Replace HTTP links with HTTPS ones · d788a0b5
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d788a0b5
    • Alexander A. Klimov's avatar
      net: ethernet: Replace HTTP links with HTTPS ones · a7d02782
      Alexander A. Klimov authored
      Rationale:
      Reduces attack surface on kernel devs opening the links for MITM
      as HTTPS traffic is much harder to manipulate.
      
      Deterministic algorithm:
      For each file:
        If not .svg:
          For each line:
            If doesn't contain `\bxmlns\b`:
              For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
      	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
                  If both the HTTP and HTTPS versions
                  return 200 OK and serve the same content:
                    Replace HTTP with HTTPS.
      Signed-off-by: default avatarAlexander A. Klimov <grandmaster@al2klimov.de>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a7d02782
    • David S. Miller's avatar
      Merge branch 'New-DSA-driver-for-VSC9953-Seville-switch' · 35c891e1
      David S. Miller authored
      Vladimir Oltean says:
      
      ====================
      New DSA driver for VSC9953 Seville switch
      
      Looking at the Felix and Ocelot drivers, Maxim asked if it would be
      possible to use them as a base for a new driver for the Seville switch
      inside NXP T1040. Turns out, it is! The result is that the mscc_felix
      driver was extended to probe on Seville.
      
      The biggest challenge seems to be getting register read/write API
      generic enough to cover such wild bitfield variations between hardware
      generations.
      
      Currently, both felix and seville are built under the same kernel config
      option (NET_DSA_MSCC_FELIX). This has both some advantages (no need to
      duplicate the Lynx PCS code from felix_vsc9959.c) and some disadvantages
      (Seville needs to depend on PCI and on ENETC_MDIO). This will be further
      refined as time progresses.
      
      The driver has been completely reviewed. Previous submission was here,
      it wasn't accepted due to a conflict with Mark Brown's tree, very late
      in the release cycle:
      
      https://patchwork.ozlabs.org/project/netdev/cover/20200531122640.1375715-1-olteanv@gmail.com/
      
      So this is more of a repost, with the only changes being related to
      rebasing on top of the cleanup I had to do in Ocelot.
      ====================
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      35c891e1
    • Vladimir Oltean's avatar
      docs: devicetree: add bindings for Seville DSA switch inside Felix driver · 77710929
      Vladimir Oltean authored
      There are no non-standard bindings being used. However Felix is a PCI
      device and Seville is a platform device. So give an example of device
      tree for this switch and document its compatible string.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      77710929
    • Maxim Kochetkov's avatar
      net: dsa: felix: introduce support for Seville VSC9953 switch · 84705fc1
      Maxim Kochetkov authored
      This is another switch from Vitesse / Microsemi / Microchip, that has
      10 ports (8 external, 2 internal) and is integrated into the Freescale /
      NXP T1040 PowerPC SoC. It is very similar to Felix from NXP LS1028A,
      except that this is a platform device and Felix is a PCI device, and it
      doesn't support IEEE 1588 and TSN.
      
      Like Felix, this driver configures its own PCS on the internal MDIO bus
      using a phy_device abstraction for it (yes, it will be refactored to use
      a raw mdio_device, like other phylink drivers do, but let's keep it like
      that for now). But unlike Felix, the MDIO bus and the PCS are not from
      the same vendor. The PCS is the same QorIQ/Layerscape PCS as found in
      Felix/ENETC/DPAA*, but the internal MDIO bus that is used to access it
      is actually an instantiation of drivers/net/phy/mdio-mscc-miim.c. But it
      would be difficult to reuse that driver (it doesn't even use regmap, and
      it's less than 200 lines of code), so we hand-roll here some internal
      MDIO bus accessors within seville_vsc9953.c, which serves the purpose of
      driving the PCS absolutely fine.
      
      Also, same as Felix, the PCS doesn't support dynamic reconfiguration of
      SerDes protocol, so we need to do pre-validation of PHY mode from device
      tree and not let phylink change it.
      Signed-off-by: default avatarMaxim Kochetkov <fido_max@inbox.ru>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      84705fc1
    • Vladimir Oltean's avatar
      net: dsa: felix: move probing to felix_vsc9959.c · 375e1314
      Vladimir Oltean authored
      Felix is not actually meant to be a DSA driver only for the switch
      inside NXP LS1028A, but an umbrella for all Vitesse / Microsemi /
      Microchip switches that are register-compatible with Ocelot and that are
      using in DSA mode (with an NPI Ethernet port).
      
      For the dsa_switch_ops exported by the felix driver to be generic enough
      to be used by other non-PCI switches, we need to move the PCI-specific
      probing to the low-level translation module felix_vsc9959.c. This way,
      other switches can have their own probing functions, as platform devices
      or otherwise.
      
      This patch also removes the "Felix instance table", which did not stand
      the test of time and is unnecessary at this point.
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      375e1314