- 12 Jul, 2018 9 commits
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Shaoyun Liu authored
Signed-off-by:
Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Oded Gabbay <oded.gabbay@gmail.com>
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Lan Xiao authored
Upon VM Fault, the VMID and PASID written by HW are zeros in Hawaii. Instead of reading from ih_ring_entry, read directly from the registers. This workaround fix the soft hang issues caused by mishandled VM Fault in Hawaii. Signed-off-by:
Lan Xiao <Lan.Xiao@amd.com> Signed-off-by:
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shaoyunl authored
1. Pre-GFX9 the amdgpu ISR saves the vm-fault status and address per per-vmid. amdkfd needs to get the information from amdgpu through the new get_vm_fault_info interface. On GFX9 and later, all the required information is in the IH ring 2. amdkfd unmaps all queues from the faulting process and create new run-list without the guilty process 3. amdkfd notifies the runtime of the vm fault trap via EVENT_TYPE_MEMORY Signed-off-by:
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shaoyunl authored
amdgpu save the vm fault related information for KFD usage and keep the copy until KFD read it. Signed-off-by:
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Moses Reuben authored
Signed-off-by:
Moses Reuben <moses.reuben@amd.com> Reviewed-by:
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Wei Lu authored
Return ERR_PTR(-EINVAL) if kfd_get_process fails to find the process. This fixes kernel oopses when a child process calls KFD ioctls with a file descriptor inherited from the parent process. Signed-off-by:
Wei Lu <wei.lu2@amd.com> Reviewed-by:
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Jay Cornwall authored
The scheduler may raise SQ_WAVE_STATUS.SPI_PRIO via SQ_CMD before context restore has completed. Restoring SPI_PRIO=0 after this point may cause context save to fail as the lower priority wavefronts are not selected for execution among spin-waiting wavefronts. Leave SPI_PRIO at its SPI-initialized or scheduler-raised value. v2: Also fix race with exception handler Signed-off-by:
Jay Cornwall <Jay.Cornwall@amd.com> Reviewed-by:
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Felix Kuehling authored
This is no longer needed with the memalloc_nofs_save/restore in dqm_lock/unlock. Signed-off-by:
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Felix Kuehling authored
This is needed to prevent deadlocks when MMU notifiers run in reclaim-FS context and take the DQM lock for userptr evictions. Previously this was done by making all memory allocations under DQM locks GFP_NOIO. This is error prone. Using memalloc_nofs_save/restore will reliably affect all memory allocations anywhere in the kernel while the DQM lock is held. Signed-off-by:
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- 11 Jul, 2018 1 commit
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Arnd Bergmann authored
getrawmonotonic64() and get_monotonic_boottime64() are deprecated because of the nonstandard naming. The replacement functions ktime_get_raw_ns() and ktime_get_boot_ns() also simplify the callers. Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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- 27 Jul, 2018 4 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
Updates for 4.19. Mostly bug fixes and cleanups. Highlights: - Internal API cleanup in GPU scheduler - Decouple i2c and aux abstractions in DC - Update maintainers - Misc cleanups - Misc bug fixes Signed-off-by:
Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180725215326.2709-1-alexander.deucher@amd.com
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Dave Airlie authored
Merge tag 'exynos-drm-next-for-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Cleanups - Change g2d driver to component based driver . g2d driver was last customed sub driver so this patch series changes it to component based driver, which also makes gem handling to be more simplify. - Cleanup of Exynos DRM suspend/resume . Register exynos drm core suspend/resume functions to prepare/complete callbacks of dev_pm_ops instead of suspend/resume callbacks to ensure exynos_drm_suspend() is called before any suspend callback from the real devices to avoid some issues on boards with complex pipelines. . Also Add pm_runtime_furce_suspend/resume as SYSTEM_SLEEP_PM_OPS to ensure that resources of each devices will be released for the system PM suspend/resume cycle. - Remove local value not used. Signed-off-by:
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git://linux-arm.org/linux-ldDave Airlie authored
I have a couple of small patches for malidp to be applied in drm-next. They have arisen from the decision to switch the writeback connectors to always connected. Signed-off-by:
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
drm/imx: cleanup and csi improvements - Remove the unused struct imx_drm_crtc and the unused pipes field from imx_drm_device and replace drm_dev_unref with drm_dev_put. - Extend CSI configuration to support RGB888 and BGR888 capture, as well as 16-bit RGB565 capture via a parallel bus. - Add CPMEM support for negative interlace offsets, which is necessary to support writing captured bottom-top interlaced fields to memory with interleaved lines. Signed-off-by:
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- 25 Jul, 2018 11 commits
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Jia-Ju Bai authored
cik_pcie_gen3_enable() is only called by cik_common_hw_init(), which is never called in atomic context. cik_pcie_gen3_enable() calls mdelay() to busily wait, which is not necessary. mdelay() can be replaced with msleep(). This is found by a static analysis tool named DCNS written by myself. Signed-off-by:
Jia-Ju Bai <baijiaju1990@gmail.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
The address printed is the actual address, not the page. Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Nayan Deshmukh authored
The scheduler of the entity is decided by the run queue on which it is queued. This patch avoids us the effort required to maintain a sync between rq and sched field when we start shifting entites among different rqs. Signed-off-by:
Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
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Nayan Deshmukh authored
entity has a scheduler field and we don't need the sched argument in any of the functions where entity is provided. Signed-off-by:
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Christian König authored
Make struct amdgpu_bo a bit smaller. Signed-off-by:
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Christian König authored
Just rename functions, no functional change. Signed-off-by:
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Christian König authored
Add separate entry for the power managent code on AMD GPUs. Signed-off-by:
Rex Zhu <rezhu@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Acked-by:
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Christian König authored
Note that Harry and Leo Li are maintainers for that stuff. Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
Leo Li <sunpeng.li@amd.com> Signed-off-by:
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Christian König authored
Roger unfortunately doesn't work for AMD any longer. So add Rui and Jerry as co-maintainer as well. Signed-off-by:
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Christian König authored
Going to completely rework the context to ring mapping with Nayan's GSoC work, but for now just stopping to expose the second UVD instance should do it. Signed-off-by:
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Christian König authored
No need to bitcast a boolean and even if we should use "!!" instead. Signed-off-by:
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- 24 Jul, 2018 15 commits
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Harry Wentland authored
Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Jun Lei authored
[why] confusing as to which part of debug is informational, and which part causes behavioral change Signed-off-by:
Jun Lei <Jun.Lei@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Bhawanpreet Lakha authored
[Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions directly Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
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vikrant mhaske authored
[why] Diags has POR to run the video workload using AYCRCB8888 through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be able to convert from internal RGB to YUV420 Signed-off-by:
vikrant mhaske <vikrant.mhaske@amd.com> Reviewed-by:
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David Francis authored
[Why] When a dce100 asic was suspended, the clocks were not set to 0. Upon resume, the new clock was compared to the existing clock, they were found to be the same, and so the clock was not set. This resulted in a pernicious blackscreen. [How] In atomic commit, check to see if there are any active pipes. If no, set clocks to 0 Signed-off-by:
David Francis <David.Francis@amd.com> Reviewed-by:
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Tony Cheng authored
[why] diag specify what the full config and is only concerned about pass/fail at the end having inter-op code like verifiying we can actually train at reported link rate slows down diag test and add complexity we don't need [how] add dc_debug option to skip capability link trianing also remove hbr in function name as verify is not specific to hbr Signed-off-by:
Ken Chalmers <ken.chalmers@amd.com> Acked-by:
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Mikita Lipski authored
[why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when the pipe is not active. [how] remove the assert Signed-off-by:
Mikita Lipski <mikita.lipski@amd.com> Reviewed-by:
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Shirish S authored
This patch moves amdgpu_fbdev_set_suspend() to the beginning of suspend sequence. This is to ensure fbcon does not to write to the VRAM after GPU is powerd down. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
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Michel Dänzer authored
The warning turned out to be not so useful, as BO destruction tends to be deferred to a workqueue. Also, we should be preventing any damage from this now, so not really important anymore to fix code doing this. Acked-by:
Mike Lothian <mike@fireburn.co.uk> Signed-off-by:
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Evan Quan authored
Otherwise there may be potential SMU performance issues. v2: fix commit description and coding style Signed-off-by:
Rex Zhu <rex.zhu@amd.com> Signed-off-by:
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Evan Quan authored
The argument was set wrongly. Fast/slow switch was asked when there is actually a slow/fast switch needed. Signed-off-by:
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Evan Quan authored
Slow switch for UCLK when there is multiple displays and they are not in sync. Signed-off-by:
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Michel Dänzer authored
We were testing the register offset, instead of the value stored in the register, therefore always timing out the loop. This reduces suspend time of the system in the bug report below by ~600 ms. Cc: stable@vger.kernel.org Bugzilla: https://bugs.freedesktop.org/107277Tested-by:
Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-by:
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Krzysztof Kozlowski authored
Remove local variable 'priv' to fix GCC warning: drivers/gpu/drm/exynos/exynos_mixer.c: In function 'mixer_initialize': drivers/gpu/drm/exynos/exynos_mixer.c:840:29: warning: variable 'priv' set but not used [-Wunused-but-set-variable] Signed-off-by:Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Marek Szyprowski authored
Add calls to pm_runtime_force_{suspend,resume} as SYSTEM_SLEEP_PM_OPS for all drivers for the real Exynos DRM hardware modules. This ensures that the resources will be released for the system PM suspend/resume cycle. Exynos DRM core already takes care of suspending the whole display pipeline before PM callbacks of the real devices are called. Signed-off-by:Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
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