- 07 Jul, 2009 2 commits
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Herbert Xu authored
This patch adds a new argument to crypto_alloc_instance which sets aside some space before the instance for use by algorithms such as shash that place type-specific data before crypto_alg. For compatibility the function has been renamed so that existing users aren't affected. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Herbert Xu authored
This patch introduces the template->create function intended to replace the existing alloc function. The intention is for create to handle the registration directly, whereas currently the caller of alloc has to handle the registration. This allows type-specific code to be run prior to registration. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 03 Jul, 2009 2 commits
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Sebastian Andrzej Siewior authored
As reported by Eric Sesterhenn the re-allocation of the cipher in reset leads to: |BUG: sleeping function called from invalid context at kernel/rwsem.c:21 |in_atomic(): 1, irqs_disabled(): 0, pid: 4926, name: modprobe |INFO: lockdep is turned off. |Pid: 4926, comm: modprobe Tainted: G M 2.6.31-rc1-22297-g52989765 #24 |Call Trace: | [<c011dd93>] __might_sleep+0xf9/0x101 | [<c0777aa0>] down_read+0x16/0x68 | [<c048bf04>] crypto_alg_lookup+0x16/0x34 | [<c048bf52>] crypto_larval_lookup+0x30/0xf9 | [<c048c038>] crypto_alg_mod_lookup+0x1d/0x62 | [<c048c13e>] crypto_alloc_base+0x1e/0x64 | [<c04bf991>] reset_prng_context+0xab/0x13f | [<c04e5cfc>] ? __spin_lock_init+0x27/0x51 | [<c04bfce1>] cprng_init+0x2a/0x42 | [<c048bb4c>] __crypto_alloc_tfm+0xfa/0x128 | [<c048c153>] crypto_alloc_base+0x33/0x64 | [<c04933c9>] alg_test_cprng+0x30/0x1f4 | [<c0493329>] alg_test+0x12f/0x19f | [<c0177f1f>] ? __alloc_pages_nodemask+0x14d/0x481 | [<d09219e2>] do_test+0xf9d/0x163f [tcrypt] | [<d0920de6>] do_test+0x3a1/0x163f [tcrypt] | [<d0926035>] tcrypt_mod_init+0x35/0x7c [tcrypt] | [<c010113c>] _stext+0x54/0x12c | [<d0926000>] ? tcrypt_mod_init+0x0/0x7c [tcrypt] | [<c01398a3>] ? up_read+0x16/0x2b | [<c0139fc4>] ? __blocking_notifier_call_chain+0x40/0x4c | [<c014ee8d>] sys_init_module+0xa9/0x1bf | [<c010292b>] sysenter_do_call+0x12/0x32 because a spin lock is held and crypto_alloc_base() may sleep. There is no reason to re-allocate the cipher, the state is resetted in ->setkey(). This patches makes the cipher allocation a one time thing and moves it to init. Reported-by: Eric Sesterhenn <eric.sesterhenn@lsexperts.de> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Sebastian Andrzej Siewior authored
The current code uses a mix of sping_lock() & spin_lock_irqsave(). This can lead to deadlock with the correct timming & cprng_get_random() + cprng_reset() sequence. I've converted them to bottom half locks since all three user grab just a BH lock so this runs probably in softirq :) Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Acked-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 02 Jul, 2009 1 commit
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Herbert Xu authored
This patch adds the support for testing specific implementations. This should only be used in very specific situations. Right now this means specific implementations of random number generators. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 25 Jun, 2009 3 commits
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Herbert Xu authored
As it stands we use chainiv for sync algorithms and eseqiv for async algorithms. However, when there is more than one CPU chainiv forces all processing to be serialised which is usually not what you want. Also, the added overhead of eseqiv isn't that great. Therefore this patch changes the default sync geniv on SMP machines to eseqiv. For the odd situation where the overhead is unacceptable then chainiv is still available as an option. Note that on UP machines chainiv is still preferred over eseqiv for sync algorithms. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Herbert Xu authored
When a sync givcipher algorithm is requested, if an async version of the same algorithm already exists, then we will loop forever without ever constructing the sync version based on a blkcipher. This is because we did not include the requested type/mask when getting a larval for the geniv algorithm that is to be constructed. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Joe Perches authored
Signed-off-by: Joe Perches <joe@perches.com> Acked-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 24 Jun, 2009 2 commits
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Herbert Xu authored
Until hash test vectors grow longer than 256 bytes, the only purpose of the check is to generate a gcc warning. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Roland Dreier authored
When the aes-intel module is loaded on a system that does not have the AES instructions, it prints Intel AES-NI instructions are not detected. at level KERN_ERR. Since aes-intel is aliased to "aes" it will be tried whenever anything uses AES and spam the console. This doesn't match existing practice for how to handle "no hardware" when initializing a module, so downgrade the message to KERN_INFO. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 21 Jun, 2009 1 commit
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Neil Horman authored
The ANSI CPRNG has no dependence on FIPS support. FIPS support however, requires the use of the CPRNG. Adjust that depedency relationship in Kconfig. Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 19 Jun, 2009 3 commits
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Herbert Xu authored
We should return 0/-ENOENT instead of 1/0 when testing by name. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Herbert Xu authored
The RNG should work with FIPS disabled. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Steffen Klassert authored
This adds the 'alg' module parameter to be able to test an algorithm by name. If the algorithm type is not ad-hoc clear for a algorithm (e.g. pcrypt, cryptd) it is possilbe to set the algorithm type with the 'type' module parameter. Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 18 Jun, 2009 7 commits
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Jarod Wilson authored
Just started running fips cavs test vectors through an s390x system for giggles, and discovered that I missed patching s390's arch-specific des3 implementation w/an earlier des3 patch to permit weak keys. This change adds the same flag tweaks as ad79cdd7 (crypto: des3_ede - permit weak keys unless REQ_WEAK_KEY set) for s390's des3 implementation, yields expected test results now. Signed-off-by: Jarod Wilson <jarod@redhat.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Neil Horman authored
FIPS-140 requires that all random number generators implement continuous self tests in which each extracted block of data is compared against the last block for repetition. The ansi_cprng implements such a test, but it would be nice if the hw rng's did the same thing. Obviously its not something thats always needed, but it seems like it would be a nice feature to have on occasion. I've written the below patch which allows individual entropy stores to be flagged as desiring a continuous test to be run on them as is extracted. By default this option is off, but is enabled in the event that fips mode is selected during bootup. Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Acked-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Huang Ying authored
kernel_fpu_begin/end used preempt_disable/enable, so sleep should be prevented between kernel_fpu_begin/end. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Huang Ying authored
Because AES-NI instructions will touch XMM state, corresponding code must be enclosed within kernel_fpu_begin/end, which used preempt_disable/enable. So sleep should be prevented between kernel_fpu_begin/end. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Huang Ying authored
Original implementation of aesni_cbc_dec do not save IV if input length % 4 == 0. This will make decryption of next block failed. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Chuck Ebbert authored
Extend previous workarounds for the prefetch bug to cover CBC mode, clean up the code a bit. Signed-off-by: Chuck Ebbert <cebbert@redhat.com> Acked-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Chuck Ebbert authored
The VIA Nano processor has a bug that makes it prefetch extra data during encryption operations, causing spurious page faults. Extend existing workarounds for ECB mode to copy the data to an temporary buffer to avoid the problem. Signed-off-by: Chuck Ebbert <cebbert@redhat.com> Acked-by: Harald Welte <HaraldWelte@viatech.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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- 17 Jun, 2009 19 commits
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Matthew Wilcox authored
ia64 was assigning resources to root busses after allocations had been made for child busses. Calling pcibios_setup_root_windows() from pcibios_fixup_bus() solves this problem by assigning the resources to the root bus before child busses are scanned. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Tested-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Matthew Wilcox authored
Instead of open-coding pci_find_parent_resource and request_resource, just call pci_claim_resource. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Matthew Wilcox authored
This function was only used by pci_claim_resource(), and the last commit deleted that use. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Matthew Wilcox authored
Instead of starting from the iomem or ioport roots, start from the parent bus' resources. This fixes a bug where child resources would appear above their parents resources if they had the same size. Signed-off-by: Matthew Wilcox <willy@linux.intel.com> Tested-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6Linus Torvalds authored
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Convert ia64 to use int-ll64.h [IA64] Fix build error in paravirt_patchlist.c [IA64] ia64 does not need umount2() syscall [IA64] hook up new rt_tgsigqueueinfo syscall [IA64] msi_ia64.c dmar_msi_type should be static [IA64] remove obsolete hw_interrupt_type [IA64] remove obsolete irq_desc_t typedef [IA64] remove obsolete no_irq_type [IA64] unexport fpswa.h
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git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6Linus Torvalds authored
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: mfd: early init for MFD running regulators mfd: fix tmio related warnings mfd: asic3: enable SD/SDIO cell mfd: asic3: enable DS1WM cell mfd: asic3: remove SD/SDIO controller register definitions mfd: asic3: use resource_size macro instead of local variable mfd: add ASIC3 IRQ numbers mfd: asic3: add clock handling for MFD cells mfd: asic3: add asic3_set_register common operation mfd: Fix Kconfig help text for WM8350 mfd: add PCAP driver mfd: add U300 AB3100 core support drivers/mfd: remove obsolete irq_desc_t typedef mfd/pcf50633-gpio.c: add MODULE_LICENSE mfd: Mark WM8350 mask revision as readable to match silicon mfd: Mark clocks_init as non-init in twl4030-core.c mfd: Correct readability of WM8350 register 227
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git://linux-arm.org/linux-2.6Linus Torvalds authored
* 'kmemleak' of git://linux-arm.org/linux-2.6: kmemleak: Fix some typos in comments kmemleak: Rename kmemleak_panic to kmemleak_stop kmemleak: Only use GFP_KERNEL|GFP_ATOMIC for the internal allocations
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Samuel Ortiz authored
For MFDs running regulator cores, we really want them to be brought up early during boot. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Mike Rapoport <mike@compulab.co.il>
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Samuel Ortiz authored
We can not have .driver_data as const since platform_set_drvdata() doesnt take a const. The hclk mmc_data field can be const though. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
This enables the ASIC3's SD/SDIO MFD cell, supported by the tmio_mmc driver. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
This enables the ASIC3's DS1WM MFD cell, supported by the ds1wm driver. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
Only the base addresses remain, as they are needed to set up the IOMEM resources. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
This should make the code a little bit easier to read. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
IRQ number definitions for PWM, LED, SPI and OWM (ds1wm). Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
Since ASIC3 has to work on both PXA and S3C and since their struct clk implementations differ, we can't register out clocks with the clkdev mechanism (yet?). For now we have to keep clock handling internal to this driver and enable/disable the clocks via the mfd_cell->enable/disable functions. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Philipp Zabel authored
Used to configure single bits of the SDHWCTRL_SDCONF and EXTCF_RESET/SELECT registers needed for DS1WM, MMC/SDIO and PCMCIA functionality. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mark Brown authored
More with the grammar. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Daniel Ribeiro authored
The PCAP Asic as present on EZX phones is a multi function device with voltage regulators, ADC, touch screen controller, RTC, USB transceiver, leds controller, and audio codec. It has two SPI ports, typically one is connected to the application processor and another to the baseband, this driver provides read/write functions to its registers, irq demultiplexer and ADC queueing/abstraction. This chip is used on a lot of Motorola phones, it was manufactured by TI as a custom product with the name PTWL93017, later this design evolved into the ATLAS PMIC from Freescale (MC13783). Signed-off-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Linus Walleij authored
This adds a core driver for the AB3100 mixed-signal circuit found in the ST-Ericsson U300 series platforms. This driver is a singleton proxy for all accesses to the AB3100 sub-drivers which will be merged on top of this one, RTC, regulators, battery and system power control, vibrator, LEDs, and an ALSA codec. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Reviewed-by: Mike Rapoport <mike@compulab.co.il> Reviewed-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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