- 04 Sep, 2020 10 commits
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Denis Efremov authored
Use kfree_sensitive() instead of open-coding it. Signed-off-by:
Denis Efremov <efremov@linux.com> Acked-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Tested-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Denis Efremov authored
Use kfree_sensitive() instead of open-coding it. Signed-off-by:
Corentin Labbe <clabbe@baylibre.com> Acked-by:
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Denis Efremov authored
Use kfree_sensitive() instead of open-coding it. Signed-off-by:
Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by:
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Krzysztof Kozlowski authored
Common pattern of handling deferred probe can be simplified with dev_err_probe(). Less code and also it prints the error value. Signed-off-by:
Hadar Gat <hadar.gat@arm.com> Signed-off-by:
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Herbert Xu authored
This patch fixes a sparse endianness warning by changing crc32 to __le32 instead of u32: CHECK ../arch/powerpc/crypto/crc-vpmsum_test.c ../arch/powerpc/crypto/crc-vpmsum_test.c:102:39: warning: cast from restricted __le32 Signed-off-by: -
Herbert Xu authored
This patch changes a couple u128's to be128 which is the correct type to use and fixes a few sparse warnings. Signed-off-by:
Ard Biesheuvel <ardb@kernel.org> Signed-off-by:
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Herbert Xu authored
This patch adds declarations for variables only used by assembly code to silence compiler warnings: CC [M] arch/arm64/crypto/sha1-ce-glue.o AS [M] arch/arm64/crypto/sha1-ce-core.o CC [M] arch/arm64/crypto/sha2-ce-glue.o AS [M] arch/arm64/crypto/sha2-ce-core.o CHECK ../arch/arm64/crypto/sha1-ce-glue.c CHECK ../arch/arm64/crypto/sha2-ce-glue.c ../arch/arm64/crypto/sha1-ce-glue.c:38:11: warning: symbol 'sha1_ce_offsetof_count' was not declared. Should it be static? ../arch/arm64/crypto/sha1-ce-glue.c:39:11: warning: symbol 'sha1_ce_offsetof_finalize' was not declared. Should it be static? ../arch/arm64/crypto/sha2-ce-glue.c:38:11: warning: symbol 'sha256_ce_offsetof_count' was not declared. Should it be static? ../arch/arm64/crypto/sha2-ce-glue.c:40:11: warning: symbol 'sha256_ce_offsetof_finalize' was not declared. Should it be static? Signed-off-by:
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Herbert Xu authored
This patch adds a prototype for poly1305_blocks_neon to slience a compiler warning: CC [M] arch/arm/crypto/poly1305-glue.o ../arch/arm/crypto/poly1305-glue.c:25:13: warning: no previous prototype for `poly1305_blocks_neon' [-Wmissing-prototypes] void __weak poly1305_blocks_neon(void *state, const u8 *src, u32 len, u32 hibit) ^~~~~~~~~~~~~~~~~~~~ Signed-off-by:Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by:
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- 28 Aug, 2020 9 commits
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Herbert Xu authored
This patch fixes most of the sparse endianness warnings in stm32. The patch itself doesn't change anything apart from markings, but there is some questionable code in stm32_cryp_check_ctr_counter. That function operates on the counters as if they're in CPU order, however, they're then written out as big-endian. This looks like a genuine bug. Therefore I've left that warning alone until someone can confirm that this really does work as intended on little-endian. Signed-off-by: -
dinghao.liu@zju.edu.cn authored
pm_runtime_get_sync() increments the runtime PM usage counter even when it returns an error code. However, users of cc_pm_get(), a direct wrapper of pm_runtime_get_sync(), assume that PM usage counter will not change on error. Thus a pairing decrement is needed on the error handling path to keep the counter balanced. Fixes: 8c7849a3 ("crypto: ccree - simplify Runtime PM handling") Signed-off-by:
Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by:
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Herbert Xu authored
This patch squashes all the sparse warnings in mediatek, some of which appear to be genuine bugs. In particular, previously on BE the keys and IVs all get 32-bit swabbed which can't be right because they don't get swabbed on LE. I presume LE is the one that actually works. Another funky thing is that the GHASH key gets swabbed on LE. This makes no sense but I'm presuming someone actually tested this on LE so I'm preserving the swabbing. Someone needs to test this though as it is entirely possible that GCM is the only thing that worked on BE but not LE. Signed-off-by: -
Herbert Xu authored
As we're already using Kconfig to disable 64-bit builds for this driver, there is no point in doing it again in the source code. Signed-off-by: -
George Acosta authored
Provide an error message for users when pci_request_mem_regions failed. Signed-off-by:
George Acosta <acostag.ubuntu@gmail.com> Signed-off-by:
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YueHaibing authored
drivers/crypto/sa2ul.c: In function ‘sa_sha_init’: drivers/crypto/sa2ul.c:1486:33: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] crypto_ahash_digestsize(tfm), (u64)rctx); ^ ./include/linux/dev_printk.h:123:47: note: in definition of macro ‘dev_dbg’ dev_printk(KERN_DEBUG, dev, dev_fmt(fmt), ##__VA_ARGS__); \ ^~~~~~~~~~~ Use %p to print rctx pointer. Signed-off-by:YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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Herbert Xu authored
This patch removes AHASH_REQUEST_ON_STACK which is unused. Signed-off-by:
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Herbert Xu authored
This patch adds the helper ahash_alg_instance which is used to convert a crypto_ahash object into its corresponding ahash_instance. Signed-off-by: -
Herbert Xu authored
This patch adds the type-safe init_tfm/exit_tfm functions to the ahash interface. This is meant to replace the unsafe cra_init and cra_exit interface. Signed-off-by:
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- 25 Aug, 2020 2 commits
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Fabio Estevam authored
Building ARM allmodconfig leads to the following warnings: arch/arm/crypto/curve25519-glue.c:73:12: error: implicit declaration of function 'sg_copy_to_buffer' [-Werror=implicit-function-declaration] arch/arm/crypto/curve25519-glue.c:74:9: error: implicit declaration of function 'sg_nents_for_len' [-Werror=implicit-function-declaration] arch/arm/crypto/curve25519-glue.c:88:11: error: implicit declaration of function 'sg_copy_from_buffer' [-Werror=implicit-function-declaration] Include <linux/scatterlist.h> to fix such warnings Reported-by:
Olof's autobuilder <build@lixom.net> Fixes: 0c3dc787 ("crypto: algapi - Remove skbuff.h inclusion") Signed-off-by:
Fabio Estevam <festevam@gmail.com> Acked-by:
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Herbert Xu authored
The stm32 driver was missing a number of includes that we being pulled in by unrelated header files. As the indirect inclusion went away, it now fails to build. This patch adds the missing inclusions. Reported-by:
kernel test robot <lkp@intel.com> Fixes: 0c3dc787 ("crypto: algapi - Remove skbuff.h inclusion") Signed-off-by:
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- 21 Aug, 2020 19 commits
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Yang Shen authored
When the devices are removed or not existing, the corresponding algorithms which are registered by 'hisi-zip' driver can't be used. Move 'hisi_zip_register_to_crypto' from 'hisi_zip_init' to 'hisi_zip_probe'. The algorithms will be registered to crypto only when there is device bind on the driver. And when the devices are removed, the algorithms will be unregistered. In the previous process, the function 'xxx_register_to_crypto' need a lock and a static variable to judge if the registration is the first time. Move this action into the function 'hisi_qm_alg_register'. Each device will call 'hisi_qm_alg_register' to add itself to qm list in probe process and registering algs when the qm list is empty. Signed-off-by:
Yang Shen <shenyang39@huawei.com> Reviewed-by:
Zhou Wang <wangzhou1@hisilicon.com> Signed-off-by:
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Weili Qian authored
Call trace will appear in the Hisilicon crypto driver unbinding or disabling SRIOV during task running with TFMs on the corresponding function. The log looks like this: [ 293.908078] Call trace: [ 293.908080] __queue_work+0x494/0x548 [ 293.908081] queue_work_on+0x84/0xd8 [ 293.908092] qm_irq+0x4c/0xd0 [hisi_qm] [ 293.908096] __handle_irq_event_percpu+0x74/0x2a0 [ 293.908098] handle_irq_event_percpu+0x40/0x98 [ 293.908099] handle_irq_event+0x4c/0x80 [ 293.908101] handle_fasteoi_irq+0xb0/0x170 [ 293.908102] generic_handle_irq+0x3c/0x58 [ 293.908103] __handle_domain_irq+0x68/0xc0 [ 293.908104] gic_handle_irq+0xb4/0x298 [ 293.908105] el1_irq+0xcc/0x180 [ 293.908107] arch_cpu_idle+0x38/0x228 [ 293.908110] default_idle_call+0x20/0x40 [ 293.908113] do_idle+0x1cc/0x2b8 [ 293.908114] cpu_startup_entry+0x2c/0x30 [ 293.908115] rest_init+0xdc/0xe8 [ 293.908117] arch_call_rest_init+0x14/0x1c [ 293.908117] start_kernel+0x490/0x4c4 This patch adds a waiting logic as user doing the above two operations to avoid panic. The two operations will hold on in the driver remove function until the tasks release all their relative TFMs. Signed-off-by:
Hui Tang <tanghui20@huawei.com> Signed-off-by:
Weili Qian <qianweili@huawei.com> Signed-off-by:
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Yang Shen authored
Since the drivers such as HPRE/SEC/ZIP do not implement 'pci_driver.shutdow', a RAS will be triggered at OS rebooting or shutting down as the hardware device is processing request. The log looks like this: NOTICE: [NimbusSecNodeType1]:[2372L]This is sec, Base = 0x141800000 NOTICE: [NimbusSecHandle]:[2319L] SecIntSt = 0x3 NOTICE: [NimbusSecHandle]:[2320L] SecQmIntStatus = 0x2 NOTICE: [PrintSecurityType]:[344L] SecurityType is RECOVERABLE! This patch offers a new API in qm to shutdown devices, and add shutdown callbacks in ACC driver based on this new API. So the running devices will be stopped when the OS reboot or shutdown. Signed-off-by:
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Shukun Tan authored
When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa("crypto: hisilicon - add FLR support") Signed-off-by:
Shukun Tan <tanshukun1@huawei.com> Signed-off-by:
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Yang Shen authored
Now, there are three reasons of stopping: 'NORMAL', 'SOFT_RESET' and 'FLR'. In order to keep this, explicitly pass the stop reason as an input parameter of 'hisi_qm_stop' function. Fixes: b67202e8("crypto: hisilicon/qm - add state machine for QM") Signed-off-by:
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Shukun Tan authored
Increasing depth of 'event queue' from 1024 to 2048, which equals to twice depth of 'completion queue'. It will fix the easily happened 'event queue overflow' as using 1024 queue depth for 'event queue'. Fixes: 263c9959("crypto: hisilicon - add queue management driver...") Signed-off-by:
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Hui Tang authored
The queue depth is 1024, so the condition for judging the queue full should be 1023, otherwise the hardware cannot judge whether the queue is empty or full. Fixes: 263c9959("crypto: hisilicon - add queue management driver...") Signed-off-by:
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Yang Shen authored
Requests will be sent continuously as resetting, which will cause 'printk' flooding. Using 'dev_info_ratelimited' can solve this problem well. Fixes: b67202e8("crypto: hisilicon/qm - add state machine for QM") Signed-off-by:
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Shukun Tan authored
The used reference count is used for counting the number of 'sqe' which is under processing. This reference count should be cleared as starting 'qp', otherwise the 'used' will be messy when allocating this 'qp' again. Fixes: 5308f660("crypto: hisilicon - QM memory management...") Signed-off-by:
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Sihang Chen authored
Save the string address before pass to strsep, release it at end. Because strsep will update the string address to point after the token. Fixes: c31dc9fe("crypto: hisilicon/qm - add DebugFS for xQC and...") Signed-off-by:
Sihang Chen <chensihang1@hisilicon.com> Signed-off-by:
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Ram Muthiah authored
Drivers shouldn't be enabled by default unless there is a very good reason to do so. There doesn't seem to be any such reason for the virtio crypto driver, so change it to the default of 'n'. Signed-off-by:
Ram Muthiah <rammuthiah@google.com> [EB: adjusted commit message] Signed-off-by:
Eric Biggers <ebiggers@google.com> Signed-off-by:
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Madhuparna Bhowmik authored
engine->stat_irq_thresh was initialized after device_create_file() in the probe function, the initialization may race with call to spacc_stat_irq_thresh_store() which updates engine->stat_irq_thresh, therefore initialize it before creating the file in probe function. Found by Linux Driver Verification project (linuxtesting.org). Fixes: ce921368 ("crypto: picoxcell - add support for the...") Signed-off-by:
Madhuparna Bhowmik <madhuparnabhowmik10@gmail.com> Acked-by:
Jamie Iles <jamie@jamieiles.com> Signed-off-by:
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Ira Weiny authored
Revert "crypto: hash - Add real ahash walk interface" This reverts commit 75ecb231. The callers of the functions in this commit were removed in ab8085c1 Remove these unused calls. Fixes: ab8085c1 ("crypto: x86 - remove SHA multibuffer routines and mcryptd") Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Ira Weiny <ira.weiny@intel.com> Signed-off-by:
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Ira Weiny authored
Once the crypto hash walk is started by crypto_hash_walk_first() returning non-zero, crypto_hash_walk_done() must be called to unmap any memory which was mapped by *_walk_first(). Ensure crypto_hash_walk_done() is called properly by: 1) Re-arranging the check for device data to be prior to calling *_walk_first() 2) on error call crypto_hash_walk_done() with an error code to allow the hash walk code to clean up. While we are at it clean up the 'out' label to be more meaningful. Signed-off-by:
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Tom Rix authored
clang static analysis reports this problem intel-rng.c:333:2: warning: Assigned value is garbage or undefined void __iomem *mem = mem; ^~~~~~~~~~~~~~~~~ ~~~ Because mem is assigned before it is used, this is not a real problem. But the initialization is strange and not needed, so remove it. Signed-off-by:Tom Rix <trix@redhat.com> Signed-off-by:
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Horia Geantă authored
Currently the debugfs fops are defined in caam/intern.h. This causes problems because it creates identical static functions and variables in multiple files. It also creates warnings when those files don't use the fops. This patch moves them into a standalone file, debugfs.c. It also removes unnecessary uses of ifdefs on CONFIG_DEBUG_FS. Signed-off-by:
Horia Geantă <horia.geanta@nxp.com> Signed-off-by:
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Jorge Ramirez-Ortiz authored
The current code waits for data to be available before attempting a second read. However the second read would not be executed as the while loop will exit. This fix does not wait if all data has been read (skips the call to msleep(0)) and reads a second time if partial data was retrieved on the first read. Worth noticing that since msleep(0) schedules a one jiffy timeout is better to skip such a call. Signed-off-by:
Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by:
Sumit Garg <sumit.garg@linaro.org> Signed-off-by:
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Jorge Ramirez-Ortiz authored
Data rates of MAX_UINT32 will schedule an unnecessary one jiffy timeout on the call to msleep. Avoid this scenario by using 0 as the unlimited data rate. Signed-off-by:
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Uros Bizjak authored
Current minimum required version of binutils is 2.23, which supports CRC32 instruction mnemonic. Replace the byte-wise specification of CRC32 with this proper mnemonic. The compiler is now able to pass memory operand to the instruction, so there is no need for a temporary register anymore. Some examples of the improvement: 12a: 48 8b 08 mov (%rax),%rcx 12d: f2 48 0f 38 f1 f1 crc32q %rcx,%rsi 133: 48 83 c0 08 add $0x8,%rax 137: 48 39 d0 cmp %rdx,%rax 13a: 75 ee jne 12a <crc32c_intel_update+0x1a> to: 125: f2 48 0f 38 f1 06 crc32q (%rsi),%rax 12b: 48 83 c6 08 add $0x8,%rsi 12f: 48 39 d6 cmp %rdx,%rsi 132: 75 f1 jne 125 <crc32c_intel_update+0x15> and: 146: 0f b6 08 movzbl (%rax),%ecx 149: f2 0f 38 f0 f1 crc32b %cl,%esi 14e: 48 83 c0 01 add $0x1,%rax 152: 48 39 d0 cmp %rdx,%rax 155: 75 ef jne 146 <crc32c_intel_update+0x36> to: 13b: f2 0f 38 f0 02 crc32b (%rdx),%eax 140: 48 83 c2 01 add $0x1,%rdx 144: 48 39 ca cmp %rcx,%rdx 147: 75 f2 jne 13b <crc32c_intel_update+0x2b> As the compiler has some more freedom w.r.t. register allocation, there is also a couple of reg-reg moves removed. There are no hidden states for CRC32 insn, so there is no need to mark assembly as volatile. v2: Introduce CRC32_INST define. Signed-off-by:
Uros Bizjak <ubizjak@gmail.com> CC: Herbert Xu <herbert@gondor.apana.org.au> CC: "David S. Miller" <davem@davemloft.net> CC: Thomas Gleixner <tglx@linutronix.de> CC: Ingo Molnar <mingo@redhat.com> CC: Borislav Petkov <bp@alien8.de> CC: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by:
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