- 14 May, 2012 11 commits
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Viresh Kumar authored
This patchset updates MAINTAINERS files, makes shiraz as second Maintainer for SPEAr SoCs. It also updates Documentation mostly for SPEAr13xx. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
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Viresh Kumar authored
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
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Viresh Kumar authored
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
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Viresh Kumar authored
This patch adds machines/boards dts{i} files for SPEAr1310 and SPEAr1340. Both are based on ARM, Cortex A9 processor family. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
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Viresh Kumar authored
This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two machines: SPEAr1310 and SPEAr1340. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Viresh Kumar authored
Same GPIO pins declarations would be required for other SoCs and that will be a lot of lines of code. Its better to create common macros for it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Viresh Kumar authored
This patch adds SPEAr1310 and SPEAr1340's clock framework support. It is based on earlier support for SPEAr3xx family. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@ti.com>
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Viresh Kumar authored
This patch adds source files for SPEAr13xx Machines. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Deepak Sikri <deepak.sikri@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
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Viresh Kumar authored
This patch adds basic header files for SPEAr13xx Machines. Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
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Arnd Bergmann authored
Conflicts: arch/arm/mach-spear3xx/clock.c arch/arm/mach-spear3xx/include/mach/generic.h arch/arm/mach-spear3xx/include/mach/misc_regs.h arch/arm/mach-spear3xx/spear320.c arch/arm/mach-spear6xx/clock.c arch/arm/mach-spear6xx/include/mach/misc_regs.h Resolve even more merge conflicts. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Conflicts: arch/arm/mach-spear3xx/Makefile arch/arm/mach-spear3xx/clock.c arch/arm/mach-spear3xx/include/mach/generic.h arch/arm/mach-spear6xx/clock.c arch/arm/plat-spear/Makefile drivers/pinctrl/core.c This resolves some annoying merge conflicts. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 12 May, 2012 10 commits
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Viresh Kumar authored
This patch updates following configuration: - Update MTD specific configurations - Enables JFFS2 FS support - Updates 6xx defconfig, with recent changes done by Arnd in 6xx Kconfig Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Stefan Roese <sr@denx.de>
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Viresh Kumar authored
This patch adds NOR partitions in all SPEAr boards dts files. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Viresh Kumar authored
SPEAr SoCs used its own clock framework since now. From now on they will move to use common clock framework. This patch updates existing SPEAr machine support to adapt for common clock framework. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
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Viresh Kumar authored
With common clock framework, it is must to call clk_{un}prepare() before/after clk_{dis}enable. This patch fixes this for SPEAr timer. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar authored
All SPEAr SoC's contain GPT Synthesizers. Their Fout is derived from following equations: Fout= Fin/((2 ^ (N+1)) * (M+1)) This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar authored
All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from following equations: Fout = Fin / (2 * div) (division factor) div is 17 bits:- 0-13 (fractional part) 14-16 (integer part) div is (16-14 bits).(13-0 bits) (in binary) Fout = Fin/(2 * div) Fout = ((Fin / 10000)/(2 * div)) * 10000 Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 div << 14 is simply 17 bit value written at register. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar authored
All SPEAr SoC's contain Auxiliary Synthesizers. Their Fout is derived based on values of eq, x and y. Fout from synthesizer can be given from two equations: Fout1 = (Fin * X/Y)/2 EQ1 Fout2 = Fin * X/Y EQ2 This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar authored
All SPEAr SoC's contain PLLs. Their Fout is derived based on following equations - In normal mode vco = (2 * M[15:8] * Fin)/N - In Dithered mode vco = (2 * M[15:0] * Fin)/(256 * N) pll_rate = vco/2^p vco and pll are very closely bound to each other, "vco needs to program: mode, m & n" and "pll needs to program p", both share common enable/disable logic and registers. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar authored
All SPEAr SoC's use ST's Timer module. This patch adds device tree probing capability for that. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
The spear/pinctrl branch has hard dependencies on both the pinctrl branch and the clkdev branch. We merge those here to fix it up without having to rebase a branch that has been pulled into other stable branches already. Conflicts: Documentation/driver-model/devres.txt Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 11 May, 2012 2 commits
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Arnd Bergmann authored
* depends/rmk/clkdev: CLKDEV: provide helpers for common clock framework ARM: 7392/1: CLKDEV: Optimize clk_find() ARM: 7376/1: clkdev: Implement managed clk_get()
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Arnd Bergmann authored
Mike Turquette <mturquette@ti.com> has asked me to take the clock changes through the arm-soc tree while there are still so many inderdependencies, so this is the entire branch. * depends/clk/clk-next: (30 commits) clk: add a fixed factor clock clk: mux: assign init data clk: remove COMMON_CLK_DISABLE_UNUSED clk: prevent spurious parent rate propagation MAINTAINERS: add entry for common clk framework clk: clk_set_rate() must fail if CLK_SET_RATE_GATE is set and clk is enabled clk: Use a separate struct for holding init data. clk: constify parent name arrays in macros clk: remove trailing whitespace from clk.h clk: select CLKDEV_LOOKUP for COMMON_CLK clk: Don't set clk->new_rate twice clk: clk-private: Add DEFINE_CLK macro clk: clk-gate: Create clk_gate_endisable() clk: Fix typo in comment clk: propagate round_rate for CLK_SET_RATE_PARENT case clk: pass parent_rate into .set_rate clk: always pass parent_rate into .round_rate clk: basic: improve parent_names & return errors clk: core: copy parent_names & return error codes clk: Constify parent name arrays ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 10 May, 2012 1 commit
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Guennadi Liakhovetski authored
This removes a repeated word and a repeated and incomplete line from two pinctrl headers. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 08 May, 2012 4 commits
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Sascha Hauer authored
Having fixed factors/dividers in hardware is a common pattern, so add a basic clock type doing this. It basically describes a fixed factor clock using a nominator and a denominator. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> [mturquette@linaro.org: constify parent_names in static init macro] [mturquette@linaro.org: copy/paste bug from mux in static init macro] [mturquette@linaro.org: fix error handling in clk_register_fixed_factor] [mturquette@linaro.org: improve division accuracy; thanks to Saravana] Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Mike Turquette authored
The original conversion to struct clk_hw_init failed to add the pointer assignment in clk_register_mux. Signed-off-by: Mike Turquette <mturquette@linaro.org> Reported-by: Sascha Hauer <s.hauer@pengutronix.de>
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Mike Turquette authored
Exposing this option generates confusion and incorrect behavior for single-image builds across platforms. Enable this behavior permanently. Signed-off-by: Mike Turquette <mturquette@linaro.org> Acked-by: Saravana Kannan <skannan@codeaurora.org>
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Mike Turquette authored
Patch 'clk: always pass parent_rate into .round_rate' made a subtle change to the semantics of .round_rate. It is now expected for the parent's rate to always be passed in, simplifying the implemenation of various .round_rate callback definitions. However the patch also introduced a bug in clk_calc_new_rates whereby a clock without the CLK_SET_RATE_PARENT flag set could still propagate a rate change up to a parent clock if the the .round_rate callback modified the &best_parent_rate value in any way. This patch fixes the issue at the framework level (in clk_calc_new_rates) by specifically handling the case where the CLK_SET_RATE_PARENT flag is not set. Signed-off-by: Mike Turquette <mturquette@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
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- 07 May, 2012 2 commits
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Stephen Warren authored
Additionally print which pin the request failed for, which entity already claimed it, and what entity was trying to claim it. Remove duplicate device name from a debug message. Clean up some indentation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mike Turquette authored
Signed-off-by: Mike Turquette <mturquette@linaro.org>
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- 02 May, 2012 4 commits
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Russell King authored
The common clock framework allocates clocks dynamically. Provide a set of helpers to streamline the clkdev registration of the clock lookups to avoid repetitive code sequences. Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Viresh Kumar authored
This is well documented but isn't implemented. clk_set_rate() must check if flags have CLK_SET_RATE_GATE bit set and is enabled too. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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Saravana Kannan authored
Create a struct clk_init_data to hold all data that needs to be passed from the platfrom specific driver to the common clock framework during clock registration. Add a pointer to this struct inside clk_hw. This has several advantages: * Completely hides struct clk from many clock platform drivers and static clock initialization code that don't care for static initialization of the struct clks. * For platforms that want to do complete static initialization, it removed the need to directly mess with the struct clk's fields while still allowing to statically allocate struct clk. This keeps the code more future proof even if they include clk-private.h. * Simplifies the generic clk_register() function and allows adding optional fields in the future without modifying the function signature. * Simplifies the static initialization of clocks on all platforms by removing the need for forward delcarations or convoluted macros. Signed-off-by: Saravana Kannan <skannan@codeaurora.org> [mturquette@linaro.org: kept DEFINE_CLK_* macros and __clk_init] Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Arnd Bergman <arnd.bergmann@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jamie Iles <jamie@jamieiles.com> Cc: Richard Zhao <richard.zhao@linaro.org> Cc: Saravana Kannan <skannan@codeaurora.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Deepak Saxena <dsaxena@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca>
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Rajendra Nayak authored
parent name array is now expected to be const char *, make the relevent changes in the clk macros which define default clock types. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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- 01 May, 2012 5 commits
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Shawn Guo authored
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28. The driver supports device tree probe only. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dong Aisheng authored
Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dong Aisheng authored
The driver has mux and config support while the gpio is still not supported. For select input setting, the driver will handle it internally and do not need user to take care of it. The pinctrl-imx core driver will parse the dts file and dynamically create the pinmux functions and groups. Each IMX SoC pinctrl driver should register pins with a pin register map including mux register and config register and select input map to core for proper operations. Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dong Aisheng authored
Currently most code to get child count in kernel are almost same, add a helper to implement this function for dt to use. Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Dong Aisheng authored
As pinctrl handles, it may be possible the pinctrl gpio ranges are still not got registered when user call pinctrl_gpio_request. Thus, add defer support for it too. Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 30 Apr, 2012 1 commit
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Viresh Kumar authored
keyboard data passed via DT is in wrong format. Fix it. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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