- 28 Jan, 2008 40 commits
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Adrian McMenamin authored
This patch adds support for the GD-Rom drive, SEGA's proprietary implementation of an IDE CD Rom for the SEGA Dreamcast. This driver implements Sega's Packet Interface (SPI) - at least partially. It will also read disks in SEGA's propreitary GD format. Unlike previous drivers (which were never in mainline) this uses DMA and not PIO to read disks. It is a new driver, not a refactoring of old drivers. Signed-off by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Acked-by:
Jens Axboe <jens.axboe@oracle.com> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Adrian McMenamin authored
Remove reference to board deleted in commit 758e06ded4c48024835ef0a14627afcde2e25929 Signed-off-by:
Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by:
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Paul Mundt authored
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Paul Mundt authored
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Paul Mundt authored
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Paul Mundt authored
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Magnus Damm authored
This patch tells the sm501 mfd driver to build platform data for the sm501 usb host driver. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
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Magnus Damm authored
This patch removes redundant irq handling code together with unused consistent alloc code. R2D uart setup code is changed to use sm501-regs.h and unused header files are removed. Signed-off-by:
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Magnus Damm authored
This patch adds timings to drive a Sharp LQ104V1DG21 lcd panel that can be hooked up to R2D-1 or R2D-PLUS. The sm501fb driver should leave the pins FPEN and VBIASEN alone, and this patch instructs the driver to do so by not setting flags flags for these pins. This patch works best together with the patch posted to the linux-fbdev-devel list "sm501fb: control panel pin usage with platform data flags", but this patch can be merged independently. Signed-off-by:
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Yoshihiro Shimoda authored
Signed-off-by:
Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by:
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Magnus Damm authored
This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by:
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Paul Mundt authored
Fixes up a build warning/error in arch/sh/mm/fault_32.c. Signed-off-by: -
Paul Mundt authored
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Andrew Murray authored
This patch provides a correct value for CONFIG_SH_PCLK_FREQ for the SH7712 solution engine when used with the board's default factory settings. This results in the board running at its maximum CPU clock rate (200 MHz). Signed-off-by:
Andrew Murray <amurray@mpc-data.co.uk> Signed-off-by:
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Andrew Murray authored
This patch provides specific clock support for the SH7712. Signed-off-by:
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Yoshihiro Shimoda authored
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Paul Mundt authored
Fixes the build error caused by -Werror on gcc 3.x compilers: arch/sh/kernel/signal_32.c: In function `sys_sigaction': arch/sh/kernel/signal_32.c:66: warning: initialization discards qualifiers from pointer target type arch/sh/kernel/signal_32.c:67: warning: initialization discards qualifiers from pointer target type arch/sh/kernel/signal_32.c:69: warning: initialization discards qualifiers from pointer target type arch/sh/kernel/signal_32.c:70: warning: initialization discards qualifiers from pointer target type The mismatch in question was introduced by commit-id 9c5a4eec79b3eb8876d2e7fddfa1e040a7650e55. Signed-off-by: -
Yoshihiro Shimoda authored
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Paul Mundt authored
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Paul Mundt authored
Currently the wdt forces HZ=1000 and sidesteps CONFIG_HZ completely. This is a remnant from when HZ was hardcoded and before CONFIG_HZ was introduced. Additionally, not all of the timers have this requirement these days, so it's also an artificial limitation. Just kill it off and use CONFIG_HZ directly. Reported-by:
H. Peter Anvin <hpa@zytor.com> Signed-off-by:
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Joe Perches authored
Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Joe Perches authored
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Paul Mundt authored
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Paul Mundt authored
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Paul Mundt authored
Fixes up the mmc build. Signed-off-by: -
Paul Mundt authored
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Paul Mundt authored
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Harvey Harrison authored
Change occurances of: bool default X to: def_bool X Change ocurances of: bool "Foo" default X to: def_bool X prompt "Foo" Signed-off-by:
Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by:
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Paul Mundt authored
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Paul Mundt authored
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Paul Mundt authored
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Paul Mundt authored
This adds in the L1I/L1D/L2 cache shape support to their respective entries in the ELF auxvt, based on the Alpha implementation. We use this on the userspace libc side for calculating a tightly packed SHMLBA amongst other things. Signed-off-by: -
Stuart Menefy authored
Signed-off-by:
Stuart Menefy <stuart.menefy@st.com> Signed-off-by:
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Thomas Betker authored
This patch changes the uImage target so that it generates a wrapped compressed vmlinux, rather than a wrapped zImage. The previous version matched the ARM, this version matches the PPC. However I would question how useful a self decompressing image is with a boot loader which does decompression, so I think this is more useful. I also feel it matches the descrition in the help text ("Compressed kernel image") better. Signed-off-by:Thomas Betker <thomas.betker@5etech.eu> Signed-off-by:
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Stuart Menefy authored
When a get_user(to, from++) is called the pointer increment is performed after its first usage, in the specific after the __add_ok invokation. This causes a wrong get_user return value, putting a wrong character in the destination variable. This patch solves the problem using a new temporary pointer. Additionally this reworks the use of the register banks, allowing for consolidation between the MMU and nommu implementations. Signed-off-by:
Carmelo Amoroso <carmelo.amoroso@st.com> Signed-off-by:
Giuseppe Condorelli <giuseppe.condorelli@st.com> Signed-off-by:
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Stuart Menefy authored
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Stuart Menefy authored
This saves us from having to use kmalloc() for the fixmap entries, which is needed early for the uncached fixmap. Signed-off-by:
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Stuart Menefy authored
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Stuart Menefy authored
Presently most of the 29-bit physical parts do P1/P2 segmentation with a 1:1 cached/uncached mapping, jumping between the two to control the caching behaviour. This provides the basic infrastructure to maintain this behaviour on 32-bit physical parts that don't map P1/P2 at all, using a shiny new linker section and corresponding fixmap entry. Signed-off-by:
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Paul Mundt authored
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