- 30 Aug, 2015 14 commits
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Joonyoung Shim authored
This patch allows clients who want to use render node to access rendering relevant ioctls - g2d, post processor and gem allocation. Signed-off-by:
Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Hyungwon Hwang authored
Each CRTC's atomic_{begin/flush} must stop/start the update of shadow registers to active register in the functions. This patch achieves these purpose by moving the setting of protection bits to those functions from decon_update_plane. v2: rebased to the branch exynos-drm-next Signed-off-by:Hyungwon Hwang <human.hwang@samsung.com> Reviewed-by:
Daniel Stone <daniels@collabora.com> Signed-off-by:
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Gustavo Padovan authored
These legacy helpers should only be used by shadow-attaching drivers. KMS drivers has its own way to handle suspend/resume and don't need to use these two helpers. Signed-off-by:
Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by:
Inki Dae <daeinki@gmail.com>
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Gustavo Padovan authored
From: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Now that atomic modesetting is implemented for exynos enable the DRIVER_ATOMIC flag on the driver's features. Signed-off-by:
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Gustavo Padovan authored
Exynos atomic commit procedures already does this job of waiting for pending updates to finish, that means using pending_flip_queue is pointless now because the disable CRTC procedure will never happen during a page_flip. Signed-off-by:
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Gustavo Padovan authored
Add infrastructure to wait for all planes updates to finish by using an atomic_t variable to track how many pending updates we are waiting plus a wait_queue for the wait part. It also changes vblank behaviour and keeps it enabled for all types of updates Signed-off-by:
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Gustavo Padovan authored
The atomic modesetting interfaces supports async commits that should be implemented by the drivers. If drm core requests an async commit exynos_atomic_commit() will now schedule a work task to run the update later. It also serializes commits that needs to run on the same crtc, putting the following commit to wait until the current one is finished. Signed-off-by:
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Gustavo Padovan authored
fimd_update_plane() programs BUF_START[win] and during the update BUF_START[win] is copied to BUF_START_S[win] (its shadow register) and starts scanning out, then it raises a irq. The fimd_irq_handler, in the case we have a pending_fb, will check the fb value was copied to START_S register and finish the update in case of success. Based on patch from Daniel Kurtz <djkurtz@chromium.org> Signed-off-by:
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Gustavo Padovan authored
This macro is need to get the value of the START shadow register, that will tell if an framebuffer is currently displayed on the screen or not. Signed-off-by:
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Gustavo Padovan authored
The current code was ignoring the end of update for all overlay planes, caring only for the primary plane update in case of pageflip. This change adds a change to start to check for pending updates for all planes through exynos_plane->pending_fb. At the start of plane update the pending_fb is set with the fb to be shown on the screen. Then only when to fb is already presented in the screen we set pending_fb to NULL to signal that the update was finished. Signed-off-by:
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Gustavo Padovan authored
Only set/clear the update bit in the CRTC's .atomic_begin()/flush() so all planes are really committed at the same time. Signed-off-by:
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Gustavo Padovan authored
From: Gustavo Padovan <gustavo.padovan@collabora.co.uk> .prepare_plane() and .cleanup_plane() allows to perform extra operations before and after the update of planes. For FIMD for example this will be used to enable disable the shadow protection bit. Signed-off-by:
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Gustavo Padovan authored
Unify handling of finished plane update to prepare for a following patch that will check for the START and START_S regs to really make sure that the plane was updated. Signed-off-by:
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Gustavo Padovan authored
struct drm_crtc already stores the enabled state of the crtc thus we don't need to replicate enabled in exynos_drm_crtc. Signed-off-by:
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- 28 Aug, 2015 26 commits
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Dave Airlie authored
align with mask code in overlay.c, Ben can clean the naming up later if necessary. Signed-off-by:Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
Reported-by: Ilia Mirkin on irc. Signed-off-by: -
git://anongit.freedesktop.org/git/nouveau/linux-2.6Dave Airlie authored
Rather large pull request this time around, due to the long-pending cleanup of the kernel driver being here. There's a stupidly large number of commits for that, as I wanted to have the series be bisectable at a fairly fine-grained level. That said, a very large portion of the churn in the rework was automated, and a very large number of boards from right across the whole range we support have been tested. I'm fairly confident there shouldn't be (too many) issues from this. Beyond correcting some not-so-great design decisions and making the code a lot easier to work with, there's not much exciting (lower memory usage, GPU VM should be a lot faster, etc) to be gained by the end-user as a result of the cleanup, it mostly lays the groundwork for future improvements. A big thanks goes to Alexandre Courbot for testing/debugging the GK20A codepaths for me :) Highlights: - A heap of perfmon work, providing a more useful userspace interface and specifying counters for a bunch of boards - Support for GT200 reclocking + other misc pm improvements - Initial patches towards supporting GM20B (Tegra X1) - Maxwell DisplayPort fixes - Cleanup of the kernel driver - The usual collection of random fixes * 'linux-4.3' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (312 commits) drm/nouveau: bump driver version for release drm/nouveau/tegra: merge platform setup from nouveau drm drm/nouveau/pci: merge agp handling from nouveau drm drm/nouveau/device: remove pci/platform_device from common struct drm/nouveau/device: import pciid list and integrate quirks with it drm/nouveau/device: cleaner abstraction for device resource functions drm/nouveau/mc: move device irq handling to platform-specific code drm/nouveau/mc/gf100-: handle second interrupt tree drm/nouveau/mc: abstract interface to master intr registers drm/nouveau/pci: new subdev drm/nouveau/object: merge with handle drm/nouveau/core: remove the remainder of the previous style drm/nouveau/mpeg: convert to new-style nvkm_engine drm/nouveau/sw: convert to new-style nvkm_engine drm/nouveau/pm: convert to new-style nvkm_engine drm/nouveau/gr: convert to new-style nvkm_engine drm/nouveau/fifo: convert to new-style nvkm_engine drm/nouveau/disp: convert to new-style nvkm_engine drm/nouveau/dma: convert to new-style nvkm_engine drm/nouveau/cipher: convert to new-style nvkm_engine ...
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Ben Skeggs authored
Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
The copyright header in nvkm/engine/device/platform.c has been replaced with the NVIDIA one from drm/nouveau_platform.c, as most of the actual code is now theirs. Signed-off-by: -
Ben Skeggs authored
This commit reinstates the pre-DEVINIT AGP fiddling that was broken in an earlier commit. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
PCI IDs taken from the NVIDIA binary driver, with permission. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
Doesn't fix any known issue, but best be safe in case control is handed to us from firmware with these left enabled. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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