Commits · 767e2451e5f2fd756a28080b572d7aae21df5e2d · Kirill Smelkov / linux

30 Oct, 2020 8 commits

drm/amd/pm: update the smu v11.5 firmware header for vangogh · 767e2451

Xiaojian Du authored Oct 13, 2020

This patch is to update the smu v11.5 firmware header for vangogh.
Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

767e2451

drm/amd/pm: update the smu v11.5 smc header for vangogh · 1dd13b45

Xiaojian Du authored Oct 13, 2020

This patch is to update the smu v11.5 smc header for vangogh.
Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1dd13b45

drm/amdgpu: fix the issue of reserving bad pages failed · 676deb38

Dennis Li authored Oct 22, 2020

In amdgpu_ras_reset_gpu, because bad pages may not be freed,
it has high probability to reserve bad pages failed.

Change to reserve bad pages when freeing VRAM.

v2:
1. avoid allocating the drm_mm node outside of amdgpu_vram_mgr.c
2. move bad page reserving into amdgpu_ras_add_bad_pages, if vram mgr
   reserve bad page failed, it will put it into pending list, otherwise
   put it into processed list;
3. remove amdgpu_ras_release_bad_pages, because retired page's info has
   been moved into amdgpu_vram_mgr

v3:
1. formate code style;
2. rename amdgpu_vram_reserve_scope as amdgpu_vram_reservation;
3. rename scope_pending as reservations_pending;
4. rename scope_processed as reserved_pages;
5. change to iterate over all the pending ones and try to insert them
   with drm_mm_reserve_node();

v4:
1. rename amdgpu_vram_mgr_reserve_scope as
amdgpu_vram_mgr_reserve_range;
2. remove unused include "amdgpu_ras.h";
3. rename amdgpu_vram_mgr_check_and_reserve as
amdgpu_vram_mgr_do_reserve;
4. refine amdgpu_vram_mgr_reserve_range to call
amdgpu_vram_mgr_do_reserve.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

676deb38

drm/amdgpu: remove redundant GPU reset · 5eeb4593

Dennis Li authored Oct 19, 2020

Because bad pages saving has been moved to UMC error interrupt callback,
which will trigger a new GPU reset after saving.
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

5eeb4593

drm/amdgpu: change to save bad pages in UMC error interrupt callback · 22503d80

Dennis Li authored Oct 19, 2020

Instead of saving bad pages in amdgpu_ras_reset_gpu, it will reduce
the unnecessary calling of amdgpu_ras_save_bad_pages.
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

22503d80

drm/amdgpu: rename nv_is_headless_sku() · 9c94b5ef

Flora Cui authored Oct 28, 2020

for headless NAVI ASICs
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

9c94b5ef

drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKU · dd657888

Flora Cui authored Oct 27, 2020

Navi14 0x7340/C9 SKU has no display and video support, remove them.
Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

dd657888

drm/amdgpu/display: fix indentation in defer_delay_converter_wa() · 29226f04

Alex Deucher authored Oct 26, 2020

Fixes this warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c: In function ‘defer_delay_converter_wa’:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:285:2: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
  285 |  if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
      |  ^~
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:291:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
  291 |   if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 &&
      |   ^~
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

29226f04

27 Oct, 2020 32 commits

drm/amdgpu/display: re-add surface size calculation in dcn30_hwseq.c · a87a9a73

Alex Deucher authored Oct 26, 2020

This is required for MALL. Was accidently removed in PSR update.

Fixes: 48e48e59 ("drm/amd/display: Disable idle optimization when PSR is enabled")
Fixes: 52f2e83e ("drm/amdgpu/display: add MALL support (v2)")
Acked-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a87a9a73

drm/radeon: Expose vddc through hwmon · fddc611c

Sandeep Raghuraman authored Oct 09, 2020

Create hwmon attribute for vddc, that uses previously declared get_current_vddc() callback if there's an implementation available.

Also hides vddc, if there is no implementation for the current chipset (as per Alexander Deucher's suggestion).
Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

fddc611c

drm/radeon: Add implementation of get_current_vddc for Sumo · c57a8308

Sandeep Raghuraman authored Oct 09, 2020

Add implementation of get_current_vddc() callback for Sumo.
Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c57a8308

drm/radeon: Add new callback that exposes vddc · ca22f3be

Sandeep Raghuraman authored Oct 09, 2020

This patch adds a callback for reporting vddc, to the dpm field of the radeon_asic structure.
Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ca22f3be

drm/amdgpu/pm: fix the fan speed in fan1_input in manual mode for navi1x · 4f00d6d5

Alex Deucher authored Oct 26, 2020

It has been confirmed that the SMU metrics table should always reflect
the current fan speed even in manual mode.

Fixes: f6eb4339 ("drm/amdgpu/swsmu: handle manual fan readback on SMU11")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4f00d6d5

drm/amdgpu/swsmu: drop smu i2c bus on navi1x · 19cc89dc

Alex Deucher authored Oct 26, 2020

Stop registering the SMU i2c bus on navi1x. This leads to instability
issues when userspace processes mess with the bus and also seems to
cause display stability issues in some cases.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1314
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1341Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

19cc89dc

drm/amdgpu: drop mem_global_referenced · 923e15d6

Christian König authored Oct 19, 2020

Not used any more.
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

923e15d6

drm/amdgpu: add vangogh apu flag · c345c89b

Huang Rui authored Oct 26, 2020

This patch is to add vangogh apu flag to support more kickers that
belongs vangogh series.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c345c89b

drm/amdgpu: enable MULTI_MON_PP_MCLK_SWITCH DC feature at default · 191a3c04

Evan Quan authored Sep 30, 2020

With this, for multiple monitors in sync(e.g. with the same model),
mclk switching will be allowed. That helps saving some idle power on
some ASICs(e.g. Polaris).
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

191a3c04

drm/amd/display: correct asic type check V2 · a2475e62

Evan Quan authored Sep 30, 2020

Check chip family also to avoid wrong identification.

V2: use the correct macro without AMDGPU prefix
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a2475e62

drm/amd/pm: drop redundant display setting · b1878847

Evan Quan authored Sep 29, 2020

As this is already performed in smu7_set_power_state_tasks().
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b1878847

drm/amd/pm: reconfigure smc on display vbitimeout setting change · 62ff83a4

Evan Quan authored Sep 29, 2020

Reconfigure smc display settings on vbitimeout change.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

62ff83a4

drm/amd/pm: correct the mclk switching setting · d49873c9

Evan Quan authored Jun 18, 2020

Correct the mclk switching setting for multiple displays.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

d49873c9

drm/amd/pm: enable Polaris watermark table setting · b03fd3e7

Evan Quan authored Sep 28, 2020

Enable watermark table setting for Polaris.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b03fd3e7

drm/amd/pm: fulfill the Polaris implementation for get_clock_by_type_with_latency() · 690cdc26

Evan Quan authored Sep 28, 2020

Fulfill Polaris get_clock_by_type_with_latency().
Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

690cdc26

drm/amd/pm: correct vddc_dep_on_dal_pwrl setup · db6f5c7f