- 15 Dec, 2022 13 commits
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Roman Li authored
[Why] Fixing smatch error: dm_resume() error: we previously assumed 'aconnector->dc_link' could be null [How] Check if dc_link null at the beginning of the loop, so further checks can be dropped. Reported-by:
kernel test robot <lkp@intel.com> Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by:
Wayne Lin <Wayne.Lin@amd.com> Acked-by:
Jasdeep Dhillon <jdhillon@amd.com> Signed-off-by:
Roman Li <roman.li@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Ian Chen authored
[WHY] It causes regression AMD source will not write DPCD 340. Reviewed-by:
Ian Chen <ian.chen@amd.com> Signed-off-by:
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Alvin Lee authored
[Description] - FW scheduling algorithm doesn't take into account of it's a center timing - This affects where the subvp mclk switch can be scheduled (prevents HUBP vline interrupt from coming in if scheduled incorrectly) - Block subvp center timing cases for now Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by:
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Dillon Varone authored
[Description] Modify soc BB to reduce expected sdp bandwidth and align with measurements to fix underflow issues. Reviewed-by:
Dillon Varone <Dillon.Varone@amd.com> Signed-off-by:
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Dillon Varone authored
[Description] Add debug bit to disable unbounded requesting. Reviewed-by:
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Ilya Bakoulin authored
[Why] Iterating over every voltage state when we need to validate thousands of configurations all at once (i.e. display hotplug) can take a significant amount of time. [How] Check just the highest voltage state when fast_validate is true to verify whether the configuration can work at all, then do a proper validation including all voltage states later when fast_validate is false. Reviewed-by:
Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by:
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Alan Liu authored
[Why] Fix problems when we disable secure_display. [How] - Reset secure display context after disabled - A secure_display_context is dedicate to a crtc, so we set the crtc for it when we create the context. Reviewed-by:
Alan Liu <HaoPing.Liu@amd.com> Signed-off-by:
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Charlene Liu authored
This reverts commit c800d9ff. [why] revert for now because this change exposed other issue. Signed-off-by:
Charlene Liu <Charlene.Liu@amd.com> Signed-off-by:
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Alan Liu authored
[Why] Current secure display only work with single display, now make it work with multiple displays. [How] Create secure_display_context for each crtc instance to store its own Region of Interest (ROI) information. v2: squash in warning fix (Alex) Reviewed-by:
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Evan Quan authored
Update the reported maximum shader clock to the value which can be guarded to be achieved on all cards. This is to align with Window setting. Signed-off-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
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Evan Quan authored
Correct the pstate standard/peak profiling mode clock settings for SMU13.0.0. Signed-off-by:
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Evan Quan authored
To better support UMD pstate profilings, the GPO feature needs to be switched on/off accordingly. Signed-off-by:
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Evan Quan authored
To better support UMD pstate profilings, the GPO feature needs to be switched on/off accordingly. Signed-off-by:
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- 14 Dec, 2022 14 commits
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Christian König authored
This reverts commit f9d00a4a. This causes problem for KFD because when we overcommit we accidentially bind the BO to GTT for moving it into VRAM. We also need to make sure that this is done only as fallback after trying to evict first. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Luben Tuikov authored
Remove the "domain" argument to amdgpu_bo_create_kernel_at() since this function takes an "offset" argument which is the offset off of VRAM, and as such allocation always takes place in VRAM. Thus, the "domain" argument is unnecessary. Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: AMD Graphics <amd-gfx@lists.freedesktop.org> Signed-off-by:
Luben Tuikov <luben.tuikov@amd.com> Reviewed-by:
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Luben Tuikov authored
Fix amdgpu_bo_validate_size() to check whether the TTM domain manager for the requested memory exists, else we get a kernel oops when dereferencing "man". v2: Make the patch standalone, i.e. not dependent on local patches. v3: Preserve old behaviour and just check that the manager pointer is not NULL. v4: Complain if GTT domain requested and it is uninitialized--most likely a bug. Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Cc: AMD Graphics <amd-gfx@lists.freedesktop.org> Signed-off-by: -
Luben Tuikov authored
Always check if fru_addr is not NULL. This commit also fixes a "smatch" warning. v2: Add a Fixes tag. Cc: Alex Deucher <Alexander.Deucher@amd.com> Cc: Dan Carpenter <error27@gmail.com> Cc: kernel test robot <lkp@intel.com> Cc: AMD Graphics <amd-gfx@lists.freedesktop.org> Fixes: afbe5d1e ("drm/amdgpu: Bug-fix: Reading I2C FRU data on newer ASICs") Signed-off-by:
Kent Russell <kent.russell@amd.com> Signed-off-by:
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Christian König authored
Instead of reserving a VMID for a single process allow that many processes use the reserved ID. This allows for proper isolation between the processes. Signed-off-by:
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Christian König authored
This is completely pointless since the VMID always stays allocated until the VM is idle. Signed-off-by:
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Christian König authored
This should probably not access job->vm and also emit the SPM switch under the conditional execute. Signed-off-by:
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Christian König authored
Bas pointed out that this isn't working as expected and could cause crashes. Fix the handling by storing the marker that a switch is needed inside the job instead. Reported-by:
Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by:
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Evan Quan authored
Without this, the pp_dpm_vclk and pp_dpm_dclk outputs are not with correct data. Signed-off-by:
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Evan Quan authored
Without this, the pp_dpm_vclk and pp_dpm_dclk outputs are not with correct data. Signed-off-by:
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Felix Kuehling authored
Add a per-process MMU notifier lock for processing notifiers from userptrs. Use that lock to properly synchronize page table updates with MMU notifiers. Signed-off-by:
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Yifan Zhang authored
Add display SG support for DCN 3.1.4. Signed-off-by:
Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by:
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Christian König authored
When buffers are freed during suspend there is no guarantee that they can be re-allocated during resume. The PSP subsystem seems to be quite buggy regarding this, so add a WARN_ON() to point out those bugs. Signed-off-by:
Alex Deucher <alexdeucher@amd.com> Tested-by:
Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by:
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Christian König authored
We not only need to make sure that we have a BO, but also that the BO has some backing store. Fixes: d1a372af ("drm/amdgpu: Set MTYPE in PTE based on BO flags") Signed-off-by:
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- 13 Dec, 2022 1 commit
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Shikang Fan authored
- evict_resource is taking too long causing sriov full access mode timeout. So, add an extra evict_resource in the beginning as an early evict. Signed-off-by:
Shikang Fan <shikang.fan@amd.com> Reviewed-by:
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- 09 Dec, 2022 7 commits
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Alex Deucher authored
Some special polaris 10 chips overlap with the polaris11 DID range. Handle this properly in the driver. v2: use local flags for other function calls. Acked-by:
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Alex Deucher authored
Only apply the static threshold for Stoney and Carrizo. This hardware has certain requirements that don't allow mixing of GTT and VRAM. Newer asics do not have these requirements so we should be able to be more flexible with where buffers end up. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2270 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2291 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2255Acked-by:
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Colin Ian King authored
There is a spelling mistake in the struct field dram_clk_chanage. Fix it. Signed-off-by:
Colin Ian King <colin.i.king@gmail.com> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.2-2022-12-07: amdgpu: - DSC fixes for DCN 2.1 - HDMI PCON fixes - PSR fixes - DC DML fixes - Properly throttle on BO allocation - GFX 11.0.4 fixes - MMHUB fix - Make some functions static Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221207232439.5908-1-alexander.deucher@amd.com
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https://gitlab.freedesktop.org/agd5f/linuxDave Airlie authored
amd-drm-next-6.2-2022-12-02: amdgpu: - Fix CPU stalls when allocating large amounts of system memory - SR-IOV fixes - BACO fixes - Enable GC 11.0.4 - Enable PSP 13.0.11 - Enable SMU 13.0.11 - Enable NBIO 7.7.1 - Fix reported VCN capabilities for RDNA2 - Misc cleanups - PCI ref count fixes - DCN DPIA fixes - DCN 3.2.x fixes - Documentation updates - GC 11.x fixes - VCN RAS fixes - APU fix for passthrough - PSR fixes - GFX preemption support for gfx9 - SDMA fix for S0ix amdkfd: - Enable KFD support for GC 11.0.4 - Misc cleanups - Fix memory leak Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2022-12-08' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Some deferred-io and damage worker reworks revert and make a fb function static Signed-off-by:
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Dave Airlie authored
Merge tag 'drm-intel-next-fixes-2022-12-01' of git://anongit.freedesktop.org/drm/drm-intel into drm-next - Multi-cast register fix (Matt) - Fix workarounds on gen2-3 (Tvrtko) - Bigjoiner fix (Ville) - Make Guc default_list a const data (Jani) - Acquire forcewake before uncore read (Umesh) - Selftest fix (Umesh) - HuC related fixes (Daniele) - Fix some incorrect return values (Janusz) - Fix a memory leak in bios related code (Xia) - Fix VBT send packet port selection (Mikko) - DG2's DMC fix bump for Register noclaims and few restore (Gustavo) Signed-off-by:
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- 06 Dec, 2022 5 commits
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Yang Wang authored
fix MMHUB register base coding error. Fixes: ec683759 ("drm/amdgpu/gmc10: program the smallK fragment size") Signed-off-by:
Yang Wang <KevinYang.Wang@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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Tim Huang authored
Add tmz support for GC 11.0.4. Signed-off-by:
Tim Huang <tim.huang@amd.com> Reviewed-by:
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Tim Huang authored
Enable GFX IP v11.0.4 CG gate/ungate control. Signed-off-by:
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Tim Huang authored
Enable GFX Power Gating control for GC IP v11.0.4. Signed-off-by:
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Tim Huang authored
Add CG support for GFX/MC/HDP/ATHUB/IH/BIF. Signed-off-by:
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