- 13 Aug, 2019 1 commit
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yangxingwu authored
This patch removes extra spaces. Signed-off-by:
yangxingwu <xingwu.yang@gmail.com> Signed-off-by:
Pablo Neira Ayuso <pablo@netfilter.org>
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- 03 Aug, 2019 21 commits
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Junwei Hu authored
The ipvs module parse the user buffer and save it to sysctl, then check if the value is valid. invalid value occurs over a period of time. Here, I add a variable, struct ctl_table tmp, used to read the value from the user buffer, and save only when it is valid. I delete proc_do_sync_mode and use extra1/2 in table for the proc_dointvec_minmax call. Fixes: f73181c8 ("ipvs: add support for sync threads") Signed-off-by:
Junwei Hu <hujunwei4@huawei.com> Acked-by:
Julian Anastasov <ja@ssi.bg> Signed-off-by:
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Matteo Croce authored
Use shared sysctl variables for zero and one constants, as in commit eec4844f ("proc/sysctl: add shared variables for range check") Fixes: 8f14c99c ("netfilter: conntrack: limit sysctl setting for boolean options") Signed-off-by:
Matteo Croce <mcroce@redhat.com> Signed-off-by:
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Fernando Fernandez Mancera authored
After introduce "mss_encode" field in the synproxy_options struct the field "mss" is a little confusing. It has been renamed to "mss_option". Signed-off-by:
Fernando Fernandez Mancera <ffmancera@riseup.net> Signed-off-by:
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David S. Miller authored
Claudiu Manoil says: ==================== enetc: Add mdio bus driver for the PCIe MDIO endpoint First patch fixes a sparse issue and cleans up accessors to avoid casting to __iomem. The second one cleans up the Makefile, to make it easier to add new entries. Third patch just registers the PCIe endpoint device containing the MDIO registers as a standalone MDIO bus driver, to provide an alternative way to control the MDIO bus. The same code used by the ENETC ports (eth controllers) to manage MDIO via local registers applies and is reused. Bindings are provided for the new MDIO node, similarly to ENETC port nodes bindings. Last patch enables the ENETC port 1 and its RGMII PHY on the LS1028A QDS board, where the MDIO muxing configuration relies on the MDIO support provided in the first patch. Changes since v0: v1 - fixed mdio bus allocation v2 - cleaned up accessors to avoid casting v3 - fixed spelling (mostly commit message) v4 - fixed err path check blunder v5 - fixed loadble module build, provided separate kbuild module for the driver ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Claudiu Manoil authored
LS1028a has one Ethernet management interface. On the QDS board, the MDIO signals are multiplexed to either on-board AR8035 PHY device or to 4 PCIe slots allowing for SGMII cards. To enable the Ethernet ENETC Port 1, which can only be connected to a RGMII PHY, the multiplexer needs to be configured to route the MDIO to the AR8035 PHY. The MDIO/MDC routing is controlled by bits 7:4 of FPGA board config register 0x54, and value 0 selects the on-board RGMII PHY. The FPGA board config registers are accessible on the i2c bus, at address 0x66. The PF3 MDIO PCIe integrated endpoint device allows for centralized access to the MDIO bus. Add the corresponding devicetree node and set it to be the MDIO bus parent. Signed-off-by:
Alex Marginean <alexandru.marginean@nxp.com> Signed-off-by:
Claudiu Manoil <claudiu.manoil@nxp.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Claudiu Manoil authored
The on-chip PCIe root complex that integrates the ENETC ethernet controllers also integrates a PCIe endpoint for the MDIO controller providing for centralized control of the ENETC mdio bus. Add bindings for this "central" MDIO Integrated PCIe Endpoint. Signed-off-by:
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Claudiu Manoil authored
ENETC ports can manage the MDIO bus via local register interface. However there's also a centralized way to manage the MDIO bus, via the MDIO PCIe endpoint device integrated by the same root complex that also integrates the ENETC ports (eth controllers). Depending on board design and use case, centralized access to MDIO may be better than using local ENETC port registers. For instance, on the LS1028A QDS board where MDIO muxing is required. Also, the LS1028A on-chip switch doesn't have a local MDIO register interface. The current patch registers the above PCIe endpoint as a separate MDIO bus and provides a driver for it by re-using the code used for local MDIO access. It also allows the ENETC port PHYs to be managed by this driver if the local "mdio" node is missing from the ENETC port node. Signed-off-by:
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Claudiu Manoil authored
Clean up overcomplicated makefile to make it more maintainable. Basically, there's a set of common objects shared between the PF and VF driver modules. This can be implemented in a simpler way, without conditionals, less repetition, allowing also for easier updates in the future. Signed-off-by:
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Claudiu Manoil authored
What's needed is basically a pointer to the mdio registers. This is one way to store it inside bus->priv allocated space, without upsetting sparse. Reworked accessors to avoid __iomem casting. Used devm_* variant to further clean up the init error / remove paths. Fixes following sparse warning: warning: incorrect type in assignment (different address spaces) expected void *priv got struct enetc_mdio_regs [noderef] <asn:2>*[assigned] regs Fixes: ebfcb23d ("enetc: Add ENETC PF level external MDIO support") Signed-off-by: -
David S. Miller authored
Hubert Feurstein says: ==================== net: dsa: mv88e6xxx: add support for MV88E6220 This patch series adds support for the MV88E6220 chip to the mv88e6xxx driver. The MV88E6220 is almost the same as MV88E6250 except that the ports 2-4 are not routed to pins. Furthermore, PTP support is added to the MV88E6250 family. v2: - insert all 6220 entries in correct numerical order - introduce invalid_port_mask - move ptp_cc_mult* to ptp_ops and restored original ptp_adjfine code - added Andrews Reviewed-By to patch 2 and 4 ==================== Signed-off-by: -
Hubert Feurstein authored
This adds PTP support for the MV88E6250 family. Signed-off-by:
Hubert Feurstein <h.feurstein@gmail.com> Acked-by:
Richard Cochran <richardcochran@gmail.com> Reviewed-by:
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Hubert Feurstein authored
As it is done for all the other structs within this driver. Signed-off-by:
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Hubert Feurstein authored
The MV88E6250 family doesn't support the MV88E6XXX_PORT_CTL1_MESSAGE_PORT bit. Signed-off-by:
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Hubert Feurstein authored
With this it is possible to mark certain chip ports as invalid. This is required for example for the MV88E6220 (which is in general a MV88E6250 with 7 ports) but the ports 2-4 are not routed to pins. If a user configures an invalid port, an error is returned. Signed-off-by:
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Hubert Feurstein authored
The MV88E6220 is part of the MV88E6250 family. Signed-off-by:
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Hubert Feurstein authored
The MV88E6220 is almost the same as MV88E6250 except that the ports 2-4 are not routed to pins. So the usable ports are 0, 1, 5 and 6. Signed-off-by:
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David S. Miller authored
Andrew Jeffery says: ==================== net: phy: Add AST2600 MDIO support v2 of the ASPEED MDIO series addresses comments from Rob on the devicetree bindings and Andrew on the driver itself. v1 of the series can be found here: http://patchwork.ozlabs.org/cover/1138140/ ==================== Signed-off-by:
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Andrew Jeffery authored
Ensures we can talk to a PHY via MDIO on the AST2600, as the MDIO controller is now separate from the MAC. Signed-off-by:
Andrew Jeffery <andrew@aj.id.au> Reviewed-by:
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Andrew Jeffery authored
phy-handle is necessary for the AST2600 which separates the MDIO controllers from the MAC. I've tried to minimise the intrusion of supporting the AST2600 to the FTGMAC100 by leaving in place the existing MDIO support for the embedded MDIO interface. The AST2400 and AST2500 continue to be supported this way, as it avoids breaking/reworking existing devicetrees. The AST2600 support by contrast requires the presence of the phy-handle property in the MAC devicetree node to specify the appropriate PHY to associate with the MAC. In the event that someone wants to specify the MDIO bus topology under the MAC node on an AST2400 or AST2500, the current auto-probe approach is done conditional on the absence of an "mdio" child node of the MAC. Signed-off-by:
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Andrew Jeffery authored
The AST2600 design separates the MDIO controllers from the MAC, which is where they were placed in the AST2400 and AST2500. Further, the register interface is reworked again, so now we have three possible different interface implementations, however this driver only supports the interface provided by the AST2600. The AST2400 and AST2500 will continue to be supported by the MDIO support embedded in the FTGMAC100 driver. The hardware supports both C22 and C45 mode, but for the moment only C22 support is implemented. Signed-off-by:
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Andrew Jeffery authored
The AST2600 splits out the MDIO bus controller from the MAC into its own IP block and rearranges the register layout. Add a new binding to describe the new hardware. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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- 01 Aug, 2019 18 commits
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Jon Maloy authored
In commit 365ad353 ("tipc: reduce risk of user starvation during link congestion") we allowed senders to add exactly one list of extra buffers to the link backlog queues during link congestion (aka "oversubscription"). However, the criteria for when to stop adding wakeup messages to the input queue when the overload abates is inaccurate, and may cause starvation problems during very high load. Currently, we stop adding wakeup messages after 10 total failed attempts where we find that there is no space left in the backlog queue for a certain importance level. The counter for this is accumulated across all levels, which may lead the algorithm to leave the loop prematurely, although there may still be plenty of space available at some levels. The result is sometimes that messages near the wakeup queue tail are not added to the input queue as they should be. We now introduce a more exact algorithm, where we keep adding wakeup messages to a level as long as the backlog queue has free slots for the corresponding level, and stop at the moment there are no more such slots or when there are no more wakeup messages to dequeue. Fixes: 365ad353 ("tipc: reduce risk of user starvation during link congestion") Reported-by:
Tung Nguyen <tung.q.nguyen@dektech.com.au> Acked-by:
Ying Xue <ying.xue@windriver.com> Signed-off-by:
Jon Maloy <jon.maloy@ericsson.com> Signed-off-by:
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David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: avoid some redundant VTU operations The mv88e6xxx driver currently uses a mv88e6xxx_vtu_get wrapper to get a single entry and uses a boolean to eventually initialize a fresh one. However the fresh entry is only needed in one place and mv88e6xxx_vtu_getnext is simple enough to call it directly. Doing so makes the code easier to read, especially for the return code expected by switchdev to honor software VLANs. In addition to not loading the VTU again when an entry is already correctly programmed, this also allows to avoid programming the broadcast entries again when updating a port's membership, from e.g. tagged to untagged. This patch series removes the mv88e6xxx_vtu_get wrapper in favor of direct calls to mv88e6xxx_vtu_getnext, and also renames the _mv88e6xxx_port_vlan_add and _mv88e6xxx_port_vlan_del helpers using an old underscore prefix convention. In case the port's membership is already correctly programmed in hardware, the following debug message may be printed: [ 745.989884] mv88e6085 2188000.ethernet-1:00: p4: already a member of VLAN 42 ==================== Signed-off-by: -
Vivien Didelot authored
Wrapping mv88e6xxx_vtu_getnext makes the code less easy to read and _mv88e6xxx_port_vlan_add is the only function requiring the preparation of a new VLAN entry. To simplify things up, remove the mv88e6xxx_vtu_get wrapper and explicit the VLAN lookup in _mv88e6xxx_port_vlan_add. This rework also avoids programming the broadcast entries again when changing a port's membership, e.g. from tagged to untagged. At the same time, rename the helper using an old underscore convention. Signed-off-by:
Vivien Didelot <vivien.didelot@gmail.com> Signed-off-by:
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Vivien Didelot authored
Wrapping mv88e6xxx_vtu_getnext makes the code less easy to read. Explicit the call to mv88e6xxx_vtu_getnext in _mv88e6xxx_port_vlan_del and the return value expected by switchdev in case of software VLANs. At the same time, rename the helper using an old underscore convention. Signed-off-by:
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Vivien Didelot authored
mv88e6xxx_vtu_getnext is simple enough to call it directly in the mv88e6xxx_port_db_load_purge function and explicit the return code expected by switchdev for software VLANs when an hardware VLAN does not exist. Signed-off-by:
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Vivien Didelot authored
mv88e6xxx_vtu_getnext interprets two members from the input mv88e6xxx_vtu_entry structure: the (excluded) vid member to start the iteration from, and the valid argument specifying whether the VID must be written or not (only required once at the start of a loop). Explicit the assignation of these two fields right before calling mv88e6xxx_vtu_getnext, as it is done in the mv88e6xxx_vtu_get wrapper. Signed-off-by:
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Vivien Didelot authored
Lock the mutex in the mv88e6xxx_port_vlan_prepare function called by the DSA stack, instead of doing it in the internal mv88e6xxx_port_check_hw_vlan helper. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller authored
Jeff Kirsher says: ==================== 100GbE Intel Wired LAN Driver Updates 2019-07-31 This series contains updates to ice driver only. Paul adds support for reporting what the link partner is advertising for flow control settings. Jake fixes the hardware statistics register which is prone to rollover since the statistic registers are either 32 or 40 bits wide, depending on which register is being read. So use a 64 bit software statistic to store off the hardware statistics to track past when it rolls over. Fixes an issue with the locking of the control queue, where locks were being destroyed at run time. Tony fixes an issue that was created when interrupt tracking was refactored and the call to ice_vsi_setup_vector_base() was removed from the PF VSI instead of the VF VSI. Adds a check before trying to configure a port to ensure that media is attached. Brett fixes an issue in the receive queue configuration where prefena (Prefetch Enable) was being set to 0 which caused the hardware to only fetch descriptors when there are none free in the cache for a received packet. Updates the driver to only bump the receive tail once per napi_poll call, instead of the current model of bumping the tail up to 4 times per napi_poll call. Adds statistics for receive drops at the port level to ethtool/netlink. Cleans up duplicate code in the allocation of receive buffer code. Akeem updates the driver to ensure that VFs stay disabled until the setup or reset is completed. Modifies the driver to use the allocated number of transmit queues per VSI to set up the scheduling tree versus using the total number of available transmit queues. Also fix the driver to update the total number of configured queues, after a successful VF request to change its number of queues before updating the corresponding VSI for that VF. Cleaned up unnecessary flags that are no longer needed. ==================== Signed-off-by: -
David S. Miller authored
Huazhong Tan says: ==================== net: hns3: some code optimizations & bugfixes & features This patch-set includes code optimizations, bugfixes and features for the HNS3 ethernet controller driver. [patch 01/12] adds support for reporting link change event. [patch 02/12] adds handler for NCSI error. [patch 03/12] fixes bug related to debugfs. [patch 04/12] adds a code optimization for setting ring parameters. [patch 05/12 - 09/12] adds some cleanups. [patch 10/12 - 12/12] adds some patches related to reset issue. ==================== Signed-off-by: -
Huazhong Tan authored
When calling hclge_reset_event() within HCLGE_RESET_INTERVAL, it returns directly now. If no one call it again, then the error which needs a reset to fix it can not be fixed. So this patch activates the reset timer for this case, and adds checking in the end of the reset procedure to make this error fixed earlier. Signed-off-by:
Huazhong Tan <tanhuazhong@huawei.com> Reviewed-by:
Peng Li <lipeng321@huawei.com> Signed-off-by:
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Huazhong Tan authored
Currently, the reset interrupt is cleared in the reset task, which is too late. Since, when the hardware finish the previous reset, it can begin to do a new global/IMP reset, if this new coming reset type is same as the previous one, the driver will clear them together, then driver can not get that there is another reset, but the hardware still wait for the driver to deal with the second one. So this patch clears PF's reset interrupt status in the hclge_irq_handle(), the hardware waits for handshaking from driver before doing reset, so the driver and hardware deal with reset one by one. BTW, when VF doing global/IMP reset, it reads PF's reset interrupt register to get that whether PF driver's re-initialization is done, since VF's re-initialization should be done after PF's. So we add a new command and a register bit to do that. When VF receive reset interrupt, it sets up this bit, and PF finishes re-initialization send command to clear this bit, then VF do re-initialization. Fixes: 4ed340ab ("net: hns3: Add reset process in hclge_main") Signed-off-by:
Yunsheng Lin <linyunsheng@huawei.com> Signed-off-by:
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Huazhong Tan authored
Currently, the driver sets handshake status to tell the hardware that the driver have downed the netdev and it can continue with reset process. The driver will clear the handshake status when re-initializing the CMDQ, and does not recover this status when reset fail, which may cause the hardware to wait for the handshake status to be set and not being able to continue with reset process. So this patch delays clearing handshake status just before UP, and recovers this status when reset fail. BTW, this patch adds a new function hclge(vf)_reset_handshake() to deal with the reset handshake issue, and renames HCLGE(VF)_NIC_CMQ_ENABLE to HCLGE(VF)_NIC_SW_RST_RDY which represents this register bit more accurately. Fixes: ada13ee3 ("net: hns3: add handshake with hardware while doing reset") Signed-off-by:
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Guojia Liao authored
The member 'mac_add' defined in hclge_mac_ethertype_idx_rd_cmd means MAC address, so 'mac_addr' is a better name for it. Signed-off-by:
Guojia Liao <liaoguojia@huawei.com> Signed-off-by:
Guangbin Huang <huangguangbin2@huawei.com> Signed-off-by:
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Weihang Li authored
The 4th and 5th parameter of hclge_cmd_query_error is useless, so this patch removes them. Signed-off-by:
Weihang Li <liweihang@hisilicon.com> Reviewed-by:
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Yunsheng Lin authored
When hclge_tm_schd_info_update calls hclge_tm_schd_info_init to initialize the schedule info, hdev->tm_info.num_pg and hdev->tx_sch_mode is not changed, which makes the checking in hclge_tm_schd_info_init unnecessary. So this patch moves the hdev->tm_info.num_pg and hdev->tx_sch_mode checking into hclge_tm_schd_init and changes the return type of hclge_tm_schd_info_init from int to void. Signed-off-by:
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Yunsheng Lin authored
The unused_count variable is used to indicate how many RX BD need attaching new buffer in hns3_clean_rx_ring, and the clean_count variable has the similar meaning. This patch removes the clean_count variable and use unused_count to uniformly indicate the RX BD that need attaching new buffer. This patch also clean up some coding style related to variable assignment in hns3_clean_rx_ring. Signed-off-by:
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Jian Shen authored
The local variable return_status in hclge_get_mac_val_cmd_status() is useless. So this patch returns the error code directly, instead of using this variable. Also, replace some '%d' with '%u' in hclge_get_mac_val_cmd_status(). Signed-off-by:
Jian Shen <shenjian15@huawei.com> Reviewed-by:
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Jian Shen authored
Previously, when changing the ring parameters, we free the old ring resources firstly, and then setup the new ring resources. In some case of an memory allocation fail, there will be no resources to use. This patch refines it by setup new ring resources and free the old ring resources in order. Also reduce the max ring BD number to 32760 according to UM. Signed-off-by:
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