- 06 Jul, 2021 3 commits
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Thomas Zimmermann authored
Moving the driver-specific mmap code into a GEM object function allows for using DRM helpers for various mmap callbacks. The respective etnaviv functions are being removed. The file_operations structure fops is now being created by the helper macro DEFINE_DRM_GEM_FOPS(). Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by:
Lucas Stach <l.stach@pengutronix.de>
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Michael Walle authored
The LS1028A SoC errata sheet mentions A-050121 "GPU hangs if clock gating for Rasterizer, Setup Engine and Texture Engine are enabled". The workaround is to disable the corresponding clock gatings. Signed-off-by:
Michael Walle <michael@walle.cc> Signed-off-by:
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Michael Walle authored
The GPU is found on the NXP LS1028A SoC. The feature bits are taken from the NXP downstream kernel driver 6.4.3.p1. Signed-off-by:
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- 30 Jun, 2021 2 commits
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Dave Airlie authored
Merge tag 'drm-intel-next-fixes-2021-06-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-next The biggest fix is the restoration of mmap ioctl for gen12 integrated parts which lack was breaking ADL-P with media stack. Besides that a small selftest fix and a theoretical overflow on i915->pipe_to_crtc_mapping. Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/YNtsfguvCRSROBUZ@intel.com
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Dave Airlie authored
Merge tag 'drm-misc-next-fixes-2021-06-24' of git://anongit.freedesktop.org/drm/drm-misc into drm-next Short summary of fixes pull: * amdgpu: Fix test for allocation failures Signed-off-by:
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- 28 Jun, 2021 2 commits
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Thomas Hellström authored
Reinstate the mmap ioctl for all current integrated platforms. The intention was really to have it disabled for discrete graphics where we enforce a single mmap mode. This was reported to break ADL-P with the media stack, which was not the intention. Although longer term we do still plan to sunset this ioctl even for integrated, in favour of using mmap_offset instead. Fixes: 35cbd91e ("drm/i915: Disable mmap ioctl for gen12+") Signed-off-by:
Thomas Hellström <thomas.hellstrom@linux.intel.com> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com>
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Jani Nikula authored
Add a single point of truth for figuring out the primary/secondary crtc for bigjoiner instead of duplicating the magic pipe +/- 1 in multiple places. Also fix the pipe validity checks to properly take non-contiguous pipes into account. The current checks may theoretically overflow i915->pipe_to_crtc_mapping[pipe], albeit with a warning, due to fused off pipes, as INTEL_NUM_PIPES() returns the actual number of pipes on the platform, and the check is for INTEL_NUM_PIPES() == pipe + 1. Prefer primary/secondary terminology going forward. v2: - Improved abstractions for pipe validity etc. Fixes: 8a029c11 ("drm/i915/dp: Modify VDSC helpers to configure DSC for Bigjoiner slave") Fixes: d961eb20 ("drm/i915/bigjoiner: atomic commit changes for uncompressed joiner") Cc: Animesh Manna <animesh.manna@intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Reviewed-by:
Manasi Navare <manasi.dl.navare@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210610090528.20511-1-jani.nikula@intel.com (cherry picked from commit 17203224) Signed-off-by:
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- 23 Jun, 2021 33 commits
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Dave Airlie authored
Merge tag 'amd-drm-next-5.14-2021-06-22-1' of https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.14-2021-06-22-1: amdgpu: - Userptr BO fixes - RAS fixes - Beige Goby fixes - Add some missing freesync documentation - Aldebaran fixes - SR-IOV fixes - Potential memory corruption fix in framebuffer handling - Revert GFX9, 10 doorbell fixes, we just end up trading one bug for another - Multi-plane cursor fixes with rotation - LTTPR fixes - Backlight fixes - eDP fix - Fold DRM_AMD_DC_DCN3_1 into DRM_AMD_DC_DCN - Misc code cleanups amdkfd: - Topology fix - Locking fix radeon: - Misc code cleanup Signed-off-by:
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https://gitlab.freedesktop.org/drm/msmDave Airlie authored
* devcoredump support for display errors * dpu: irq cleanup/refactor * dpu: dt bindings conversion to yaml * dsi: dt bindings conversion to yaml * mdp5: alpha/blend_mode/zpos support * a6xx: cached coherent buffer support * a660 support * gpu iova fault improvements: - info about which block triggered the fault, etc - generation of gpu devcoredump on fault * assortment of other cleanups and fixes Signed-off-by:
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Rob Clark authored
This reverts commit c1d12c19. Breaks armv7 build ERROR: modpost: "__aeabi_ldivmod" [drivers/gpu/drm/msm/msm.ko] undefined! Signed-off-by:
Rob Clark <robdclark@chromium.org>
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Dmitry Baryshkov authored
Instead of using static bandwidth setup, manage bandwidth dynamically, depending on the amount of allocated planes, their format and resolution. Co-developed-with: James Willcox <jwillcox@squareup.com> Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reported-by:
kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/r/20210525131316.3117809-8-dmitry.baryshkov@linaro.orgSigned-off-by:
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James Willcox authored
Prior downstream kernels had "fudge factors" in devicetree which would be applied to things like interconnect bandwidth calculations. Bring some of those values back here. Signed-off-by:
James Willcox <jwillcox@squareup.com> [DB: changed _ff to _inefficiency, fixed patch description] Signed-off-by:
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Dmitry Baryshkov authored
Instead of implemeting zpos property on our own, use standard zpos property support. Signed-off-by:
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Dmitry Baryshkov authored
Hook alpha and pixel blend mode support to be exported as proper DRM plane properties. This allows using this functionality from the userspace. Signed-off-by:
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Dmitry Baryshkov authored
Use drm_plane_state's 'pixel_blend_mode' field rather than using 'premultiplied' field to mdp5_plane_state. Signed-off-by:
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Dmitry Baryshkov authored
Use drm_plane_state's 'alpha' field rather than adding extra 'alpha' field to mdp5_plane_state. Signed-off-by:
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Dmitry Baryshkov authored
Use generic helpers code to manage drm_plane_state part of mdp5_plane state instead of manually coding all the details. Signed-off-by:
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Dmitry Baryshkov authored
Move the call to dsi_mgr_phy_enable after checking whether the DSI interface is slave, so that PHY enablement happens together with the host enablement. Signed-off-by:
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Rob Clark authored
Just for the purposes of testing. Write to it the # of objects to scan, read back the # freed. Signed-off-by:
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Bjorn Andersson authored
Handling of the interrupt callback lists is done in dpu_core_irq.c, under the "cb_lock" spinlock. When these operations results in the need for enableing or disabling the IRQ in the hardware the code jumps to dpu_hw_interrupts.c, which protects its operations with "irq_lock" spinlock. When an interrupt fires, dpu_hw_intr_dispatch_irq() inspects the hardware state while holding the "irq_lock" spinlock and jumps to dpu_core_irq_callback_handler() to invoke the registered handlers, which traverses the callback list under the "cb_lock" spinlock. As such, in the event that these happens concurrently we'll end up with a deadlock. Prior to '1c1e7763a6d4 ("drm/msm/dpu: simplify IRQ enabling/disabling")' the enable/disable of the hardware interrupt was done outside the "cb_lock" region, optimitically by using an atomic enable-counter for each interrupt and an warning print if someone changed the list between the atomic_read and the time the operation concluded. Rather than re-introducing the large array of atomics, this change embraces the fact that dpu_core_irq and dpu_hw_interrupts are deeply entangled and make them share the single "irq_lock". Following this step it's suggested that we squash the two parts into a single irq handling thing. Fixes: 1c1e7763a6d4 ("drm/msm/dpu: simplify IRQ enabling/disabling") Signed-off-by:Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
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Rob Clark authored
Wire up support to stall the SMMU on iova fault, and collect a devcore- dump snapshot for easier debugging of faults. Currently this is a6xx-only, but mostly only because so far it is the only one using adreno-smmu-priv. Signed-off-by:
Jordan Crouse <jordan@cosmicpenguin.net> Link: https://lore.kernel.org/r/20210610214431.539029-6-robdclark@gmail.comSigned-off-by:
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Rob Clark authored
Add, via the adreno-smmu-priv interface, a way for the GPU to request the SMMU to stall translation on faults, and then later resume the translation, either retrying or terminating the current translation. This will be used on the GPU side to "freeze" the GPU while we snapshot useful state for devcoredump. Signed-off-by:
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Jordan Crouse authored
Use the new adreno-smmu-priv fault info function to get more SMMU debug registers and print the current TTBR0 to debug per-instance pagetables and figure out which GPU block generated the request. Signed-off-by:
Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by:
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Jordan Crouse authored
Add a callback in adreno-smmu-priv to read interesting SMMU registers to provide an opportunity for a richer debug experience in the GPU driver. Signed-off-by:
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Jordan Crouse authored
Call report_iommu_fault() to allow upper-level drivers to register their own fault handlers. Signed-off-by:
Will Deacon <will@kernel.org> Reviewed-by:
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Samuel Iglesias Gonsalvez authored
While keeping the previous default value for hangcheck period, we allow now the possibility of configuring its value via debugfs. Signed-off-by:
Samuel Iglesias Gonsalvez <siglesias@igalia.com> Link: https://lore.kernel.org/r/20210607104441.184700-1-siglesias@igalia.comSigned-off-by:
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Jonathan Marek authored
Add adreno_is_{a660,a650_family} helpers and convert update existing adreno_is_a650 usage based on downstream driver's logic (changing into adreno_is_a650_family or adding adreno_is_a660). And add the remaining changes required for A660, again based on the downstream driver: missing GMU allocations, additional register init, dummy hfi BW table, cp protect list, entry in gpulist table, hwcg table, updated a6xx_ucode_check_version check. Signed-off-by:Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20210608172808.11803-6-jonathan@marek.caSigned-off-by:
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Jonathan Marek authored
See downstream's "disable_tseskip" flag. Signed-off-by:
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Jonathan Marek authored
downstream msm-5.14 kernel added a write to this register, so match that. Signed-off-by:
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Jonathan Marek authored
SM8250 AOP firmware already sets up PDC registers for us, and it only needs to be enabled. This path will be used for other newer GPUs. Signed-off-by:
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Jonathan Marek authored
These aren't used by anything anymore. Signed-off-by:
Akhil P Oommen <akhilpo@codeaurora.org> Link: https://lore.kernel.org/r/20210608172808.11803-2-jonathan@marek.caSigned-off-by:
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Rob Clark authored
Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5 Small bit of .c churn in the phy code to adapt to split up of phy related registers. Signed-off-by: -
Dmitry Baryshkov authored
The code does not really use dpu_hw_blk fields, so drop them, making dpu_hw_blk empty structure. Signed-off-by:
Abhinav Kumar <abhinavk@codeaurora.org> Signed-off-by:
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Dmitry Baryshkov authored
Use struct dpu_hw_merge_3d pointer in struct dpu_hw_pingpong rather than using struct dpu_hw_blk. This is the only user of dpu_hw_blk.id, which will be cleaned in the next patch. Signed-off-by:
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Dmitry Baryshkov authored
The dpu_hw_blk_destroy() function is empty, so we can drop it now. Signed-off-by:
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Dmitry Baryshkov authored
Remove all unused dpu_hw_blk features and functions: - dpu_hw_blk_get()/_put() and respective refcounting, - global list of all dpu_hw_blk instances, - dpu_hw_blk_ops and empty implementation inside each hw_blk subdriver. This leaves dpu_hw_blk as a placeholder with just type and index. Signed-off-by:
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Dmitry Baryshkov authored
In order to ease debugging of DSI host registration issues, print return code of dsi_mgr_setup_components(). Signed-off-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/msm/dp/dp_link.c:374: warning: expecting prototype for dp_parse_video_pattern_params(). Prototype was for dp_link_parse_video_pattern_params() instead drivers/gpu/drm/msm/dp/dp_link.c:573: warning: expecting prototype for dp_parse_phy_test_params(). Prototype was for dp_link_parse_phy_test_params() instead drivers/gpu/drm/msm/dp/dp_link.c:975: warning: expecting prototype for dp_link_process_downstream_port_status_change(). Prototype was for dp_link_process_ds_port_status_change() instead Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Chandan Uddaraju <chandanu@codeaurora.org> Cc: Kuogee Hsieh <khsieh@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Signed-off-by:
Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20210602143300.2330146-15-lee.jones@linaro.orgReviewed-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Function parameter or member 'dp_catalog' not described in 'dp_catalog_aux_reset' drivers/gpu/drm/msm/dp/dp_catalog.c:206: warning: Excess function parameter 'aux' description in 'dp_catalog_aux_reset' Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Chandan Uddaraju <chandanu@codeaurora.org> Cc: Stephen Boyd <swboyd@chromium.org> Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Lee Jones authored
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/msm/msm_gem.c:364: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst drivers/gpu/drm/msm/msm_gem.c:763: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst Cc: Rob Clark <robdclark@gmail.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: "Christian König" <christian.koenig@amd.com> Cc: linux-arm-msm@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org Cc: linux-media@vger.kernel.org Cc: linaro-mm-sig@lists.linaro.org Signed-off-by:
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