- 19 Mar, 2015 31 commits
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Dave Airlie authored
The atombios tables have an unfortunate restriction on only being able to write 12 bytes, MST really wants 16-bytes here, and since the hw can do it, we should just write directly to it. This uses a module option to allow for it now, and maybe we should provide the old code as a fallback for a while. v2: (agd5f) - move registers to a proper register header - only enable on DCE5+ - enable by default on DCE5+ - Switch pad to aux mode before using it - reformat instance handling to better match the rest of the driver Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Use the correct flags for atom. v2: handle DRM_MODE_FLAG_DBLCLK Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Vincent Batts authored
"defaul" -> "default" Signed-off-by: Vincent Batts <vbatts@hashbangbash.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This allows us to query certain registers from userspace for profiling and harvest configuration. E.g., it can be used by the GALLIUM_HUD for profiling the status of various gfx blocks. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Registers that can be fetched from the info ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Just a stub. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This adds a callback for each asic family to determine what registers are allowed to be read back via the info ioctl. The idea here is to allow usermode to query things like GPU status registers or GPU harvest registers for profiling and determining the gfx config. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Allow the UMDs to query the current sclk/mclk for profiling, etc. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Some copy paste leftovers. No functional change. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Will be used for exposing current clocks via INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Needed to to expose the current clocks via the INFO ioctl. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Useful for profiling. Tested-by: Marek Olšák <marek.olsak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Maarten Lankhorst authored
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
If the display supports selectable range, set the range based on what the user has selected for output csc. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Implement the property for DCE5+ asics. Older asics require a slightly more complex process. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
This adds the drm property for output csc (e.g., transform of output display colorspace). Currently only common ones (TV RGB, BT.601, BT.709) are supported, but bypass and tv rgb are really the only useful ones at the moment. Additionally we could expose a user adjustable matrix in the future. This commit just adds the property. The hw support will be added in subsequent patches. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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https://github.com/markyzq/kernel-drm-rockchipDave Airlie authored
rockchip fixes. * 'drm_next' of https://github.com/markyzq/kernel-drm-rockchip: drm/rockchip: vop: power off until vop standby take effect drm/rockchip: vop: set vop enabled after enable iommu drm/rockchip: vop use is_enabled instead of dpms mode drm/rockchip: vop: fix vop vsync/hsync polarity drm/rockchip: Only alloc a kmap for fbdev gem object
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Another drm-misch pull request. Mostly the fbdev sizes deconfusion series from Rob, everything else is small stuff all over. And the large i2c over aux transfers patch, too. * tag 'topic/drm-misc-2015-03-18' of git://anongit.freedesktop.org/drm-intel: drm: check that planes types are correct while initializing CRTC drm: change connector to tmp_connector drm: Fix some typo mistake of the annotations drm: Silence sparse warnings drm: %pF is only for function pointers drm/fb: handle tiled connectors better drm/fb: small cleanup drm/rockchip: use correct fb width/height drm/exynos: use correct fb width/height drm/cma: use correct fb width/height drm/atomic: minor kerneldoc typo fix drm/fb: document drm_fb_helper_surface_size drm/dp: Use large transactions for I2C over AUX drm/plane-helper: Fixup mismerge drm/atomic: Constify a bunch of functions pointer structs
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- 17 Mar, 2015 3 commits
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Benjamin Gaignard authored
Be warned if primary or cursor planes haven't the correct type Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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John Hunter authored
This wasn't too harmful since we already look at connector, which has the same effect as the loop for any non-cloned configs. Only when we have a cloned configuration is it important to look at other connectors. Furthermore existing userspace always changes dpms on all of them anyway. Signed-off-by: JohnHunter <zhjwpku@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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John Hunter authored
There are some mistakes that the function name in the annotaions is not matching the real function name. And some duplication word in annotations Signed-off-by: John Hunter <zhjwpku@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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- 16 Mar, 2015 5 commits
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Mark Yao authored
Vop standby will take effect at end of current frame, if dsp_hold_valid_irq happen, it means vop standby complete. we must wait standby complete when we want to disable aclk, if not, memory bus maybe dead. Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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Mark Yao authored
there is a Bug that: vop_enable()->drm_vblank_on, drm_vblank_on may call vop enable vblank. if it happen, vblank enable would failed, then cause irq status error. because is_enabled value is set after drm_vblank_on. after enable vop clocks and iommu regs, we can sure that R/W vop regs and do vop plane flip is safe, so place is_enabled = true after enable iommu is suitable. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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Mark Yao authored
drm dpms have many power modes: ON,OFF,SUSPEND,STANDBY, etc. but vop only have enable/disable mode, maybe case such bug: --> DRM_DPMS_ON: power on vop --> DRM_DPMS_SUSPEND: power off vop --> DRM_DPMS_OFF: already power off at SUSPEND, crash so use a bool val is more suitable. Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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Mark Yao authored
Vop set wrong vsync/hsync polarity, it may cause some display problem. known problem is that caused HDMI hdcp authenticate failed, caused pixel offset with hdmi display. the polarity description at RK3288 TRM doc: dsp_vsync_pol VSYNC polarity 1'b0 : negative 1'b1 : positive dsp_hsync_pol HSYNC polarity 1'b0 : negative 1'b1 : positive Signed-off-by: Mark Yao <mark.yao@rock-chips.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Tested-by: Caesar Wang <wxt@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de>
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Daniel Kurtz authored
In general, the data in drm/rockchip GEM objects is never accessed by the kernel. The objects are either accessed by a GPU, by display controller DMA, or by mmap'ing them to user space. Thus, these buffers need not be mapped into kernel address space. The only exception is the fbdev framebuffer(s), which may be written in-kernel by fbcon. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
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- 13 Mar, 2015 1 commit
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Ville Syrjälä authored
../drivers/gpu/drm/drm_vm.c:405:6: warning: symbol 'drm_vm_open_locked' was not declared. Should it be static? ../drivers/gpu/drm/drm_vm.c:431:6: warning: symbol 'drm_vm_close_locked' was not declared. Should it be static? ../drivers/gpu/drm/drm_vm.c:681:5: warning: symbol 'drm_vma_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_pci.c:146:5: warning: symbol 'drm_pci_set_unique' was not declared. Should it be static? ../drivers/gpu/drm/drm_pci.c:216:5: warning: symbol 'drm_irq_by_busid' was not declared. Should it be static? ../drivers/gpu/drm/drm_info.c:47:5: warning: symbol 'drm_name_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_info.c:72:5: warning: symbol 'drm_vm_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_info.c:116:5: warning: symbol 'drm_bufs_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_info.c:159:5: warning: symbol 'drm_clients_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_info.c:209:5: warning: symbol 'drm_gem_name_info' was not declared. Should it be static? ../drivers/gpu/drm/drm_ioc32.c:1019:20: warning: symbol 'drm_compat_ioctls' was not declared. Should it be static? ../drivers/gpu/drm/drm_bridge.c:52:12: warning: function 'drm_bridge_attach' with external linkage has definition Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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