- 20 Sep, 2022 1 commit
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Michael Walle authored
Commit a2b5e207 ("gpiolib: rework quirk handling in of_find_gpio()") introduced an array of quirk functions which get iterated over. But a sentinal value is missing. Add it. Fixes: a2b5e207 ("gpiolib: rework quirk handling in of_find_gpio()") Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Tested-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Tested-by:
Marek Szyprowski <m.szyprowski@samsung.com> Tested-by:
Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by:
Bartosz Golaszewski <brgl@bgdev.pl>
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- 15 Sep, 2022 15 commits
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Dmitry Torokhov authored
There are several places where we need to convert from OF flags to "normal" GPIO_* flags, so let's introduce a helper and use it. Signed-off-by:
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Dmitry Torokhov authored
Instead of having a string of "if" statements let's put all quirks into an array and iterate over them. Signed-off-by:
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Dmitry Torokhov authored
There is no need for of_find_spi_cs_gpio() to be different from other quirks: the only variant of property actually used in DTS is "gpios" (plural) so we can use of_get_named_gpiod_flags() instead of recursing into of_find_gpio() again. This will allow us consolidate quirk handling down the road. Signed-off-by:
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Dmitry Torokhov authored
We should not ignore index passed into of_find_gpio() when handling quirks. While in practice this change will not have any effect, it will allow consolidate quirk handling. Signed-off-by:
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William Breathitt Gray authored
The ws16c48 module calls devm_request_irq() for each device. If the number of irq passed to the module does not match the number of base, a default value of 0 is passed to devm_request_irq(). IRQ 0 is probably not what the user wants, so utilize the module_isa_driver_with_irq macro to ensure the number of irq matches the number of base. Signed-off-by:
William Breathitt Gray <william.gray@linaro.org> Signed-off-by:
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William Breathitt Gray authored
The 104-idio-16 module calls devm_request_irq() for each device. If the number of irq passed to the module does not match the number of base, a default value of 0 is passed to devm_request_irq(). IRQ 0 is probably not what the user wants, so utilize the module_isa_driver_with_irq macro to ensure the number of irq matches the number of base. Signed-off-by:
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William Breathitt Gray authored
The 104-idi-48 module calls devm_request_irq() for each device. If the number of irq passed to the module does not match the number of base, a default value of 0 is passed to devm_request_irq(). IRQ 0 is probably not what the user wants, so utilize the module_isa_driver_with_irq macro to ensure the number of irq matches the number of base. Signed-off-by:
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William Breathitt Gray authored
The 104-dio-48e module calls devm_request_irq() for each device. If the number of irq passed to the module does not match the number of base, a default value of 0 is passed to devm_request_irq(). IRQ 0 is probably not what the user wants, so utilize the module_isa_driver_with_irq macro to ensure the number of irq matches the number of base. Signed-off-by:
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William Breathitt Gray authored
The 104-quad-8 module calls devm_request_irq() for each device. If the number of irq passed to the module does not match the number of base, a default value of 0 is passed to devm_request_irq(). IRQ 0 is probably not what the user wants, so utilize the module_isa_driver_with_irq macro to ensure the number of irq matches the number of base. Signed-off-by:
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William Breathitt Gray authored
Several ISA drivers feature IRQ support that can configured via an "irq" array module parameter. This array typically matches directly with the respective "base" array module parameter. To reduce code repetition, a module_isa_driver_with_irq helper macro is introduced to provide a check ensuring that the number of "irq" passed to the module matches with the respective number of "base". Signed-off-by:
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Martyn Welch authored
Add support for the NXP PCAL6534. This device is broadly a 34-bit version of the PCAL6524. However, whilst the registers are broadly what you'd expect for a 34-bit version of the PCAL6524, the spacing of the registers has been compacted. This has the unfortunate effect of breaking the bit shift based mechanism that is employed to work out register locations used by the other chips supported by this driver. To accommodate ths, callback functions have been added to allow alterate implementations of pca953x_recalc_addr() and pca953x_check_register() for the PCAL6534. Datasheet: https://www.nxp.com/docs/en/data-sheet/PCAL6534.pdf Datasheet: https://www.diodes.com/assets/Datasheets/PI4IOE5V6534Q.pdfSigned-off-by:
Martyn Welch <martyn.welch@collabora.com> Signed-off-by:
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Martyn Welch authored
A later patch in the series adds support for a further chip type that shares some similarity with the PCA953X_TYPE. In order to keep the logic simple, swap over the if and else portions where checks are made against PCA953X_TYPE and instead check for PCA957X_TYPE. Signed-off-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
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Martyn Welch authored
A previous fix, commit dc87f6dd ("gpio: pca953x: Fix pca953x_gpio_set_config"), identified that pinconf_to_config_param() needed to be used to isolate the config_param from the pinconf in pca953x_gpio_set_config(). This fix however did not consider that this would also be needed in pca953x_gpio_set_pull_up_down() to which it passes this config. Perform a similar call in pca953x_gpio_set_pull_up_down() to isolate the configuration parameter there as well, rather than passing it from pca953x_gpio_set_config() as the configuration argument may also be needed in pca953x_gpio_set_pull_up_down() at a later date. Signed-off-by:
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Martyn Welch authored
The NXP PCAL6534 is a 34-bit I2C I/O expander similar to the PCAL6524. The Diodes PI4IOE5V6534Q is a functionally identical chip provided by Diodes Inc. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Martyn Welch authored
Diodes Incorporated is a manufacturer of application specific standard products within the discrete, logic, analog, and mixed-signal semiconductor markets. https://www.diodes.com/Signed-off-by:
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- 14 Sep, 2022 3 commits
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Sergio Paracuellos authored
Mt7621 SoC GPIO driver is a platform driver so we can directly use 'platform_get_irq' instead of 'irq_of_parse_and_map'. Tested-by:
Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by:
Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by:
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Nate Drude authored
The NXP PCAL6408 is the 8-bit version of PCAL6416. Signed-off-by:
Nate Drude <nate.d@variscite.com> Signed-off-by:
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Nate Drude authored
The NXP PCAL6408 is the 8-bit version of PCAL6416. Signed-off-by:
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- 09 Sep, 2022 1 commit
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Geert Uytterhoeven authored
Document support for the GPIO controller blocks in the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
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- 04 Sep, 2022 2 commits
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Qingtao Cao authored
When EXAR xr17v35x chips are cascaded in order to access the MPIO registers (part of the Device Configuration Registers) of the secondary chips, an offset needs to be applied based on the number of primary chip's UART channels. Signed-off-by:
Qingtao Cao <qingtao.cao@digi.com> Reviewed-by:
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Dmitry Torokhov authored
There are no external users of fwnode_get_named_gpiod() anymore, so let's stop exporting it and mark it as static. Signed-off-by:
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- 01 Sep, 2022 8 commits
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Bartosz Golaszewski authored
Merge tag 'platform-drivers-x86-simatec-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 into gpio/for-next Tag (immutable branch) for: v6.0-rc1 + "[PATCH v6 0/7] add support for another simatic board" series for merging into the gpio, leds and pdx86 subsystems.
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Henning Schild authored
This adds support for the Siemens Simatic IPC427G. A board which basically works like the 227G added in a previous patch. So all there is to do is to add the station_id and make it take all the 227G branches. Reviewed-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Henning Schild <henning.schild@siemens.com> Link: https://lore.kernel.org/r/20220825104422.14156-8-henning.schild@siemens.comReviewed-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
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Henning Schild authored
Just load the watchdog module, after having identified that machine. That watchdog module does not have any autoloading support. Reviewed-by:
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Henning Schild authored
This adds support of the Siemens Simatic IPC227G. Its LEDs are connected to GPIO pins provided by the gpio-f7188x module. We make sure that gets loaded, if not enabled in the kernel config no LED support will be available. Reviewed-by:
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Henning Schild authored
So that drivers building on top can find those pins with GPIO_LOOKUP helpers. Reviewed-by:
Simon Guinot <simon.guinot@sequanux.org> Signed-off-by:
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Henning Schild authored
Add GPIO support for Nuvoton NCT6116 chip. Nuvoton SuperIO chips are very similar to the ones from Fintek. In other subsystems they also share drivers and are called a family of drivers. For the GPIO subsystem the only difference is that the direction bit is reversed and that there is only one data bit per pin. On the SuperIO level the logical device is another one. On a chip level we do not have a manufacturer ID to check and also no revision. Reviewed-by:
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Henning Schild authored
Subsequent patches will touch that file, apply some nice to have style changes before actually adding functional changes. Signed-off-by:
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Henning Schild authored
Subsequent patches will touch that file, apply some nice to have style changes before actually adding functional changes. Signed-off-by:
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- 31 Aug, 2022 7 commits
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Francesco Dolcini authored
STMPE driver does not require a specific node name anymore, only the compatible is checked, update binding according to this. Signed-off-by:
Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by:
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Shenwei Wang authored
The SCU firmware on i.MX8 platforms provides a set of APIs to control the GPIO PINs on the SCU domain. This patch implements the standard GPIO driver interface to access those PINs on the SCU domain over the SCU APIs. Signed-off-by:
Shenwei Wang <shenwei.wang@nxp.com> Reviewed-by:
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Shenwei Wang authored
Add the description for imx-scu gpio subnode. Signed-off-by:
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Shenwei Wang authored
Add binding document for the imx scu gpio driver. Signed-off-by:
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Conor Dooley authored
The SD card and eMMC on PolarFire SoC are sometimes muxed using a GPIO by the bootloader. Add a hog child property to facilitate this. Signed-off-by:
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Jeffy Chen authored
Follow commit dbd1c54f ("gpio: Bulk conversion to generic_handle_domain_irq()"). Signed-off-by:
Jeffy Chen <jeffy.chen@rock-chips.com> Reviewed-by:
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Linus Walleij authored
The UCB1400 implements a GPIO driver so it needs to include the <linux/gpio/driver.h> header, not the legacy <linux/gpio.h> header. Compile tested on pxa_defconfig. Signed-off-by:
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- 15 Aug, 2022 2 commits
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Krzysztof Kozlowski authored
Instead of listing directly properties typical for SPI peripherals, reference the spi-peripheral-props.yaml schema. This allows using all properties typical for SPI-connected devices, even these which device bindings author did not tried yet. Remove the spi-* properties which now come via spi-peripheral-props.yaml schema, except for the cases when device schema adds some constraints like maximum frequency. While changing additionalProperties->unevaluatedProperties, put it in typical place, just before example DTS. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
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Srinivas Neeli authored
Convert Xilinx axi gpio binding documentation to YAML. Signed-off-by:
Srinivas Neeli <srinivas.neeli@xilinx.com> Reviewed-by:
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- 14 Aug, 2022 1 commit
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Linus Torvalds authored
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