- 05 Oct, 2021 8 commits
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Arnd Bergmann authored
Commit 38225f2e ("ARM/omap1: switch to use dma_direct_set_offset for lbus DMA offsets") removed a lot of mach/memory.h, but left the USB offset handling split into arch/arm/mach-omap1/usb.c and drivers/usb/host/ohci-omap.c. This can cause a randconfig build warning that now fails the build with -Werror: arch/arm/mach-omap1/usb.c:561:30: error: 'omap_1510_usb_ohci_nb' defined but not used [-Werror=unused-variable] 561 | static struct notifier_block omap_1510_usb_ohci_nb = { | ^~~~~~~~~~~~~~~~~~~~~ Move it all into the platform file to get rid of the final location that relies on mach/memory.h. Acked-by:
Felipe Balbi <felipe.balbi@linux.intel.com> Acked-by:
Alan Stern <stern@rowland.harvard.edu> Acked-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210927144118.2464881-1-arnd@kernel.org' Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'qcom-drivers-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm driver fixes for v5.15 This restricts the QCOM_SCM driver to depend on ARCH_QCOM, to reduce it's presence after becoming a loadable module. It then fixes a regression in the mdt_loader, where firmware with the hash segment marked as PT_LOAD would no longer be accepted, preventing several MSM8974 and SDM660 devices from loading remoteproc firmware. Lastly it corrects the drvdata associated with the socinfo device during probe, to match that expected by the remove function. * tag 'qcom-drivers-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: firmware: qcom_scm: QCOM_SCM should depend on ARCH_QCOM soc: qcom: mdt_loader: Drop PT_LOAD check on hash segment soc: qcom: socinfo: Fixed argument passed to platform_set_data() Link: https://lore.kernel.org/r/20210930025456.1035-1-bjorn.andersson@linaro.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'qcom-arm64-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 DTS fixes for 5.15 This starts by reverting the SC7280 CPUfreq update, which was merged before concensus about the associated drivers changes was reached. It then moves the reserved-memory changes done to get IPA working on the Lenovo Yoga C630 into the Yoga specific DTS, as changing the memory map on the platform level did break a couple of the other boards. It fixes the HDMI audio on Trogdor and add missing Aggre2 NOC qos clocks on SDM6{30,36,60} which prevented some boards from booting. Lastly it enables the PON module on SM8250/QRB5165, as the lack thereof is blocking automated testing in LKFT. * tag 'qcom-arm64-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sdm630: Add missing a2noc qos clocks arm64: dts: qcom: qrb5165-rb5: enabled pwrkey and resin nodes arm64: dts: qcom: pm8150: specify reboot mode magics arm64: dts: qcom: pm8150: use qcom,pm8998-pon binding arm64: dts: qcom: sc7180-trogdor: Fix lpass dai link for HDMI arm64: dts: qcom: sdm850-yoga: Reshuffle IPA memory mappings Revert "arm64: dts: qcom: sc7280: Fixup the cpufreq node" Link: https://lore.kernel.org/r/20210930025509.1091-1-bjorn.andersson@linaro.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/fixes Juno/Vexpress fixes for v5.15 Bunch of DTS fixes to resolve addressing issues with some of the device nodes, dropping unused/undocumented properties in various nodes, and aligning node names with dtschema. * tag 'juno-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm: dts: vexpress: Fix motherboard bus 'interrupt-map' arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address arm: dts: vexpress: Drop unused properties from motherboard node arm64: dts: arm: drop unused interrupt-names in MHU ARM: dts: arm: align watchdog and mmc node names with dtschema arm64: dts: arm: align watchdog and mmc node names with dtschema arm64: dts: fvp: Remove panel timings Link: https://lore.kernel.org/r/20210927105249.3583380-1-sudeep.holla@arm.comSigned-off-by:
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Arnd Bergmann authored
Merge tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm DTS fixes for v5.15 This corrects the use of depricated chipid and clock names, for which support was finally dropped from the driver. It also ensures that the DSI PLL is fed by the correct clock, now that it's being migrated to not rely on global clock names. * tag 'qcom-dts-fixes-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: apq8064: update Adreno clock names ARM: dts: qcom: apq8064: Use 27MHz PXO clock as DSI PLL reference ARM: dts: qcom: apq8064: use compatible which contains chipid Link: https://lore.kernel.org/r/20210930025526.1146-1-bjorn.andersson@linaro.orgSigned-off-by:
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Arnd Bergmann authored
Merge tag 'at91-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes #2 for 5.15: - More fixes for AT91 platform power management code related to the introduction of sama7g5: - management of DDR3L regulator rails for sama7g5ek - loading of TLB on different cores - PIO controller slew-rate settings for sama7g5ek: be aligned with datasheet requirements. * tag 'at91-fixes-5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama7g5ek: to not touch slew-rate for SDMMC pins ARM: dts: at91: sama7g5ek: use proper slew-rate settings for GMACs ARM: at91: pm: preload base address of controllers in tlb ARM: at91: pm: group constants and addresses loading ARM: dts: at91: sama7g5ek: add suspend voltage for ddr3l rail Link: https://lore.kernel.org/r/20211004114344.19304-1-nicolas.ferre@microchip.comSigned-off-by:
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Nishanth Menon authored
Add Vignesh to TI K3 platform maintainership. We will rotate roles for each kernel version to help spread the work load a little better. Signed-off-by:
Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20210915121308.26795-1-nm@ti.com' Signed-off-by:
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Arnd Bergmann authored
Merge tag 'optee-fix-for-v5.15' of git://git.linaro.org/people/jens.wiklander/linux-tee into arm/fixes Fix OP-TEE shm_pool lint warning * tag 'optee-fix-for-v5.15' of git://git.linaro.org/people/jens.wiklander/linux-tee: tee/optee/shm_pool: fix application of sizeof to pointer Link: https://lore.kernel.org/r/20210915113813.GA509196@jadeSigned-off-by:
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- 04 Oct, 2021 5 commits
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Claudiu Beznea authored
With commit c709135e ("pinctrl: at91-pio4: add support for slew-rate") and commit cbde6c82 ("pinctrl: at91-pio4: Fix slew rate disablement") the slew-rate is enabled by default for each configured pin. The datasheet specifies at chapter "Output Driver AC Characteristics" that HSIO drivers (use in SDMMCx and QSPI0 peripherals), don't have a slewrate setting but are rather calibrated against an external 1% resistor mounted on the SDMMCx_CAL or QSPI0_CAL pins. Depending on the target signal frequency and the external load, it is possible to adjust their target output impedance. Thus set slew-rate = <0> for SDMMC (QSPI is not enabled at the moment in device tree). Fixes: 7540629e ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210915074836.6574-3-claudiu.beznea@microchip.com
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Claudiu Beznea authored
Datasheet chapter "EMAC Timings" specifies that while in 3.3V domain GMAC's MDIO pins should be configured with slew-rate enabled, while the data + signaling pins should be configured with slew-rate disabled when GMAC works in RGMII or RMII modes. The pin controller for SAMA7G5 sets the slew-rate as enabled for all pins. Adapt the device tree to comply with these. Fixes: 7540629e ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by:
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Claudiu Beznea authored
In suspend/resume procedure for AT91 architecture different controllers (PMC, SHDWC, RAM, RAM PHY, SFRBU) are accessed to do the proper settings for power saving. Commit f0bbf179 ("ARM: at91: pm: add self-refresh support for sama7g5") introduced the access to RAMC PHY controller for SAMA7G5. The access to this controller is done after RAMC ports are closed, thus any TLB walk necessary for RAMC PHY virtual address will fail. In the development branch this was not encountered. However, on current kernel the issue is reproducible. To solve the issue the previous mechanism of pre-loading the TLB with the RAMC PHY virtual address has been used. However, only the addition of this new pre-load breaks the functionality for ARMv5 based devices (SAM9X60). This behavior has been encountered previously while debugging this code and using the same mechanism for pre-loading address for different controllers (e.g. pin controller, the assumption being that other requested translations are replaced from TLB). To solve this new issue the TLB flush + the extension of pre-loading the rest of controllers to TLB (e.g. PMC, RAMC) has been added. The rest of the controllers should have been pre-loaded previously, anyway. Fixes: f0bbf179 ("ARM: at91: pm: add self-refresh support for sama7g5") Depends-on: e42cbbe5 ("ARM: at91: pm: group constants and addresses loading") Signed-off-by:
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Claudiu Beznea authored
Group constants and addresses loading. This commit prepares the field for the next one. Signed-off-by:
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Claudiu Beznea authored
SAMA7G5-EK board has DDR3L type of memory soldered. This needs 1.35V. The 1.35V for DDR3L rail at run-time is selected by the proper configuration on SELV2 pin (for 1.35V it needs to be in high-z state). When suspended the MCP16502 PMIC soldered on SAMA7G5-EK will use different sets of configuration registers to provide proper voltages on its rail. Run-time configuration registers could be configured differently than suspend configuration register for MCP16502 (VSEL2 affects only run-time configuration). In suspend states the DDR3L memory soldered on SAMA7G5-EK switches to self-refresh. Even on self-refresh it needs to be powered by a 1.35V rail. Thus, make sure the PMIC is configured properly when system is suspended. Fixes: 7540629e (ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek") Signed-off-by:
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- 26 Sep, 2021 1 commit
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Rob Herring authored
Commit 078fb7aa ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped. As the 'interrupt-map' properties are all just duplicates across boards, just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden. Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org Fixes: 078fb7aa ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") Cc: Guillaume Tucker <guillaume.tucker@collabora.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Reported-by:
Reported-by: "kernelci.org bot" <bot@kernelci.org> Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com>
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- 24 Sep, 2021 4 commits
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Shawn Guo authored
It adds the missing a2noc clocks required for QoS registers programming per downstream kernel[1]. [1] https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/sdm660-bus.dtsi?h=LA.UM.8.2.r1-04800-sdm660.0#n43 Fixes: 045547a0 ("arm64: dts: qcom: sdm630: Add interconnect provider nodes") Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Acked-by:
Georgi Djakov <djakov@kernel.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210824043435.23190-4-shawn.guo@linaro.org
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Dmitry Baryshkov authored
Enable powerkey and resin nodes to let the board handle POWER and Volume- keys properly. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by:
Amit Pundir <amit.pundir@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Specify recovery and bootloader magic values to be programmed by the qcom-pon driver. This allows the bootloader to handle reboot-to-bootloader functionality. Signed-off-by:
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Dmitry Baryshkov authored
Change pm8150 to use the qcom,pm8998-pon compatible string for the pon in order to pass reboot mode properly. Fixes: 5101f22a ("arm64: dts: qcom: pm8150: Add base dts file") Signed-off-by:
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- 20 Sep, 2021 5 commits
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Stephen Boyd authored
This should be the dai for display port. Without this set properly we fail to get audio routed through external displays on trogdor. It looks like we picked up v4[1] of this patch when there was a v7[2]. The v7 patch still had the wrong sound-dai but at least we can fix all this up and audio works. Cc: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Cc: Douglas Anderson <dianders@chromium.org> Fixes: b22d313e ("arm64: dts: qcom: sc7180-trogdor: Add lpass dai link for HDMI") Link: https://lore.kernel.org/r/20210721080549.28822-3-srivasam@qti.qualcomm.com [1] Link: https://lore.kernel.org/r/20210726120910.20335-3-srivasam@codeaurora.org [2] Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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David Heidelberg authored
The legacy clock names (including the _clk suffix) was dropped from the driver, so update the dts accordingly). Tested on Nexus 7 2013, no functional changes. Signed-off-by:
David Heidelberg <david@ixit.cz> [bjorn: Updated commit message] Signed-off-by:
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Geert Uytterhoeven authored
The Qualcomm Secure Channel Manager (SCM) is only present on Qualcomm SoCs. All drivers using it select QCOM_SCM, and depend on ARCH_QCOM. Until recently, QCOM_SCM was an invisible symbol, but this was changed by adding loadable module support, exposing it to all ARM and ARM64 users. Hence add a dependency on ARCH_QCOM, to prevent asking the user about this driver when configuring a kernel without Qualcomm SoC support. While at it, drop the dependency on ARM || ARM64, as that is implied by HAVE_ARM_SMCCC. Fixes: b42000e4 ("firmware: qcom_scm: Allow qcom_scm driver to be loadable as a permenent module") Fixes: 2954a6f1 ("firmware: qcom-scm: Fix QCOM_SCM configuration") Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
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Shawn Guo authored
PT_LOAD type denotes that the segment should be loaded into the final firmware memory region. Hash segment is not one such, because it's only needed for PAS init and shouldn't be in the final firmware memory region. That's why mdt_phdr_valid() explicitly reject non PT_LOAD segment and hash segment. This actually makes the hash segment type check in qcom_mdt_read_metadata() unnecessary and redundant. For a hash segment, it won't be loaded into firmware memory region anyway, due to the QCOM_MDT_TYPE_HASH check in mdt_phdr_valid(), even if it has a PT_LOAD type for some reason (misusing or abusing?). Some firmware files on Sony phones are such examples, e.g WCNSS firmware of Sony Xperia M4 Aqua phone. The type of hash segment is just PT_LOAD. Drop the unnecessary hash segment type check in qcom_mdt_read_metadata() to fix firmware loading failure on these phones, while hash segment is still kept away from the final firmware memory region. Fixes: 498b98e9 ("soc: qcom: mdt_loader: Support loading non-split images") Signed-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by:
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Amit Pundir authored
Upstream commit 2e01e0c2 ("arm64: dts: qcom: sdm850-yoga: Enable IPA") shuffled reserved memory regions in sdm845.dtsi to make firmware loading succeed and enable the ipa device on sdm845-yoga but it broke the other common users of those memory regions like Xiaomi Pocophone F1. So this patch effectively revert those upstream commit changes and move all the relevant changes to sdm850-lenovo-yoga-c630.dts instead. Fixes: 2e01e0c2 ("arm64: dts: qcom: sdm850-yoga: Enable IPA") Signed-off-by:
Steev Klimaszewski <steev@kali.org> Tested-by:
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- 17 Sep, 2021 1 commit
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Rob Herring authored
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as 'simple-bus' child nodes must have a unit-address. The 'ranges' handling is also wrong (or at least strange) as the mapping of SMC chip selects should be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus' node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges' should be moved down a level. The latter change is more simple, so let's do that. As the 'ranges' value doesn't vary for a given motherboard instance, we can move 'ranges' into the motherboard dtsi files. Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org Cc: Andre Przywara <andre.przywara@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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- 14 Sep, 2021 16 commits
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Arnd Bergmann authored
Merge tag 'at91-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes AT91 fixes #1 for 5.15: - Fixes for newly introduced SAMA7G5 and its Power Management code. Associated core peripherals need to be instantiated in DT for benefiting from best PM support like Backup mode with DDR in Self-Refresh. - Add chip ID for SAMA7G5 for easing the kernel log identification. - Avoid Camera Sensor probe error on sama5d27 som1 ek board. * tag 'at91-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d2_som1_ek: disable ISC node by default ARM: at91: pm: switch backup area to vbat in backup mode ARM: dts: at91: sama7g5: add chipid ARM: dts: at91: sama7g5: add shdwc node ARM: dts: at91: sama7g5: add securam node ARM: dts: at91: sama7g5: add ram controllers ARM: at91: pm: do not panic if ram controllers are not enabled Link: https://lore.kernel.org/r/20210914162314.54347-1-nicolas.ferre@microchip.comSigned-off-by:
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Romain Perier authored
As proposed by Daniel, I am going to help him to maintain the platform, so add myself as co-maintainer. Signed-off-by:
Romain Perier <romain.perier@gmail.com> Acked-by:
Daniel Palmer <daniel@thingy.jp> Link: https://lore.kernel.org/r/20210910190322.27058-5-romain.perier@gmail.com' Signed-off-by:
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Eugen Hristev authored
Without a sensor node, the ISC will simply fail to probe, as the corresponding port node is missing. It is then logical to disable the node in the devicetree. If we add a port with a connection to a sensor endpoint, ISC can be enabled. Signed-off-by:
Eugen Hristev <eugen.hristev@microchip.com> Signed-off-by:
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Claudiu Beznea authored
Backup area is now switched to VDDIN33 at boot (with the help of bootloader). When switching to backup mode we need to switch backup area to VBAT as all the other power sources are cut off. The resuming from backup mode is done with the help of bootloader, so there is no need to do something particular in Linux to restore backup area power source. Signed-off-by:
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Claudiu Beznea authored
Add chipid node for sama7g5. Signed-off-by:
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Claudiu Beznea authored
Add shutdown controller node and enable it. Signed-off-by:
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Claudiu Beznea authored
Add securam node. Signed-off-by:
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Claudiu Beznea authored
Add RAM and RAMC PHY controllers. These are necessary for platform specific power management code. Signed-off-by:
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Claudiu Beznea authored
In case PM is enabled but there is no RAM controller information in DT the code will panic. Avoid such scenarios by not initializing platform specific PM code in case RAM controller is not provided via DT. Reported-by:
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Joel Stanley authored
DRM_FBDEV_EMULATION previously selected FB and was default y as long as DRM was enabled. In commit f611b1e7 ("drm: Avoid circular dependencies for CONFIG_FB") the select was replaced with a depends on FB, disabling the drivers that depended on it. Renable FB so we get back FB_EFI, FB_WM8505, FB_SH_MOBILE_LCDC, FB_SIMPLE and VIDEO_VIVID. It must be set to y and not a module as the test driver VIDEO_VIVID requires it to be built in. Link: https://lore.kernel.org/r/CAK8P3a18EdBKQdGDOZc9cPKsf=hY8==v2cO0DBE_tyd82Uq-Ng@mail.gmail.comSigned-off-by:
Joel Stanley <joel@jms.id.au> Reviewed-by:
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Joel Stanley authored
Some drivers have not been built as they gained dependencies in kconfig but those dependencies were not added to the defconfig. The MSM pinctrl drivers fell out of the defconfig as of commit be117ca3 ("pinctrl: qcom: Kconfig: Rework PINCTRL_MSM to be a depenency rather then a selected config"). Add PINCTRL_MSM so these stay enabled. EDAC depends on RAS, so enable it to ensure the EDAC drivers stay enabled. Signed-off-by:
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Rob Herring authored
Based on 'ranges', the 'bus@4000000' node unit-address is off by 1 '0'. Link: https://lore.kernel.org/r/20210819184239.1192395-5-robh@kernel.org Cc: Andre Przywara <andre.przywara@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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Rob Herring authored
Drop the '#interrupt-cells' property in the motherboard node which has no effect as the node is neither an interrupt-controller or interrupt-map (that's in the parent node). Drop 'model' as it is not used by software nor documented. Drop 'arm,v2m-memory-map' as it is not used by software. The purpose was to describe which memory map, but that's all described by the DT already. Link: https://lore.kernel.org/r/20210819184239.1192395-4-robh@kernel.org Cc: Andre Przywara <andre.przywara@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
The arm,mhu bindings and driver do not define interrupt-names, so drop the property to fix warnings: arch/arm64/boot/dts/arm/juno-r2.dt.yaml: mhu@2b1f0000: 'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+' Link: https://lore.kernel.org/r/20210820081733.83976-3-krzysztof.kozlowski@canonical.comAcked-by:
Liviu Dudau <liviu.dudau@arm.com> Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by:
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Krzysztof Kozlowski authored
Align the watchdog and mmc device node names with the schema to fix warnings like: mmci@50000: $nodename:0: 'mmci@50000' does not match '^mmc(@.*)?$' wdt@f0000: $nodename:0: 'wdt@f0000' does not match '^watchdog(@.*|-[0-9a-f])?$' Link: https://lore.kernel.org/r/20210820081733.83976-2-krzysztof.kozlowski@canonical.comAcked-by:
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Krzysztof Kozlowski authored
Align the watchdog and mmc device node names with the schema to fix warnings like: mmci@50000: $nodename:0: 'mmci@50000' does not match '^mmc(@.*)?$' wdt@f0000: $nodename:0: 'wdt@f0000' does not match '^watchdog(@.*|-[0-9a-f])?$' Link: https://lore.kernel.org/r/20210820081733.83976-1-krzysztof.kozlowski@canonical.comAcked-by:
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