- 20 Apr, 2020 40 commits
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Andy Shevchenko authored
There is nothing which needs a set of OF headers, followed by redundant OF node ID check. Drop them for good. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Andy Shevchenko authored
When compiled with CONFIG_ACPI=n, ACPI_PTR() will be no-op, and thus genet_acpi_match table defined, but not used. Compiler is not happy about such data. Drop ACPI_PTR() for good. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linuxDavid S. Miller authored
Saeed Mahameed says: ==================== mlx5-updates-2020-04-20 This series includes misc updates and clean ups to mlx5 driver: 1) improve some comments from Hu Haowen. 2) Handles errors of netif_set_real_num_{tx,rx}_queues, from Maxim 3) IPsec and FPGA related code cleanup to prepare for ASIC devices IPsec offloads, from Raed 4) Allow partial mask for tunnel options, from Roi. ==================== Signed-off-by: -
Heiner Kallweit authored
A barrier is needed here to ensure that rtl_tx sees the descriptor changes (DescOwn set) before the updated tp->cur_tx value. Else it may wrongly assume that the transfer has been finished already. For this purpose smp_wmb() is sufficient. No separate barrier is needed for ordering the descriptor changes with the MMIO doorbell write. The needed barrier is included in the non-relaxed writel() used by rtl8169_doorbell(). Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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Hu Haowen authored
Replaced "its" with "it's". Signed-off-by:
Hu Haowen <xianfengting221@163.com> Signed-off-by:
Saeed Mahameed <saeedm@mellanox.com>
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Parav Pandit authored
Embedded CPU bit doesn't change with PCI resume/suspend. Hence read it only once while probing the PCI device. Signed-off-by:
Parav Pandit <parav@mellanox.com> Reviewed-by:
Bodong Wang <bodong@mellanox.com> Signed-off-by:
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Maxim Mikityanskiy authored
netif_set_real_num_tx_queues and netif_set_real_num_rx_queues may fail. Now that mlx5e supports handling errors in the preactivate hook, this commit leverages that functionality to handle errors from those functions and roll back all changes on failure. Signed-off-by:
Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by:
Tariq Toukan <tariqt@mellanox.com> Signed-off-by:
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Roi Dayan authored
We use mapping to save and restore the tunnel options. Save also the tunnel options mask. Signed-off-by:
Roi Dayan <roid@mellanox.com> Reviewed-by:
Paul Blakey <paulb@mellanox.com> Signed-off-by:
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Tariq Toukan authored
In notify HW (ring doorbell) flow, we set the bit to request a completion on the TX descriptor. When doing so, we should not unset other bits in the same byte. Currently, this does not fix a real issue, as we still don't have a flow where both MLX5_WQE_CTRL_CQ_UPDATE and any adjacent bit are set together. Fixes: 542578c6 ("net/mlx5e: Move helper functions to a new txrx datapath header") Fixes: 864b2d71 ("net/mlx5e: Generalize tx helper functions for different SQ types") Signed-off-by:
Aya Levin <ayal@mellanox.com> Signed-off-by:
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Raed Salem authored
Currently the SA handle is created and managed as part of the common code for different IPsec supporting HW, this handle is passed to HW to be used on Rx to identify the SA handle that was used to return the xfrm state to stack. The above implementation pose a limitation on managing this handle. Refactor by moving management of this field to the specific HW code. Downstream patches will introduce the Connect-X support for IPsec that will use this handle differently than current implementation. Signed-off-by:
Raed Salem <raeds@mellanox.com> Reviewed-by:
Boris Pismenny <borisp@mellanox.com> Reviewed-by:
Huy Nguyen <huyn@mellanox.com> Signed-off-by:
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Raed Salem authored
The current HW counters are supported only by Innova, split the ipsec stats group into two groups, one for HW and one for SW. And expose the HW counters to ethtool only if Innova HW is used for IPsec offload. Signed-off-by:
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Raed Salem authored
Currently the FPGA IPsec is the only hw implementation of the IPsec acceleration api, and so the mlx5_accel_esp_create_hw_context was wrongly made to suit this HW api, among other in its parameter list and some of its parameter endianness. This implementation might not be suitable for different HW. Refactor by group and pass all function arguments of mlx5_accel_esp_create_hw_context in common mlx5_accel_esp_xfrm_attrs struct field of mlx5_accel_esp_xfrm struct and correct the endianness according to the HW being called. Signed-off-by:
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Raed Salem authored
The cited commit relies on include <net/geneve.h> being included implicitly prior to include "en_accel/en_accel.h". This mandates that all files that needs to include en_accel.h to redantantly include net/geneve.h. Include net/geneve.h explicitly at "en_accel/en_accel.h" to avoid undesired constrain as above. Fixes: e3cfc7e6 ("net/mlx5e: TX, Add geneve tunnel stateless offload support") Signed-off-by:
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Raed Salem authored
Currently the IPsec acceleration capability function is also used at IPsec fpga capable device code. This could cause a future bug as the acceleration layer is agnostic to the device implementing its API. Fix by using the IPsec FPGA capability function instead of acceleration layer capability function in case of FPGA IPsec only related operations. Downstream patches will add support for Connect-X IPsec, this can avoid a future bug. Signed-off-by:
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Jason Yan authored
Fix the following coccicheck warning: drivers/net/ethernet/qlogic/qed/qed_dev.c:4395:2-34: WARNING: Assignment of 0/1 to bool variable drivers/net/ethernet/qlogic/qed/qed_dev.c:1975:2-34: WARNING: Assignment of 0/1 to bool variable Signed-off-by:
Jason Yan <yanaijie@huawei.com> Acked-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by:
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David S. Miller authored
Huazhong Tan says: ==================== net: hns3: misc updates for -next This patchset includes some misc updates for the HNS3 ethernet driver. [patch 1&2] separates two bloated function. [patch 3-5] removes some redundant code. [patch 6-7] cleans up some coding style issues. [patch 8-10] adds some debugging information. Change log: V1->V2: removes an unnecessary initialization in [patch 1] which suggested by David Miller. modified some print format issue and commit log in [patch 8]. ==================== Signed-off-by: -
Yufeng Mo authored
This patch adds trace event support for PF/VF mailbox. Signed-off-by:
Yufeng Mo <moyufeng@huawei.com> Signed-off-by:
Huazhong Tan <tanhuazhong@huawei.com> Signed-off-by:
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Yufeng Mo authored
This patch adds support for dumping MAC reg in debugfs, which will be helpful for debugging. Signed-off-by:
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Guojia Liao authored
Adds some debug information for failures of processing flow table, removes the redundant printing when hclge_fd_check_spec() returns error, and modifies the printing level for FD not enable error. Signed-off-by:
Guojia Liao <liaoguojia@huawei.com> Signed-off-by:
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Huazhong Tan authored
This patch removes some unnecessary blank lines, redundant parentheses, and changes one tab to blank in hclge_dbg_dump_reg_common(). Signed-off-by:
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Guojia Liao authored
In hclge_set_fd_key_config(), parameter 'stage' should be as enum HCLGE_FD_STAGE, and in hclge_config_key(), 'tuple_size' should be type u8, also simplify unsigned int with u32 for 'i'. Signed-off-by:
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Guojia Liao authored
struct hclge_mac_vlan_remove_cmd and hclge_mac_vlan_add_cmd are unused. So removes them from hclge_cmd.h. Signed-off-by:
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Guojia Liao authored
proto_support field in struct hclge_fd_cfg shows what protocols in flow direct table are supported now. It is unnecessary since checking which one is unsupported will be more efficient, so this patch removes it. Signed-off-by:
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Huazhong Tan authored
Since case default has included case 0, so removes this redundant case 0. Signed-off-by:
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Jian Shen authored
hclge_get_fd_rule_info() is bloated, this patch separates it into several standalone functions for readability and maintainability. Signed-off-by:
Jian Shen <shenjian15@huawei.com> Signed-off-by:
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Jian Shen authored
For readability and maintainability, this patch separates the handling part of each flow type in hclge_fd_check_ether_tuple() into standalone functions. Signed-off-by:
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David S. Miller authored
Andrew Lunn says: ==================== RFC 2863 Testing Oper status This patchset add support for RFC 2863 Oper status testing. An interface is placed into this state when a self test is performed using ethtool. v2: Fix date/kernel version in Documentation Add reviewed-by tags ==================== Signed-off-by: -
Andrew Lunn authored
When an interface is executing a self test, put the interface into operative status testing. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Reviewed-by:
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Andrew Lunn authored
Similar to speed, duplex and dorment, report the testing status in sysfs. Signed-off-by:
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Andrew Lunn authored
RFC 2863 defines the operational state testing. Add support for this state, both as a IF_LINK_MODE_ and __LINK_STATE_. Signed-off-by:
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David S. Miller authored
Andrew Lunn says: ==================== FEC MDIO speedups This patchset gives a number of speedups for MDIO with the FEC. Replacing interrupt driven with polled IO brings a big speedup due to the overheads of interrupts compared to the short time interval. Clocking the bus faster, when the MDIO targets supports it, can double the transfer rate. And suppressing the preamble, if devices support it, makes each transaction faster. By default the MDIO clock remains 2.5MHz and preables are used. But these can now be controlled from the device tree. Since these are generic properties applicable to more than just FEC, these have been added to the generic MDIO binding documentation. v2: readl_poll_timeout() Add patches to set bus frequency and preamble disable v3: Add Reviewed tags uS->us readl_poll_timeout_atomic() Extend DT binding documentation ==================== Acked-by:
Fugang Duan <fugang.duan@nxp.com> Signed-off-by:
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Andrew Lunn authored
An MDIO transaction normally starts with 32 1s as a preamble. However not all devices requires such a preamble. Add a device tree property which allows the preamble to be suppressed. This will half the size of the MDIO transaction, allowing faster transactions. But it should only be used when all devices on the bus support suppressed preamble. Suggested-by:
Chris Healy <Chris.Healy@zii.aero> Signed-off-by:
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Andrew Lunn authored
MDIO busses typically operate at 2.5MHz. However many devices can operate at faster speeds. This then allows more MDIO transactions per second, useful for Ethernet switch statistics, or Ethernet PHY TDR data. Allow the bus speed to be configured, using the standard "clock-frequency" property, which i2c busses use to indicate the bus speed. Before using this property, ensure all devices on the bus do actually support the requested clock speed. Suggested-by:
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Andrew Lunn authored
Measurements of the MDIO bus have shown that driving the MDIO bus using interrupts is slow. Back to back MDIO transactions take about 90us, with 25us spent performing the transaction, and the remainder of the time the bus is idle. Replacing the completion interrupt with polled IO results in back to back transactions of 40us. The polling loop waiting for the hardware to complete the transaction takes around 28us. Which suggests interrupt handling has an overhead of 50us, and polled IO nearly halves this overhead, and doubles the MDIO performance. Suggested-by:
Chris Heally <cphealy@gmail.com> Signed-off-by:
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Heiner Kallweit authored
Inline rtl8169_make_unusable_by_asic() and simplify it: - Address field doesn't need to be poisoned because descriptor is owned by CPU now - desc->opts1 is set by rtl8169_mark_to_asic() and rtl8169_rx_fill(), therefore we don't have to preserve any field parts. Signed-off-by:
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Heiner Kallweit authored
rtl8169_mark_as_last_descriptor() has just one user, so inline it. Signed-off-by:
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git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queueDavid S. Miller authored
Jeff Kirsher says: ==================== 1GbE Intel Wired LAN Driver Updates 2020-04-19 This series contains updates to e1000e and igc only. Sasha adds new device IDs supported by the igc driver. Vitaly fixes the S0ix entry and exit flows in e1000e for TGP and newer MAC types when a cable is connected. Andre has the remaining changes in the series, starting with cleanup of the igc driver of duplicate code. Added a check for IGC_MAC_STATE_SRC_ADDR flag which is unsupported for MAC filters in igc. Cleaned up the return values for igc_add_mac_filter(), where the return value was not being used, so update the function to only return success or failure. Fix the return value of igc_uc_unsync() as well. Refactor the igc driver in several functions to help reduce the convoluted logic and simplify the driver filtering mechanisms. Improve the MAC address checks when adding a MAC filter. Lastly, improve the log messages related to MAC address filtering to ease debugging. ==================== Signed-off-by: -
Aishwarya Ramakrishnan authored
Remove casting the values returned by memory allocation function. Coccinelle emits WARNING: casting value returned by memory allocation function to struct pointer is useless. This issue was detected by using the Coccinelle. Signed-off-by:
Aishwarya Ramakrishnan <aishwaryarj100@gmail.com> Acked-by: Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by:
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Aishwarya Ramakrishnan authored
Remove casting the values returned by memory allocation function. Coccinelle emits WARNING: casting value returned by memory allocation function to (struct cas_init_block *) is useless. This issue was detected by using the Coccinelle software. Signed-off-by:
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Dejin Zheng authored
use devm_platform_get_and_ioremap_resource() to simplify code, which contains platform_get_resource() and devm_ioremap_resource(), it also get the resource for use by the following code. Signed-off-by:
Dejin Zheng <zhengdejin5@gmail.com> Signed-off-by:
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