Merge tag 'vexpress-drm-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt

Versatile Express DTS update for DRM:
This updates the Versatile Express family DTS files to
contain the correct and detailed information required
for the PL11x DRM driver to work properly.

* tag 'vexpress-drm-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: Modernize the Vexpress PL111 integration
Signed-off-by: Olof Johansson <olof@lixom.net>

Despite Marvel keeps their base addresses secret there's a good chance
they're actually correct.

SSP1 and SSP3 bases were taken from OLPC 1.75: OpenFirmware and kernel
respectively. SSP2 and SSP4 addresses are from James Cameron who actually
has a copy of the data sheet.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

The USB OTG PHY chip. To be used by the OTG controller.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

I've gotten the base addresses, clocks and interrupts from an rusty and old
out-of-tree driver. I haven't actually checked against the datasheet, since
that one is reserved for the Marvell inner circle.

Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

Marvell keeps their MMP2 datasheet secret, but there are good clues
that TWSI2 is not on 0xd4025000 on that platform, not does it use
IRQ 58. In fact, the IRQ 58 on MMP2 seems to be a signal processor:

   arch/arm/mach-mmp/irqs.h:#define IRQ_MMP2_MSP  58

I'm taking a somewhat educated guess that is probably a copy & paste
error from PXA168 or PXA910 and that the real controller in fact hides
at address 0xd4031000 and uses an interrupt line multiplexed via IRQ 17.

I'm also copying some properties from TWSI1 that were missing or
incorrect.

Tested on a OLPC XO 1.75 machine, where the RTC is on TWSI2.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

There's apparently four of them on a MMP2.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

The timer needs the timer clock to be enabled, otherwise it stops
ticking.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

This will be useful for boards that actually use GPIO pins.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

gpio-pxa uses two cell to encode the interrupt source: the pin number
and the trigger type. Adjust the device node accordingly.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

The timer needs the timer clock to be enabled, otherwise it stops
ticking.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'socfpga_dts_updates_for_v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

SoCFPGA DTS updates for v5.0
- Use SPDX license identifier for all SoCFPGA DTS files.
- Remove dma-mask property as it has been deprecated.
- Use tabs in DTS files.
- Use the specific "altr,stratix10-rst-mgr" property for the Stratix10
  reset manager.

* tag 'socfpga_dts_updates_for_v5.0' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: stratix10: use "altr,stratix10-rst-mgr" binding
  ARM: dts: socfpga: use tabs for indentation
  arm: dts: socfpga: remove dma-mask property
  arm: dts: socfpga*.dts*: use SPDX-License-Identifier
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-arm64-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM64 Based SoC DT Updates for v4.21

* H3 (r8a7795) SoC:
  - Remove unneeded sound #address/size-cells

* M3-W (r8a7796) SoC:
  - Describe CMT (Compare Match Timer) devices in DT
  - Describe I2C-DVFS device node in DT

* M3-N (r8a77965) SoC:
  - Describe CAN, CANFD and LVDS in DT

* R-Car H3 (r8a7795) and M3-W (r8a7796) SoCs:
  - Describe CPU topology, capacity and cooling maps in DT
  - Add SSIU support to R-Car audio

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs:
  - Extend register range of HSUSB device to match documentation

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) based
  Salvator-X, Salvator-XS and ULCB boards:
  - Switch eMMC bus to 1V8

* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) based
  Salvator-X and Salvator-XS boards:
  - Describe USB3.0 xHCI host and prerepheral devices as companions

* R-Car E3 (r8a77990) SoC:
  - Add thermal support
  - Add support for interupt controller for external devices (INTC-EX)
  - Describe all SCIF devices and SYS-DMA for I2C and MSIOF devices

* R-Car E3 (r8a77990) based Ebisu board:
  - Enable SDHI, CAN, CANFD, audio and USB3.0
  - Describe serial console pins

* R-Car E3 (r8a77990) based Ebisu and
  R-Car D3 (r8a77995) based Draak board:
  - Enable USB2.0 peripheral device

* R-Car M3-N (r8a77965), E3 (r8a77990) and V3H (r8a77980) SoCs:
  - Connect EtherAVB to IPMMU

* R-Car V3M (r8a77970) and V3H (r8a77980) SoCs:
  - Describe TMU (timer unit), PWM timer controller and MSIOF devides in DT
  - Add thermal support

* RZ/G2M (r8a774a1) SoC:
  - Use clock and power index macros
  - Describe VIN, CSI-2 and CAN devices in DT

* tag 'renesas-arm64-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (40 commits)
  arm64: dts: renesas: Add all CPUs in cooling maps
  arm64: dts: renesas: r8a77990: add thermal device support
  arm64: dts: renesas: r8a77990: Enable I2C DMA
  arm64: dts: renesas: r8a7796: Add CMT device nodes
  arm64: dts: renesas: r8a7796: add SSIU support for sound
  arm64: dts: renesas: r8a77990: Add I2C-DVFS device node
  arm64: dts: renesas: r8a77990: ebisu: Add and enable CAN,FD device nodes
  arm64: dts: renesas: r8a77965: Add CAN and CANFD controller nodes
  arm64: dts: renesas: r8a77990: ebisu: Add and enable PCIe device node
  arm64: dts: renesas: Add CPU capacity-dmips-mhz
  arm64: dts: renesas: Add CPU topology on R-Car Gen3 SoCs
  arm64: dts: renesas: r8a774a1: Replace clock magic numbers
  arm64: dts: renesas: r8a774a1: Replace power magic numbers
  arm64: dts: renesas: r8a7795: add SSIU support for sound
  arm64: dts: renesas: r8a77990: Fix VIN endpoint numbering
  arm64: dts: renesas: ebisu: Add and enable SDHI device nodes
  arm64: dts: renesas: ebisu: Add serial console pins
  arm64: dts: renesas: Switch eMMC bus to 1V8 on Salvator-X and ULCB
  arm64: dts: renesas: r8a77990: Add all HSCIF nodes
  arm64: dts: renesas: r8a779{7|8}0: add TMU support
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-arm-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Renesas ARM Based SoC DT Updates for v4.21

* RZ/N1D (r9a06g032) SoC:
  - Correct GIC DT node name
  - Enable pin controller

* RZ/G1C (r8a77470) iWave g23S single board computer
  - Add QSPI flash support
  - Add pinctl support for EtherAVB
  - Enable CMT0 (Renesas R-Car Compare Match Timer)
  - Enable RWDT (Renesas Watchdog Timer)
  - Enable uSD and eMMC support

* RZ/G1C (r8a77470) SoC:
  - Describe USB-DMAC and I2C devices in DT

* R-Mobile A1 (r8a7740), Emma Mobile EV2 (emev2) and
  SH-Mobile AG5 (sh72a0) SoCs:
  - Include SoC name in DTSI

* R-Car H2 (r8a7790) based lager, and
  R-Car M2-W (r8a7791) based koelsch and porter boards:
  - Disable unconnected LVDS encoders

* tag 'renesas-arm-dt-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: dts: r9a06g032: Correct the GIC DT node name
  ARM: dts: iwg23s-sbc: Add QSPI flash support
  ARM: dts: r8a77470: Add QSPI support
  ARM: dts: iwg23s-sbc: Add pinctl support for EtherAVB
  ARM: dts: iwg23s-sbc: Enable cmt0
  ARM: dts: r8a77470: Add CMT SoC specific support
  ARM: dts: r8a77470: Add USB-DMAC device nodes
  ARM: dts: iwg23s-sbc: Enable watchdog support
  ARM: dts: r8a77470: Add watchdog support to SoC dtsi
  ARM: dts: r8a7740, emev2, sh73a0: Include SoC name in DTSI
  ARM: dts: r8a779[01]: Disable unconnected LVDS encoders
  ARM: dts: iwg23s-sbc: Add uSD and eMMC support
  ARM: dts: r8a77470: Add SDHI1 support
  ARM: dts: r8a77470: Add SDHI0 support
  ARM: dts: r8a77470: Add I2C[0123] support
  ARM: dts: r9a06g032: Add pinctrl node
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.21-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

New dts for Gru-Scarlet (tablet device), default backlight brightness
for all Gru devices, rk3399 spi dma properties, some improvements for
the rk3399-sapphire board (fan, chosen, backlight), hs200 mode for the
emmc on the rock64 and declaring all cpu cores in the cooling maps
instead of just cpu0.

* tag 'v4.21-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Add all CPUs in cooling maps
  arm64: dts: rockchip: add Gru Scarlet devicetrees
  arm64: dts: rockchip: move backlight from rk3399 sapphire to excavator
  arm64: dts: rockchip: Use default brightness table for rk3399-gru
  arm64: dts: rockchip: add chosen node on rk3399-sapphire
  arm64: dts: rockchip: enable HS200 for eMMC on rock64
  arm64: dts: rockchip: add fan on rk3399-sapphire board
  arm64: dts: rockchip: add rk3399 SPI DMAs
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Powerdomain and QoS nodes for rk3066 and rk3188. A fix for a rock2
regulator name and referencing all cpus in the cooling maps instead
of only cpu0.

* tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Add all CPUs in cooling maps
  ARM: dts: rockchip: Fix rk3288-rock2 vcc_flash name
  ARM: dts: rockchip: add rk3066/rk3188 power-domains
  ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188
  dt-bindings: add power-domain header for RK3066 SoCs
  dt-bindings: add power-domain header for RK3188 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'vexpress-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt

ARMv7 Vexpress updates for v4.20

Single patch to use updated coresight graph bindings thereby removing
loads of dtc warnings

* tag 'vexpress-updates-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  ARM: dts: vexpress/TC2: Update entries to match latest coresight bindings
Signed-off-by: Olof Johansson <olof@lixom.net>

The Versatile Express was submitted with the actual display
bridges unconnected (but defined in the device tree) and
mock "panels" encoded in the device tree node of the PL111
controller.

This doesn't even remotely describe the actual Versatile
Express hardware. Exploit the SiI9022 bridge by connecting
the PL111 pads to it, making it use EDID or fallback values
to drive the monitor.

The  also has to use the reserved memory through the
CMA pool rather than by open coding a memory region and
remapping it explicitly in the driver. To achieve this,
a reserved-memory node must exist in the root of the
device tree, so we need to pull that out of the
motherboard .dtsi include files, and push it into each
top-level device tree instead.

We do the same manouver for all the Versatile Express
boards, taking into account the different location of the
video RAM depending on which chip select is used on
each platform.

This plays nicely with the new PL111 DRM driver and
follows the standard ways of assigning bridges and
memory pools for graphics.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Mali DP Maintainers <malidp@foss.arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Tested-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The standard reset-simple driver the uses the "altr,rst-mgr" binding is
not getting initialized early enough in the boot process, so timers
that the kernel needs are still left in reset. Thus an early
reset driver was created. This early reset driver is only for the
SoCFPGA 32-bit platform.

The Stratix10 platform does not need any of the timers that in reset to
boot, thus we don't need to early reset driver. Therefore, use the
"altr,stratix10-rst-mgr" binding for the reset-simple platform driver on
the Stratix10 platform.

Also remove the "altr,modrst-offset" property because the driver no
longer needs it.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

In two of the gen5 socfpga devicetree files, there are some lines
indented using spaces instead of tabs.

Fix this by correctly indenting them with tabs.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

The dma-mask property has been removed from the NAND driver. Remove the
property from the DTS files.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Follow the recent trend for the license description.

This is also in an effort to fully sync the devicetrees with U-Boot.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

Harmless mistake, but it's incorrect. The DT spec provides recommendations
for the node names:
"The name of a node should be somewhat generic, reflecting the function
of the device and not its precise programming model. If appropriate, the
name should be one of the following choices:
...
interrupt-controller"
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This commit adds QSPI flash support to the iwg23s board specific
device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add QSPI[01] support to the RZ/G1C SoC specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Adding pinctrl support for EtherAVB interface.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch enables cmt0 support on the iWave iwg23s sbc.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add CMT[01] support to r8a77470 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds USB DMAC nodes.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch enables watchdog support on the iWave iwg23s sbc.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds watchdog support to the r8a77470 SoC dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
[simon: moved node to preserve sort order]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Update the R-Mobile A1 (r8a7740), Emma Mobile EV2 (emev2) and
SH-Mobile AG5 (sh72a0) DTSI to include product name.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
[simon: squashed similar patches]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The LVDS0 encoder on Koelsh and Porter, and the LVDS1 encoder on Lager,
are enabled in DT but have no device connected to their output. This
result in spurious messages being printed to the kernel log such as

rcar-du feb00000.display: no connector for encoder /soc/lvds@feb90000, skipping

Fix it by disabling the encoders.

Fixes: 15a1ff30 ("ARM: dts: r8a7790: Convert to new LVDS DT bindings")
Fixes: e5c3f470 ("ARM: dts: r8a7791: Convert to new LVDS DT bindings")
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add uSD card and eMMC support to the iwg23s single board
computer powered by the RZ/G1C SoC (a.k.a. r8a77470).
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Althought interface SDHI1 found on the RZ/G1C SoC (a.k.a.
r8a77470) is compatible with the R-Car Gen3 ones, its OF
compatibility is restricted to the SoC specific compatible
string to avoid confusion, as from a more generic perspective
the RZ/G1C is sharing the most similarities with the R-Car
Gen2 family of SoCs, and there is a combination of R-Car
Gen2 compatible SDHI IPs and R-Car Gen3 compatible SDHI IP
on this specific chip.
This patch adds the SoC specific part of SDHI1 support, and
since SDHI1 comes with internal DMA, its DT node looks fairly
different from SDHI0 and SDHI2.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

RZ/G1C comes with two different types of IP for the SDHI
interfaces, SDHI0 and SDHI2 share the same IP type, and
such an IP is also compatible with the one found in R-Car
Gen2. SDHI1 IP on the other hand is compatible with R-Car
Gen3 with internal DMA.
This patch completes the SDHI support of the R-Car Gen2
compatible IPs, including fixing the max-frequency
definition of SDHI2, as it turns out there is a bug in
Section 1.3.9 of the RZ/G1C Hardware User's Manual (Rev.
1.00 Oct. 2017).
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add device tree nodes for the I2C[0123] controllers. Also, add
the aliases node.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This provides a pinctrl driver for the Renesas R9A06G032 SoC

Based on a patch originally written by Michel Pollet at Renesas.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Each CPU can (and does) participate in cooling down the system but the
DT only captures a handful of them, normally CPU0, in the cooling maps.
Things work by chance currently as under normal circumstances its the
first CPU of each cluster which is used by the operating systems to
probe the cooling devices. But as soon as this CPU ordering changes and
any other CPU is used to bring up the cooling device, we will start
seeing failures.

Also the DT is rather incomplete when we list only one CPU in the
cooling maps, as the hardware doesn't have any such limitations.

Update cooling maps to include all devices affected by individual trip
points.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds the thermal device node and the thermal-zone for
the R8A77990 SoC.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>