1. 12 Apr, 2004 40 commits
    • Andrew Morton's avatar
      [PATCH] ppc64: DMA API updates · 9ed9e7e5
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      DMA API updates, in particular adding the new cache flush interfaces.
      9ed9e7e5
    • Andrew Morton's avatar
      [PATCH] ppc64: Add smt_snooze_delay cpu sysfs attribute · b7ceb145
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Add smt_snooze_delay cpu sysfs attribute
      b7ceb145
    • Andrew Morton's avatar
      [PATCH] ppc64: Oops cleanup · c3a85f1f
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Oops cleanup:
      
      - Move prototypes into system.h
      - Move the debugger hooks into die, all the calls sites were calling them.
      - Handle bad values passed to prregs
      c3a85f1f
    • Andrew Morton's avatar
      [PATCH] ppc64: add platform identification to oops messages · fbe3e9b6
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      fbe3e9b6
    • Andrew Morton's avatar
      [PATCH] ppc64: replace vio_dma_mapping_error with dma_mapping_error everywhere. · 53e8cdeb
      Andrew Morton authored
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      James Bottomley is right, this was a mistake.  This patch replaces
      vio_dma_mapping_error with dma_mapping_error everywhere.
      53e8cdeb
    • Andrew Morton's avatar
      [PATCH] ppc64: change the iSeries virtual device drivers to use the vio... · 8277a1fa
      Andrew Morton authored
      [PATCH] ppc64: change the iSeries virtual device drivers to use the vio infrastructure for DMA mapping
      
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      This patch changes the iSeries virtual device drivers to use the
      vio infrastructure for DMA mapping instead of the PCI infrastructure.
      This is a step along the way to integrating them correctly into the
      driver model.
      8277a1fa
    • Andrew Morton's avatar
      [PATCH] ppc64: Consolidate some of the iommu DMA mapping routines. · e1df56ff
      Andrew Morton authored
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      This patch consolidates some of the iommu DMA mapping routines.
      e1df56ff
    • Andrew Morton's avatar
      [PATCH] ppc64: Use enum dma_data_direction for all APIs · 9b678c1e
      Andrew Morton authored
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      This is just a cleanup to use enum dma_data_direction for all APIs
      except the pci_dma_ ones (since they are defined generically).
      
      Also make most of the functions in arch/ppc64/kernel/pci_iommu.c
      static.
      9b678c1e
    • Andrew Morton's avatar
      [PATCH] ppc64: Use enum dma_data_direction for the vio DMA api routines. · f4421b9c
      Andrew Morton authored
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      This patch uses enum dma_data_direction for the vio DMA api routines.
      This allows us to remove some include of linux/pci.h.
      
      Also missed some pci_dma_mapping_error uses.
      f4421b9c
    • Andrew Morton's avatar
      [PATCH] ppc64: Register secondary threads in NUMA init code · 61d5b689
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Register secondary threads in NUMA init code
      61d5b689
    • Andrew Morton's avatar
      [PATCH] ppc64: Add HW PMC support to oprofile · 36af1eb0
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Add HW PMC support to oprofile
      36af1eb0
    • Andrew Morton's avatar
      [PATCH] ppc64: Add PMCs to sysfs · 12c9ae0d
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Add PMCs to sysfs.
      12c9ae0d
    • Andrew Morton's avatar
      [PATCH] ppc64: Add some POWER5 specific optimisations · c1a86d3b
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Add some POWER5 specific optimisations:
      - icache is coherent, no need to explicitly flush
      - tlbie lock no longer required
      c1a86d3b
    • Andrew Morton's avatar
      [PATCH] ppc64: Move sysfs specific stuff into sysfs.c · 01007b4e
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Move sysfs specific stuff into sysfs.c
      01007b4e
    • Andrew Morton's avatar
      [PATCH] ppc64: Update CPU features · 0e75cd78
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Update CPU features. Remove DABR feature, all cpus have it. Add MMCRA,
      PMC8, SMT, COHERENT_ICACHE, LOCKLESS_TLBIE features
      0e75cd78
    • Andrew Morton's avatar
      [PATCH] ppc64: Put SMT threads into global interrupt queue · 0a8d8fbc
      Andrew Morton authored
      From: David Engebretsen <engebret@us.ibm.com>
      
      Put SMT threads into global interrupt queue
      0a8d8fbc
    • Andrew Morton's avatar
      [PATCH] ppc64: Create xics get_irq_server · 0b29d5e7
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Create xics get_irq_server and use it in enable/disable code.
      0b29d5e7
    • Andrew Morton's avatar
      [PATCH] ppc64: irq cleanups · b9027516
      Andrew Morton authored
      From: Paul Mackerras <paulus@samba.org>
      
      Create and use irq_offset_up/down, get_irq_desc, for_each_irq
      b9027516
    • Andrew Morton's avatar
      [PATCH] ppc64: Fix xics irq affinity bug · 23f217fa
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Fix xics irq affinity bug. We were anding with cpu_online_map but werent
      using the result later on.
      23f217fa
    • Andrew Morton's avatar
      [PATCH] ppc64: Add RTAS os-term call for panic on pSeries · 69bc70b9
      Andrew Morton authored
      From: Michael Strosaker <strosake@us.ibm.com>
      
      Add RTAS os-term call for panic on pSeries
      69bc70b9
    • Andrew Morton's avatar
      [PATCH] ppc64: Add support for hotplug cpus · 15cddddb
      Andrew Morton authored
      From: Joel Schopp <jschopp@austin.ibm.com>
      
      Add support for hotplug cpus
      15cddddb
    • Andrew Morton's avatar
      [PATCH] ppc64: Additional PVR value for power5 processor · eabf4910
      Andrew Morton authored
      From: Will Schmidt <willschm@us.ibm.com>
      
      Additional PVR value for power5 processor
      eabf4910
    • Andrew Morton's avatar
      [PATCH] ppc64: Misc rtasd fixes · d90fba56
      Andrew Morton authored
      From: Jake Moilanen <moilanen@austin.ibm.com>
      
      Misc rtasd fixes for some broken firmware versions.
      d90fba56
    • Andrew Morton's avatar
      [PATCH] ppc64: Fix xmon compile warning · 18e0d816
      Andrew Morton authored
      From: Joel Schopp <jschopp@austin.ibm.com>
      
      Fix includes to avoid the compiler warning:
      arch/ppc64/xmon/start.c: In function `xmon_readchar':
      arch/ppc64/xmon/start.c:104: warning: implicit declaration of function
      `xmon_printf'
      18e0d816
    • Andrew Morton's avatar
      [PATCH] ppc64: Make rtasd dump KERN_DEBUG · 87fb698c
      Andrew Morton authored
      From: Jake Moilanen <moilanen@austin.ibm.com>
      
      Change the loglevel of an error log printed so it
      does not goto the console.  Since error logs can
      be upto 2k in size, it can spam the console.
      87fb698c
    • Andrew Morton's avatar
      [PATCH] ppc64: Correct comments for the offsets of fields in paca · e80bc2ce
      Andrew Morton authored
      From: Will Schmidt <willschm@us.ibm.com>
      
      Correct comments for the offsets of fields in paca
      e80bc2ce
    • Andrew Morton's avatar
      [PATCH] ppc64: JS20 PHB devfn fix · 565010b9
      Andrew Morton authored
      From: Jake Moilanen <moilanen@austin.ibm.com>
      
      The JS20 uses devfn 0 for a HT->PCI bridge.  The PHB devfn
      assumption does not hold for this case.
      565010b9
    • Andrew Morton's avatar
      [PATCH] ppc64: Allow PCI devices to use address that happens to fall in the ISA range · d9110d3a
      Andrew Morton authored
      From: Jake Moilanen <moilanen@austin.ibm.com>
      
      Allow PCI devices to use address that happens to fall in the ISA range,
      but still protect against ISA device accesses when there is not an ISA
      bus.
      d9110d3a
    • Andrew Morton's avatar
      [PATCH] ppc64: Disable SMT snooze by default · 28532196
      Andrew Morton authored
      From: Anton Blanchard <anton@samba.org>
      
      Disable SMT snooze by default
      28532196
    • Andrew Morton's avatar
      [PATCH] ppc64: Move EPOW log buffer to BSS · ac55528c
      Andrew Morton authored
      From: Olof Johansson <olof@austin.ibm.com>
      
      RTAS on IBM pSeries runs in real mode, so all pointers being passed in to
      it need to be in low memory.  There's two places in the RAS code that
      passes in pointers to items on the stack, which might end up being above
      the limit.
      
      Below patch resolves this by creating a buffer in BSS + a lock for
      serialization.  There's no reason to worry about contention on the lock,
      since rtas_call() also serializes on a single spinlock and this is an
      infrequent code path in the first place.
      ac55528c
    • Andrew Morton's avatar
      [PATCH] ppc64: allow hugepages anywhere in low 4GB · 81c31b89
      Andrew Morton authored
      From: David Gibson <david@gibson.dropbear.id.au>
      
      On PPC64, to deal with the restrictions imposed by the PPC MMU's segment
      design, hugepages are only allowed to be mapping in two fixed address
      ranges, one 2-3G (for use by 32-bit processes) and one 1-1.5T (for use in
      64-bit processes).  This is quite limiting, particularly for 32-bit
      processes which want to use a lot of large page memory.
      
      This patch relaxes this restriction, and allows any of the low 16 segments
      (i.e.  those below 4G) to be individually switched over to allow hugepage
      mappings (provided the segment does not already have any normal page
      mappings).  The 1-1.5T fixed range for 64-bit processes remains.
      81c31b89
    • Andrew Morton's avatar
      [PATCH] PPC64: iSeries virtual ethernet driver · 29178051
      Andrew Morton authored
      From: Stephen Rothwell <sfr@canb.auug.org.au>
      
      This is the iSeries virtual ethernet driver.  David Gibson has taken you
      previous comments and hopefully sitisfied most of them.  The driver has
      also undergone some more testing which showed up some bugs which have been
      addressed.
      
      Unfortunately, Anton is about to submit some other patches of mine which
      will sightly comflict with this.  I will send a patch shortly that will
      (hopefully) fix that.
      29178051
    • Andrew Morton's avatar
      [PATCH] ppc64: export itLpNaca on iSeries · 2b62c4ac
      Andrew Morton authored
      From: Paul Mackerras <paulus@samba.org>
      
      This patch from Julie DeWandel exports the symbol itLpNaca on iSeries
      machines, for the use of the viodasd driver.
      2b62c4ac
    • Andrew Morton's avatar
      [PATCH] disable VT on iSeries by default · db9626cd
      Andrew Morton authored
      From: Paul Mackerras <paulus@samba.org>
      
      This patch from Julie DeWandel makes CONFIG_VT default to N on iSeries
      machines which are using the iSeries virtual console driver viocons.c.  The
      VT console and the viocons code can't coexist because they use the same tty
      numbers, that is, viocons supplies /dev/tty1.  Without this patch the user
      has to figure out somehow that s/he has to turn on CONFIG_EMBEDDED in order
      to be able to turn off CONFIG_VT, which is really very non-obvious.
      db9626cd
    • Andrew Morton's avatar
      [PATCH] ppc64: Fix G5 build with DART (iommu) support · 8ff9c6ef
      Andrew Morton authored
      From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      A recent patch that cleaned up some absolute/virt translation macros forgot
      one occurence, thus breaking g5 build with iommu support.
      8ff9c6ef
    • Andrew Morton's avatar
      [PATCH] ppc64: fix failure return codes from {pci,vio}_alloc_consistent() · 728be84f
      Andrew Morton authored
      From: Olof Johansson <olof@austin.ibm.com>
      
      A bug snuck in during the rewrite of ppc64 IOMMU code.  When a
      {pci,vio}_alloc_consistent() call fails, DMA_ERROR_CODE is returned instead
      of NULL.
      728be84f
    • Andrew Morton's avatar
      [PATCH] ppc64: hugepage bugfix · d0ebc08f
      Andrew Morton authored
      From: David Gibson <david@gibson.dropbear.id.au>
      
      Found this again while looking at hugepage extensions.  Haven't actually had
      it bite yet - the race is small and the other bug will never be triggered in
      32-bit processes, and the function is rarely called on 64-bit processes.
      
      This patch fixes two bugs in the (same part of the) PPC64 hugepage code.
      First the method we were using to free stale PTE pages was not safe with some
      recent changes (race condition).  BenH has fixed this to work in the new way.
       Second, we were not checking for a valid PGD entry before dereferencing the
      PMD page when scanning for stale PTE page pointers.
      d0ebc08f
    • Andrew Morton's avatar
      [PATCH] ppc64: Fix bug in hugepage support · b4e0dd09
      Andrew Morton authored
      From: David Gibson <david@gibson.dropbear.id.au>
      
      The PPC64 version of is_aligned_hugepage_range() is buggy.  It is supposed to
      test not only that the given range is hugepage aligned, but that it lies
      within the address space allowed for hugepages.  We were checking only that
      the given range intersected the hugepage range, not that it lay entirely
      within it.  This patch fixes the problem and changes the name of some macros
      to make it less likely to make that misunderstanding again.
      b4e0dd09
    • Andrew Morton's avatar
      [PATCH] ppc64: si_addr fix · 5c57dda8
      Andrew Morton authored
      From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      This patch fixes si_addr on some segfaults in 64 bits mode, it used to be
      bogus (address not passed to do_page_fault by the asm code after a failure
      to set an SLB entry).
      5c57dda8
    • Andrew Morton's avatar
      [PATCH] ppc32: Fix thinko in the altivec exception code · dbf5a5af
      Andrew Morton authored
      From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      
      Without this patch, executing an altivec instruction on an altivec capable
      CPU with a kernel that do not have CONFIG_ALTIVEC set would result in a
      kernel crash.
      
      (Fix forward ported from 2.4 by John Whitney
      <jwhitney-linuxppc@sands-edge.com>)
      dbf5a5af